doc.: IEEE /139r5 Submission July 2003 Didier Helal and Philippe Rouzet, STMSlide 3 Contents Introduction to Pulse Position Modulation UWB PHY Proposal Performances results
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July 2003 Didier Helal and Philippe Rouzet, STM Slide 1 doc.: IEEE 802.15-03/139r5 Submiss ion Project: IEEE P802.15 Working Group for Wireless Personal Area Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Networks (WPANs) Submission Title: [STMicroelectronics proposal for IEEE 802.15.3a Alt PHY] Date Submitted: [18 July, 2003] Source: [Didier Helal (Primary) Philippe Rouzet (Secondary)] Company [STMicroelectronics] Address [STMicroelectronics, 39 Chemin du Champ des Filles 1228 Geneve Plan-les-Ouates, Switzerland] Voice [+41 22 929 58 72 or +41 22 929 58 66 ], Fax [+41 22 929 29 70], E-Mail : [[email protected], philippe [email protected]] Re: [This is a response to IEEE P802.15 Alternate PHY Call For Proposals dated 17 January 2003 under number IEEE P802.15-02/372r8 ] Abstract: [This document contents the proposal submitted by ST for an IEEE P802.15 Alternate PHY based on UWB technique. ] Purpose: [Presentation to be made during July IEEE TG3a session in San Francisco, California] Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study.
Transcript
July 2003
Didier Helal and Philippe Rouzet, STMSlide 1
doc.: IEEE 802.15-03/139r5
Submission
Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs)
Submission Title: [STMicroelectronics proposal for IEEE 802.15.3a Alt PHY]Date Submitted: [18 July, 2003]Source: [Didier Helal (Primary) Philippe Rouzet (Secondary)] Company [STMicroelectronics]Address [STMicroelectronics, 39 Chemin du Champ des Filles 1228 Geneve Plan-les-Ouates, Switzerland]Voice [+41 22 929 58 72 or +41 22 929 58 66 ], Fax [+41 22 929 29 70], E-Mail :[[email protected], philippe [email protected]]Re:
[This is a response to IEEE P802.15 Alternate PHY Call For Proposals dated 17 January 2003 under number IEEE P802.15-02/372r8 ]
Abstract: [This document contents the proposal submitted by ST for an IEEE P802.15 Alternate PHY based on UWB technique.]
Purpose: [Presentation to be made during July IEEE TG3a session in San Francisco, California]Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein.Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15.
July 2003
Didier Helal and Philippe Rouzet, STMSlide 2
doc.: IEEE 802.15-03/139r5
Submission
July 2003, San Francisco, California
STMicroelectronics Proposal for
IEEE 802.15.3a Alternate PHY
Didier Hélal, Philippe Rouzet
R. Cattenoz, C. Cattaneo, L. Rouault, N. Rinaldi,L. Blazevic, C. Devaucelle, L. Smaïni, S. Chaillou
July 2003
Didier Helal and Philippe Rouzet, STMSlide 3
doc.: IEEE 802.15-03/139r5
Submission
Contents
• Introduction to Pulse Position Modulation
• UWB PHY Proposal
• Performances results
July 2003
Didier Helal and Philippe Rouzet, STMSlide 4
doc.: IEEE 802.15-03/139r5
Submission
Pulse Position Modulation (1)
Time
PRP = Pulse Repetition Period = 1/PRF
A system with a PRF of 250MHz transmits 250 million pulses per second
Time
PRF = Pulse Repetition Frequency
A system with a PRF of 250MHz transmits one pulse every 4 ns
July 2003
Didier Helal and Philippe Rouzet, STMSlide 5
doc.: IEEE 802.15-03/139r5
Submission
Pulse Position Modulation (2)
Time
A system with a PRF of 250MHz using a 4-PPM transmits 500 million bits per second
Position 1
Time
A system with a PRF of 250MHz using a 4-PPM + Polarity transmits 750 million bits
per second
Position 2Position 3Position 4
July 2003
Didier Helal and Philippe Rouzet, STMSlide 6
doc.: IEEE 802.15-03/139r5
Submission
1 2
Tppm = 300ps
1 bit / pulse
2 bits / pulse
3 bits / pulse
t
3 4Equally spaced Positions
Polarity
2-PPM +Polarity
4-PPM +Polarity
July 2003
Didier Helal and Philippe Rouzet, STMSlide 7
doc.: IEEE 802.15-03/139r5
Submission
Bit Mapping
• Gray-invert mapping: takes advantage from the bi-orthogonal modulation PPM+Polarity.
000 001 011 010
101100110111
PPMerror
antipodalerror PP
July 2003
Didier Helal and Philippe Rouzet, STMSlide 8
doc.: IEEE 802.15-03/139r5
Submission
Modulation
PAYLOAD Bit Rate Target
PAYLOAD Bit Rate Effective
Modulation Code-rate
PRP
55 Mbps 62.5 Mbps BPSK 1/2 8 ns
110 Mbps 125 Mbps BPSK +2-PPM
1/2 8 ns
200 Mbps 250 Mbps BPSK +4-PPM
2/3 8 ns
480 Mbps 500 Mbps BPSK + 4PPM
2/3 4 ns
July 2003
Didier Helal and Philippe Rouzet, STMSlide 9
doc.: IEEE 802.15-03/139r5
Submission
PPM Modulation capacity
• Increasing the number of pulse positions brings better efficiency
13,15 (octal def.)– Block size: 512– Low latency: 5 s
July 2003
Didier Helal and Philippe Rouzet, STMSlide 12
doc.: IEEE 802.15-03/139r5
Submission
Adaptive band Pulse shape• Pulse shape can be adapted to any
regulation, provided the pulse power spectral density fits emission mask.
• Flexibility on pulse shape enables compatibility with more stringent regulations worldwide.
• See ref. IEEE 802.15-03/211r0.
July 2003
Didier Helal and Philippe Rouzet, STMSlide 13
doc.: IEEE 802.15-03/139r5
Submission
Backward and Forward compatibility
• First generation systems will use the lower part of the band due to technology limitations, e.g. 3-7GHz.
• Next generation will extend this bandwidth e.g. to 3-10GHz, older systems using the energy in 3-7GHz band.
3 4 5 76 98 10 11
Frequency (GHz)
UNII
July 2003
Didier Helal and Philippe Rouzet, STMSlide 14
doc.: IEEE 802.15-03/139r5
Submission
Example of a full band pulse shape
BW-10dB = 7.26 GHzAverage TX power = 0.3 mWPeak emission power in 50MHz = -10 dBm
July 2003
Didier Helal and Philippe Rouzet, STMSlide 15
doc.: IEEE 802.15-03/139r5
Submission
Example of a low band pulse shape
BW-10dB = 4 GHzAverage TX power = 0.26 mWPeak emission power in 50MHz = -10.8 dBm
July 2003
Didier Helal and Philippe Rouzet, STMSlide 16
doc.: IEEE 802.15-03/139r5
Submission
FRAME: Known Training Sequencefor Frame Synchronization and Channel Estimation
Example of a simplified emitted pulse train
Pulse shape not shown (use rectangle for clarity)
Preamble Modulated user data
Time Hopping + Polarity
2-PPM + Polarity (Time Hopping optional)
PRP
Frame
Frame Preamble
July 2003
Didier Helal and Philippe Rouzet, STMSlide 17
doc.: IEEE 802.15-03/139r5
Submission
BEACON is a regular frame with appended preamble for Coarse Synchronization
Piconet Information
Time Hopping + Polarity
2-PPM + Polarity (Time Hopping optional)
PRP
Time Hopping + Polarity
Coarse Sync. Frame Sync.+ Ch. Est
Beacon
Beacon Preamble
July 2003
Didier Helal and Philippe Rouzet, STMSlide 18
doc.: IEEE 802.15-03/139r5
Submission
Cell synchronization (1)
PNC
DEV-A
DEV-B
Scenario
Cell sy
nch Cell synch
Dev-dev synch
A device which enters the piconet has to:
1) Detect the piconet code
2) Find approximate beginning of beacon data
3) Estimate its clock drift with PNC
4) Estimate channel and do fine synchronization to allow best energy capture
5) Compensate for residual clock drift
July 2003
Didier Helal and Philippe Rouzet, STMSlide 19
doc.: IEEE 802.15-03/139r5
Submission
Cell synchronization (2)1. Coarse synchronization
1.1 Detection of the piconet code among 20 possible.
1.2 Alignment: find the end of the superframe beacon preamble. Goal is also to find the beginning of the channel impulse response. This is done by detecting the first path above a fixed threshold. Coarse precision allows fine synchronization in step 3.
2. Coarse clock drift correction, based on information given in 1.2. Is made based on several superframe beacon preambles. Use of basic interpolation or adaptive filtering (like Kalman, should the oscillator spec require it) to predict clock drift.
3. Fine synchronization: can take place now, with better accuracy, since some of the clock drift between PNC and DEV has been removed in 2. Via channel estimation and processing, can align to the beginning of the channel impulse response with much more accuracy than after 1.2.
4. Fine clock drift correction, based on information given in 3.
July 2003
Didier Helal and Philippe Rouzet, STMSlide 20
doc.: IEEE 802.15-03/139r5
Submission
Coarse Synchronization (1)Preamble coding :
TIME HOPPING + POLARITY
Preamble codes :
Sequences of length Lc = 79
TH = Quadratic-Congruence (QC) sequences
Cn = time-hopping offset (multiple of time-hopping resolution)
POL = Derived from row of a Hadamard matrix of size 80 x 80
79mod)*( 2)( nic in • i = 1,2,…,78: sequence number
• n = 0,1,…,78: TH offset index
July 2003
Didier Helal and Philippe Rouzet, STMSlide 21
doc.: IEEE 802.15-03/139r5
Submission
Coarse Synchronization (2)
• Preamble construction– PRP = 8 ns. TH offset resolution: 50ps.– Sequence is repeated R = 80 + 3 times.– Duration of coarse sync beacon preamble: DC = R*LC *PRP = 52.4 s.
…..
80 repetitions
End of Beacon Preamble (EOBP) signature
Beacon preamble duration: DC = 52.4 s
One sequence: LC*PRP
+
--
++
July 2003
Didier Helal and Philippe Rouzet, STMSlide 22
doc.: IEEE 802.15-03/139r5
Submission
Coarse Synchronization (3)
Contention Free Period
MC
TA 1
C
TA 1
MC
TA n
C
TA 2
CTA
m
prea
mbl
e
head
er
bo
dy
Beacon
CTA
x
Contention
Access
Period
Superframe N
prea
mbl
e
Detection: Find one sequence among 20
Alignment: Find end of coarse synchronization beacon preamble with a precision of ~10 ns.
Superframe N+1
… … … …
prea
mbl
e
July 2003
Didier Helal and Philippe Rouzet, STMSlide 23
doc.: IEEE 802.15-03/139r5
Submission
Coarse Clock Synchronization (1)
Contention Free Period
MC
TA 1
C
TA 1
MC
TA n
C
TA 2
CTA
m
prea
mbl
e
head
er
bo
dy
Beacon
CTA
x
Contention
Access
Period
Superframe N
prea
mbl
e
Superframe N+1
… … … …
prea
mbl
e
correct clock drift between TX DEV and RX DEV
prea
mbl
e
TSF: average superframe period (e.g. 10 ms)
slope of clock drift = ((ti+1 – ti) – TSF)/TSF
ti+1 ti
July 2003
Didier Helal and Philippe Rouzet, STMSlide 24
doc.: IEEE 802.15-03/139r5
Submission
Coarse Clock Synchronization (2)
Coarse Drift estimation and tracking– Clock tracking algorithm uses coarse
synchronization outputs to predict clock drift over next superframe
– Method: basic interpolation or implementation of an adaptive filter (like Kalman, should the oscillator spec require it).
– Drift correction down to ~1 ppm. Enough for fine synchronization & channel estimation, done over 6s.
July 2003
Didier Helal and Philippe Rouzet, STMSlide 25
doc.: IEEE 802.15-03/139r5
Submission
Fine Synchronization
Contention Free Period
MC
TA 1
C
TA 1
MC
TA n
C
TA 2
CTA
m
prea
mbl
e
head
er
bo
dy
Beacon
CTA
x
Contention
Access
Period
Superframe N
prea
mbl
e
Superframe N+1
… … … …
prea
mbl
e
DEV-A synchronized to PNC’s clock
DEV-A demodulates beacon Fine Synchronization is made jointly with channel
estimation and optimizes energy capture
Fine synchronization algorithm gives end of beacon preamble (blue) with good accuracy
July 2003
Didier Helal and Philippe Rouzet, STMSlide 26
doc.: IEEE 802.15-03/139r5
Submission
Fine Clock Synchronization
Fine clock drift estimation and tracking• Clock tracking algorithm uses fine synchronization outputs to refine
clock drift prediction down to 0.1ppm. Enough for demodulation over 100 s
Contention Free Period
MC
TA 1
C
TA 1
MC
TA n
C
TA 2
CTA
m
prea
mbl
e
head
er
bo
dy
Beacon
CTA
x
Contention
Access
Period
Superframe N
prea
mbl
e
Superframe N+1
… … … …
prea
mbl
e
prea
mbl
e
July 2003
Didier Helal and Philippe Rouzet, STMSlide 27
doc.: IEEE 802.15-03/139r5
Submission
DEV-to-DEV Synchronization (1)
Contention Free Period
MC
TA 1
C
TA 1
MC
TA n
C
TA 2
CTA
m
prea
mbl
e
head
er
bo
dy
Beacon
CTA
x
Contention
Access
Period
Superframe N
Body
Frame sent to DEV-A by DEV-B
Hea
der
Prea
mbl
e
prea
mbl
e
Superframe N+1
… … … …
prea
mbl
e
DEV-A wakes up, and needs to synchronize to DEV-B’s clock.
DEV-A’s clock is synchronized to DEV-B’s clock, and can start to demodulate the data contained in the frame sent by DEV-B.
1) Correction of known clock drift
2) Fine Synchronization and channel estimation
3) Demodulation
July 2003
Didier Helal and Philippe Rouzet, STMSlide 28
doc.: IEEE 802.15-03/139r5
Submission
DEV-to-DEV Synchronization (2)
f1 and f2 are estimated during cell synchronization phase, by DEV-1 and DEV-2 respectively
f12 is known by PNC and must be corrected by DEVs
PNC
DEV-1TX
DEV-2RX
f1f2
f12
July 2003
Didier Helal and Philippe Rouzet, STMSlide 29
doc.: IEEE 802.15-03/139r5
Submission
DEV-to-DEV Synchronization (2)Two solutions
1. RX DEV corrects for both f1 and f2.
+ Better precision
- MAC needs to provide f values to all piconet devices
2. TX DEV correct f1 by adjusting pulse position transmission
+ RX DEV does not need to know f1
- Less accurate
July 2003
Didier Helal and Philippe Rouzet, STMSlide 30
doc.: IEEE 802.15-03/139r5
Submission
PHY-SAP Data Throughput close to Payload Bit Rate
PHY Header, MAC Header (802.15.3 format), HCS use 62.5Mb/s mode
Optimized Packet Overhead Times
Payload Bit Rate (Mb/s)
PHY-SAP Throughput (Mb/s) 5 frames
PHY-SAP Throughput (Mb/s) 1 frame
T_DATA (1020 Bytes MPDU)
62.5(mandatory) 58.26 57.93 130.56 s
125 (mandatory) 109.49 108.33 65.28 s
250 (optional) 195.4 191.73 32.64 s
500 (optional) 321.56 311.74 16.32 s
T_PA_INITIAL
T_PHYHDR
T_MACHDR
T_HCS T_MIFS T_SIFS T_PA_CONT
T_RIFS
6 s 0.26s 1.28 s 0.26s 1s 2 s 6 s 11.8 s
July 2003
Didier Helal and Philippe Rouzet, STMSlide 31
doc.: IEEE 802.15-03/139r5
Submission
MAC enhancements
• Proposed MAC is compliant with existing MAC IEEE 802.15.3
• Introduction of optional minor MAC adaptations to optimize:– Receiver power consumption– Complexity (synchronization)– Performance (ARQ)
July 2003
Didier Helal and Philippe Rouzet, STMSlide 32
doc.: IEEE 802.15-03/139r5
Submission
Frame reception (1)
• Approximate frame Times Of Arrival (TOAs) used in CTA slotsTOA information announced by source DEV at the beginning of CTA
– Used for channel estimation & synchronization
– Several methods for TOA signaling (one example presented later)
– Benefits :
• ARQ scheme can be improved (One ACK per CTA to reduce overhead)
• Efficient power consumption
July 2003
Didier Helal and Philippe Rouzet, STMSlide 33
doc.: IEEE 802.15-03/139r5
Submission
Proposed TOA used by MAC for Frame synchronization
•Use of approximate frame TOAs to manage different lengths of frames and facilitate frame synchronization
CTA slot in superframe
Frame 1 MIF
SFrame 2 M
IFS
MIF
S
MIF
S
3 Frame 4 Frame 5
MIF
S
6
MIF
S
TOA
1
TOA
2
TOA
3
TOA
4
TOA
5
TOA
6
TOA 1 TOA 2 TOA 3 TOA 4 TOA 5 TOA 6
MIF
S
CTA Header announcing TOAs
July 2003
Didier Helal and Philippe Rouzet, STMSlide 34
doc.: IEEE 802.15-03/139r5
Submission
Frame reception (2)• Contention based access without CAP
Use MCTA slots and Slotted Aloha instead of CAPVERY LOW POWER CONSUMPTION
• Contention based access during CAP without continuous acquisition attempts
Use CAP with a new Slotted mechanism based on CSMA/CA. LOW POWER CONSUMPTION
• Contention based access during CAP with CSMA/CA
Use CAP as defined in 802.15.3: CSMA/CA with CCA
July 2003
Didier Helal and Philippe Rouzet, STMSlide 35
doc.: IEEE 802.15-03/139r5
Submission
Contention based access during CAP• CSMA/CA in CAP is possible by CCA through preamble
detection but is not efficient– CCA is power hungry (due to UWB environment, independently
from the modulation)– Not suitable for time-bounded consumer applications (audio/video
streaming)
• Less power consumption solution is to do CCA by Slotted CAP mechanism
20ns 20ns 20ns 20ns 20ns
10μs 10μs 10μs 10μs
…
Slotted CAP
July 2003
Didier Helal and Philippe Rouzet, STMSlide 36
doc.: IEEE 802.15-03/139r5
Submission
Proposed Alternate PHY enables
Single Chip FULL CMOS solution
Through
DIRECT SAMPLING on 1 BITand
DIGITAL MATCHED FILTERINGLearning pulse signature after channel propagation
July 2003
Didier Helal and Philippe Rouzet, STMSlide 37
doc.: IEEE 802.15-03/139r5
Submission
Demodulation is performed by Match-Filtering
The match-filter is the estimate of the pulse signature through channel propagation
• 50 ps sampling, Time window is 50ns and 1ns (zoom)
1 bit ADC
Noise injection
Average of 750 pulses (1-bit
sampled)
50 ns
Zoom
1 ns
July 2003
Didier Helal and Philippe Rouzet, STMSlide 39
doc.: IEEE 802.15-03/139r5
Submission
Channel Estimation
• The channel estimated is compared with the actual channel response
• Averaging 1 bit data removes noise and gets accurate estimation
July 2003
Didier Helal and Philippe Rouzet, STMSlide 40
doc.: IEEE 802.15-03/139r5
Submission
Simplified Hardware Implementationof Channel Estimation and Demod
• Restricted output of channel estimation– 1.5 bit (-1, 0, +1)– Raw shape of channel is enough to recover modulated pulses– <2dB loss included in implementation loss
July 2003
Didier Helal and Philippe Rouzet, STMSlide 41
doc.: IEEE 802.15-03/139r5
Submission
Channel Estimation Easy to Implement• Each point of the channel estimation can be seen as one finger of a
rake receiver64 ns = 1280 fingers of 50 ps width
• Channel estimation consists in coherent integrations of received pulses
One bit ADC makes the operation a simple increment/decrementNo multiplication or complex operator !
• Estimated gate count of the whole channel estimation blockbit slice number of gates * number of bit of the counter * number of channel
point(20*7*1280 = 179200 gates)
• Power consumptionParallel hardware implementation of all fingers
Frequency of operations is low (1/PRP)
July 2003
Didier Helal and Philippe Rouzet, STMSlide 42
doc.: IEEE 802.15-03/139r5
Submission
RF block
Antenna
BPFilter
PulseGenerator
ClockSynthesizer
1-bitADC
TDD
Switch
ABR
ABR
Optional
LNA
PTC
UWB System-on-ChipBlock Diagram
Channel estimationSynchronization
DemodulationChannelDecoding
ChannelCoding
Modulation &coding
Baseband block
TXData
RXData
TXPreparation
Frag-mentation
TXControl
RXControl
Defrag-mentation
MAC block (Bottom part)
PTC
ABR = Adaptive Band RejectionPTC = Piconet Time Control
MAC+BB+RF on same silicon except BP filter and Antenna
July 2003
Didier Helal and Philippe Rouzet, STMSlide 43
doc.: IEEE 802.15-03/139r5
Submission
Link Budget (3-7GHz BW)
Noise figure for all RX chain referred at the antenna output
Antenna
BPFilter
PulseGenerator
ClockSynthesizer
1-bitADC
TDDSwitch
ABR
ABR
Optional
LNA
2dBloss
0.7dBloss
NF = 3dB2dB
G = 16dB
NF = 9dB
Clock Jitter : 10ps rms (maximum from 0.13m silicon measurements)
July 2003
Didier Helal and Philippe Rouzet, STMSlide 44
doc.: IEEE 802.15-03/139r5
Submission
Implementation Loss & Minimum Eb/N0
• 3.5dB implementation loss including:– Clock imperfections including 1 dB
• 10ps rms delay spread both tx and rx side• Frequency drift
– Simplified hardware implementation : 2 dB– ADC imperfections + other marginal loss: 0.5 dB
• Min Eb/No drawn from simulations, which reflect:– Imperfect synchronization & channel estimation– RTL baseband model used in simulations
Implementation loss & minimum Eb/N0 figures represent
Total loss to be found in real implementation
July 2003
Didier Helal and Philippe Rouzet, STMSlide 45
doc.: IEEE 802.15-03/139r5
Submission
110Mbps @ 10m, AWGNThroughput Rb (Mb/s) 125Distance (m) 10.0Average TX power Pt (dBm) -5.58Tx antenna gain Gt (dBi) 0.0Fc (Hz) 4.9E+09Path loss 1 meter L1 (dB) 46.2Path loss at d meter L2 (dB) 20.0Rx antenna gain Gr (dBi) 0.0Rx power Pr (dBm) -71.7N = -174 + 10*LOG10(Rb) (dBm) -93.0Noise Figure (dB) 6.3Average noise power per bit Pn (dBm) -86.7Eb/No min (dB) 6.1Implementation Loss (dB) 3.5Link Margin (dB) 5.4Proposed Min Rx sensitivity Level (dBm) -77.1
MAXIMUM RANGE18.6 m
EFFECTIVE THROUGHPUT
125 Mbps
July 2003
Didier Helal and Philippe Rouzet, STMSlide 46
doc.: IEEE 802.15-03/139r5
Submission
200Mbps @ 4m, AWGN
MAXIMUM RANGE11.1 m
EFFECTIVE THROUGHPUT
250 Mbps
Throughput Rb (Mb/s) 250Distance (m) 4.0Average TX power Pt (dBm) -5.58Tx antenna gain Gt (dBi) 0.0Fc (Hz) 4.9E+09Path loss 1 meter L1 (dB) 46.2Path loss at d meter L2 (dB) 12.0Rx antenna gain Gr (dBi) 0.0Rx power Pr (dBm) -63.8N = -174 + 10*LOG10(Rb) (dBm) -90.0Noise Figure (dB) 6.3Average noise power per bit Pn (dBm) -83.7Eb/No min (dB) 7.6Implementation Loss (dB) 3.5Link Margin (dB) 8.8Proposed Min Rx sensitivity Level (dBm) -72.6
July 2003
Didier Helal and Philippe Rouzet, STMSlide 47
doc.: IEEE 802.15-03/139r5
Submission
480Mbps @ 1m , AWGN
MAXIMUM RANGE7.1 m
EFFECTIVE THROUGHPUT
500 Mbps
Throughput Rb (Mb/s) 500Distance (m) 2.0Average TX power Pt (dBm) -5.58Tx antenna gain Gt (dBi) 0.0Fc (Hz) 4.9E+09Path loss 1 meter L1 (dB) 46.2Path loss at d meter L2 (dB) 6.0Rx antenna gain Gr (dBi) 0.0Rx power Pr (dBm) -57.8N = -174 + 10*LOG10(Rb) (dBm) -87.0Noise Figure (dB) 6.3Average noise power per bit Pn (dBm) -80.7Eb/No min (dB) 8.5Implementation Loss (dB) 3.5Link Margin (dB) 11.0Proposed Min Rx sensitivity Level (dBm) -68.7
July 2003
Didier Helal and Philippe Rouzet, STMSlide 48
doc.: IEEE 802.15-03/139r5
Submission
55Mbps @ 10m, AWGNThroughput Rb (Mb/s) 62.5Distance (m) 10.0Average TX power Pt (dBm) -5.58Tx antenna gain Gt (dBi) 0.0Fc (Hz) 4.9E+09Path loss 1 meter L1 (dB) 46.2Path loss at d meter L2 (dB) 20.0Rx antenna gain Gr (dBi) 0.0Rx power Pr (dBm) -71.7N = -174 + 10*LOG10(Rb) (dBm) -96.0Noise Figure (dB) 6.3Average noise power per bit Pn (dBm) -89.7Eb/No min (dB) 5.0Implementation Loss (dB) 3.5Link Margin (dB) 9.5Proposed Min Rx sensitivity Level (dBm) -81.2
MAXIMUM RANGE29.9 m
EFFECTIVE THROUGHPUT
62.5 Mbps
July 2003
Didier Helal and Philippe Rouzet, STMSlide 49
doc.: IEEE 802.15-03/139r5
Submission
Performances Summary90% link success distance
The following results are based on:- 3-7GHz pulse instead of 3-10GHz- Convolutional coding instead of Turbo CodingPerformances are good even with this simplified hardware implementation
RESULTS INCLUDE
SHADOWING
Bit rate AWGN CM1 CM2 CM3 CM4
125 Mbps 18.6 m 11.9 m 10.2 m 11.6 m 11.2 m
14.8 m 13.2 m 13 m 13 m
250 Mbps 11.1 m 7.7 m 6.9 m _ _
9.9 m 8.8 m _ _
500 Mbps 7.1 m 4.1m 4 m _ _
6 m 5.1 m _ _
MEAN
MEAN
MEAN
July 2003
Didier Helal and Philippe Rouzet, STMSlide 50
doc.: IEEE 802.15-03/139r5
Submission
Coding Performance in CM4 channel
coding PRP #PPM Code rate Data rate # operations Eb/No
• 3 Interferers: DInt/DRef is less than 0.75 (for 125 Mbps modulation)
• Simulation resultswith 3-7GHz pulseat 125 Mbps
Worst case ratio
Dint/Dref(= Near far factor)
Interferer are CM1 (channels 6-10, 99 and 100 used)
Interferers are CM2 (channels 6-10, 99 and 100 used)
Inteferer are CM3 (channels 6-10, 99 and 100 used)
Inteferer ares CM4 (channels 6-10, 99 and 100 used)
Ref is CM1 (channels 1-5 used)
0.60 0.60 0.60 0.60
Ref is CM2 (channels 1-5 used)
0.60 0.60 0.60 0.60
Ref is CM3(channels 1-5 used)
0.65 0.65 0.65 0.65
Ref is CM4(channels 1-5 used)
0.70 0.75 0.75 0.75
July 2003
Didier Helal and Philippe Rouzet, STMSlide 59
doc.: IEEE 802.15-03/139r5
Submission
Interference and Susceptibility• Signal-to-Interferer Ratio that can be supported in the presence of a Generic in-band
interferer
• Minimum distance for 802.11a interferer : – A simple configuration using a fixed UNII (3rd order) notch filter that can be bypassed supports
down to 0.7m– BB processing gives more robustness down to 0.3 m NB : lower distances or higher 802.11a transmit power saturate any type of analog front-end
• All out-of-band interferers supported (according to IEEE 802.15-3a proposed criteria).
Hypothesis : - averaged over one 1024 byte frame- convolutional coding- channel estimation on worse case length (64ns) operating during 10% of time
July 2003
Didier Helal and Philippe Rouzet, STMSlide 61
doc.: IEEE 802.15-03/139r5
Submission
Gate count & Consumption computation (1/2)Example with Channel Estimation
• Each point of the channel estimation can be seen as one finger of a rake receiver.(I.e. 64 ns = 1280 fingers of 50 ps width)
• Channel estimation consists in integrating pulses coherently. As the front-end is a 1-bit ADC, operation is simply an increment/decrement for each point of the channel.
– (i.e 1280 Inc/Dec for each pulse in training sequence, 750 pulses -> 1M Inc/Dec, no multiplication and no complex operator)
• Estimated gate count:– About 20 gates needed for each bit slice of an up-down counter: one flip-flop, one add-
sub and a few more for glue– Gate count of the whole channel estimation block is: 20*number of bit of the
counter*number of point of the channel (using parallel hardware implementation of each finger, to keep low clock rate of 1/PRP)
• Consumption:– Increment/decrement operators work at frequency = 1/PRP– Consumption estimation based on 0.13 m CMOS: 6 nW/Gate/MHz
5 : The total consumption supposed that the channel estimation is in operation during 10% of active time and the demodulation and channel decoding 90% of active time
1 : The Channel Length parameter correspond to the windows on which the channel estimation and demodulation is performed.2 : NCI is the number of coherent integration done for the demodulation.3 : PPM number is the number of position for the pulse modulation. There is as many metric block as PPM4 : The minimum PRP (Pulse Repeating Period) indicate directly the max frequency of the chip.
8 8250 375
128 1282 4
125 Mbits/sec 250 Mbits/sec64 64
July 2003
Didier Helal and Philippe Rouzet, STMSlide 63
doc.: IEEE 802.15-03/139r5
Submission
Power Saving Optimization
• Simulations show that channel estimation done over 30 ns for CM1 and CM2 is sufficient (i.e. no impact on performance). For a 4 PPM system, baseband consumption drops to 72 mW (see below).
• For CM3 and CM4, simulations shows that 50 ns is sufficient. For a 4 PPM system, the consumption becomes 90mW.
Channel Type Channel length Power consumption
CM1/CM2 30 ns 72 mW (-36 %)
64 ns 112 mW
CM3/CM4 50 ns 90 mW (-18%)
64 ns 112 mW
July 2003
Didier Helal and Philippe Rouzet, STMSlide 64
doc.: IEEE 802.15-03/139r5
Submission
Very Low Cost Architecture : Sampling at 14 GHz
• Proposed system uses a 1-bit sampler at 20 GHz. Posssibility to use a 1-bit sampling at a lower frequency : simulations using a sampler at 14 GHz show a performance loss of only 0.5 dB
• As for baseband part (without channel decoding) this allows to reduce the size and the power consumption: 4 PPM results in 0.9 mm2 and 53.5 mW instead of 1.3 mm2 and 75 mW.
July 2003
Didier Helal and Philippe Rouzet, STMSlide 65
doc.: IEEE 802.15-03/139r5
Submission
Choice of Sampling Rate
• Sampling frequency is defined by implementer– 20 GHz for top
performance– 14 GHz for low end
product (0.5 dB loss from 20 GHz for 3-7 GHz pulse, simulation done with CM1 channel, at 125 Mbps datarate)
July 2003
Didier Helal and Philippe Rouzet, STMSlide 66
doc.: IEEE 802.15-03/139r5
Submission
Channel EstimationPerformance Optimization
• OPTION POSSIBLE for higher performance:• Full precision channel estimation
– Trade off complexity and consumption for performance• Gain 2dB in implementation loss (keep multi-bit channel
estimation)• ~Gate count * 2• ~Power * 2• 4.7 mm2 and 306 mW for 125 Mbps modulation
July 2003
Didier Helal and Philippe Rouzet, STMSlide 67
doc.: IEEE 802.15-03/139r5
Submission
Current Demonstrator Platform
• RF transmitter and receiver: ASIC– First chipset already in test– Full chipset on September 2003
• Baseband – Today : off-the-shelves board (Nallatech BenNuey) with
FPGA Xilinx Virtex2 6000– End of 2003 : ASIC 0.13 m
• Current progress in demonstrator shows low risk manufacturability– Baseband in FPGA today implies easy migration to ASIC– RF already in test
July 2003
Didier Helal and Philippe Rouzet, STMSlide 68
doc.: IEEE 802.15-03/139r5
Submission
Lay-out of Clock Generation Block
CMOS 0.13m
July 2003
Didier Helal and Philippe Rouzet, STMSlide 69
doc.: IEEE 802.15-03/139r5
Submission
FPGA Floorplanning and Routing
Current estimates on gate count
and power consumption are
based on real implementation
Design Information------------------Target Device : x2v6000Target Package : bf957Target Speed : -4Mapper Version : virtex2 -- $Revision: 1.4 $Mapped Date : Fri May 09 11:15:23 2003
Design Summary-------------- Number of errors: 0 Number of warnings: 0
Number of Slices: 25,606 out of 33,792 75% Number of Slices containing unrelated logic: 0 out of 25,606 0% Number of Slice Flip Flops: 6,298 out of 67,584 9% Total Number 4 input LUTs: 36,944 out of 67,584 54% Number used as LUTs: 33,305 Number used as a route-thru: 3,639 Number of bonded IOBs: 93 out of 684 13% IOB Flip Flops: 67 Number of GCLKs: 1 out of 16 6%
July 2003
Didier Helal and Philippe Rouzet, STMSlide 70
doc.: IEEE 802.15-03/139r5
Submission
Easy Manufacturability and Attractive Form Factor
• Full system can be built in CMOS technology– single chip– Die size estimated at less than 5mm2 in 0.13m CMOS
• Antenna size : expected 3cm x 3cm (printed PCB)
• Time to Market can be less than 1.5 years !
July 2003
Didier Helal and Philippe Rouzet, STMSlide 71
doc.: IEEE 802.15-03/139r5
Submission
CRITERIA REF LEVEL STM RESPONSE
General Solution Criteria
Unit Manufacturing Complexity 3.1 B + Low - Single chip solution
Signal Robustness
Interference and Susceptibility 3.2.2 A + Out-band and In-band Interferers rejected at down to 0.3 m
Coexistence 3.2.3 A + Pulse shaping or filtering
Technical Feasibility
Manufacturability 3.3.1 A + Easy - full CMOS
Time To Market 3.3.2 A + 1.5 year
Regulatory Impact 3.3.3 A + Flexible emitted pulse shape
Scalability 3.4 C + Scalable data rates, ranges and power consumption
Location awareness 3.5 C + Supported + built in “hooks”
MAC Protocol Enhancement Criteria
MAC Enhancements And Modifications 4.1 C + Compliant
July 2003
Didier Helal and Philippe Rouzet, STMSlide 72
doc.: IEEE 802.15-03/139r5
Submission
CRITERIA REF. LEVEL STM RESPONSE
PHY Protocol Criteria Size And Form Factor 5.1 B + Single Chip 5mm2
PHY-SAP Payload Bit Rate & Data Throughput
Payload Bit Rate 5.2.1 A + All rates supported up to 0.5Gbps (+Low Data Rates)
PHY-SAP Data Throughput 5.2.2 A + Short preamble and inter-frame space
Simultaneously Operating Piconets 5.3 A + Different preambles for piconets TH+polarity code division
Signal Acquisition 5.4 A + Short synchronization time (good sequence/continuous sampling)
Link Budget 5.5 A + Margin is 5.4 dB at 10m
Sensitivity 5.6 A + -77.1dBm @125Mbps+ -81.2dBm @62.5Mbps
Multi-Path Immunity 5.7 A + Channel Estimation + Matched-Filter Retrieves all energy
Power Management Modes 5.8 B + All modes supported
Power Consumption 5.9 A + Very Low. ADC already scaled for highest data-rates
Antenna Practically 5.10 B + 3cmx3cm printed
July 2003
Didier Helal and Philippe Rouzet, STMSlide 73
doc.: IEEE 802.15-03/139r5
Submission
Proposal matches all criteria
at
Very Low Cost
and
Very Low Power Consumption
Thank you for your attention
Questions are welcome…
July 2003
Didier Helal and Philippe Rouzet, STMSlide 74
doc.: IEEE 802.15-03/139r5
Submission
BACKUP SLIDES
July 2003
Didier Helal and Philippe Rouzet, STMSlide 75
doc.: IEEE 802.15-03/139r5
Submission
Monopulse Adaptive band PPM assets• Theoretical capacity is linear with BW• Per bit energy maximized (for a given datarate and spectrum
UWB interference rejection varies along with BW.PRP productGiven a modulation scheme, dref/dint ~ sqrt(BW)
• Synchronizationuse of full BW, good energy level available, short sequence possible, fine synch and channel estimation optimized joint process
• Good localization ability thanks to better channel time resolution
• Less fading issues, optimal energy capture (using infinite rake architecture)
July 2003
Didier Helal and Philippe Rouzet, STMSlide 76
doc.: IEEE 802.15-03/139r5
Submission
Monopulse Adaptive band assets
• Pulse shape (or spectrum) is not hard coded in standard • Backward compatibility between technology generations
E.g. 3.1-7GHz in 0.13um and 3.1-10.6GHz in 90nm
• Flexible data rate : PRP is easily changed• Compatibility between High and Low Data Rate devices• Complexity decreases along with data rate• Power consumption decreases with data rate
• Simulation hypothesis– Reference link is a multipath channel in CM1, CM2, CM3 or CM4.
5 channels of each CM are used (channel number 1 to 5)– Ref distance is tuned to 0.707 of the 90 % link success probability (limit
level is known from performance simulation as Eb/No for the current simulated channel, 200+ packets simulated to get the reference)
– Interferer level is set from dint simulated– independent UWB source interferers (asynchronous, full overlap)– Channel used are normalized to unit energy.– Interferer channel is a multipath channel in CM1,2,3 or 4 (5 channels of
each are used : channel number 6 to 10)– Modulation used is 2-PPM, Prp =8 ns, CR 1/2, for 125 Mbps.
4-PPM, Prp =8 ns, CR 2/3, for 250 Mbps– Simulation operation : dint is tuned to get the reference PER limit of 8%– Procedure described in 03/031r11
– Reference link is a multipath channel in CM1, CM2, CM3 or CM4 5 channels of each CM are used (channel number 1 to 5)
– Ref distance is tuned to 0.707 of the 90 % link success probability (limit level is known from performance simulation as Eb/No for the current simulated channel, 200+ packets simulated to get the reference)
– Interferer level is set from dint simulated– 2 or 3 independent UWB source interferers (asynchronous, full overlap)– Interferer channel is a multipath channel in CM1,2,3 or 4 (5 channels of each are
used for first interferer : channel number 6 to 10, channel 99 for interf 2 and channel 100 for interfer 3)
– Modulation used is 2-PPM, Prp =8 ns, CR 1/2, 125 Mbps– Simulation operation : dint is tuned to get the reference PER limit of 8%– Procedure described in 03/031r11
July 2003
Didier Helal and Philippe Rouzet, STMSlide 79
doc.: IEEE 802.15-03/139r5
Submission
Channel Estimation Algorithm• The channel response is estimated with the training sequence
• Coherent integrations (on the received pulses) reduces noise and ISI effects.
• Most of channel energy is recovered by so.
• SNR at RX is good enough to reduce PRP and to increase data rate.
• System is independent from transmitted pulse shape – No need for Pulse Template
July 2003
Didier Helal and Philippe Rouzet, STMSlide 80
doc.: IEEE 802.15-03/139r5
Submission
NPPM Correlations
APP calculations
N-PPM (number of Pulse positions) soft values corresponding to each PPM position at Pulse Repetition Frequency.
Channel estimation
RF DeinterleavingBL=BTC/C
depuncture channel decoder
(Turbo decoder or Viterbi decoder)
channel decoding architecture
descrambling
Uncorrelates bit errors at the input of the decoder :C=code rateBTC=Turbo code block length.
Adds scalability
demapping and soft A priori per bit Probability calculations.
July 2003
Didier Helal and Philippe Rouzet, STMSlide 81
doc.: IEEE 802.15-03/139r5
Submission
Turbo code
• Latency is mainly due to the storage of one block into the channel de-interleaver.
@110Mbps: 512/110e6~5us.@ 55Mbps: 512/55e6=10us.
• Complexity: – RAM: 50 000 bits.– ~500 kGates
July 2003
Didier Helal and Philippe Rouzet, STMSlide 82
doc.: IEEE 802.15-03/139r5
Submission
Performance Indicators
• False Alarm probability (PFA): a preamble is detected where there is none
A target PFA ~ 10-4 is assumed
• Missed Detection probability (PMD): the preamble is not detected
A target PMD ~ 10-4 is assumed
• Beacon training sequence length ~ overhead percentage ~ synchronization time
Hypotheses• No clock jitter present• No clock drift present• Send at max power allowed by FCC
• First step: Preamble Detection- Goal: search sequentially one sequence among 20 possible.
- Done over the first 80 repetitions of the QCH sequence.
- If piconet present and SNR >~ -3.7dB: Integration over 2 repetitions of the QCH sequence is enough. Sequence will be detected within 30 ms (at worst, 4 superframe beacons necessary).
- If piconet present but bad radio conditions: possibility to combine 3 or more QCH sequences to achieve detection.
• Second step: Alignment- Goal: find end of beacon preamble.
- Done with aid of EOBP signature. Try to correlate with last 5 replicas of the beacon preamble: [+1 +1 –1 –1 +1].
Coarse Sync: Timeline
July 2003
Didier Helal and Philippe Rouzet, STMSlide 84
doc.: IEEE 802.15-03/139r5
Submission
RX front-end
NF = 6.3dB
ADC1-bit
Eb/N0 = 8.1 dB
SNR2 = (Rb /B)*(Eb/N0 ) = -6.8dB
SNR1 = SNR2 + NF = -0.5dB
Coarse Synch at 110 Mb/s at 10m
• Demodulation requires Eb/N0 = 8.1dB (best case), without interferers
Dimension acquisition sequence length accordingly• Acquisition needs to be more robust require 3dB margin• 3 dB enough to cope with one interfering piconet at 1.4 meters minimum SNR for acquisition: -3.5dB• Simulations, without jitter, without interference, PRP = 8 ns
25 ppm clock drift represent drift of 0.63 samples
50 ppm clock drift represent drift of 1.26 samples
Before coarse synchronization, no information available regarding clock drift. Hereunder, we investigate the effect of clock drift on the coarse synchronization performances:
Low order modulation preferred to minimize gate count/costfor low data-rate devices
July 2003
Didier Helal and Philippe Rouzet, STMSlide 94
doc.: IEEE 802.15-03/139r5
Submission
Pulse Repetition Period at 200Mb/s
Nbit/Pulse 1 2 3 4 5Modulation POL 2PPM
POL4PPM POL
8PPM POL
16PPM POL
CR = 1/3 1.65 3.3 5 6.65 8.3
CR = 1/2 2.5 5 7.45 10 12.45
CR = 2/3 3.3 6.65 10 13.3 16.65
CR = 3/4 3.7 7.45 11.25 14.95 18.7
CR = 7/8 4.35 8.75 13.1 17.5 21.85
CR = 1 5 10 15 20 24.95
CR = Code Rate All PRP values in nanosecond
Low order modulation preferred to enableintermediate data-rate devices
July 2003
Didier Helal and Philippe Rouzet, STMSlide 95
doc.: IEEE 802.15-03/139r5
Submission
Pulse Repetition Period at 480Mb/s
CR = Code Rate All PRP values in nanosecond
Nbit/Pulse 1 2 3 4 5Modulation POL 2PPM
POL4PPM POL
8PPM POL
16PPM POL
CR = 1/3 0.65 1.35 2.05 2.75 3.45
CR = 1/2 1 2.05 3.1 4.15 5.2
CR = 2/3 1.35 2.75 4.15 5.55 6.9
CR = 3/4 1.55 3.1 4.65 6.2 7.8
CR = 7/8 1.8 3.6 5.45 7.25 9.1
CR = 1 2.05 4.15 6.2 8.3 10.4
Larger PRP preferred to avoid too small inter-position delay !
July 2003
Didier Helal and Philippe Rouzet, STMSlide 96
doc.: IEEE 802.15-03/139r5
Submission
Pulse Repetition Period at 1Gb/s
CR = Code Rate All PRP values in nanosecond
Nbit/Pulse 1 2 3 4 5Modulation POL 2PPM
POL4PPM POL
8PPM POL
16PPM POL
CR = 1/3 0.3 0.65 1 1.3 1.65
CR = 1/2 0.5 1 1.5 2 2.5
CR = 2/3 0.65 1.3 2 2.65 3.3
CR = 3/4 0.75 1.5 2.2 3 3.7
CR = 7/8 0.8 1.75 2.6 3.5 4.35
CR = 1 1 2 3 4 5
Larger PRP preferred to avoid too small inter-position delay in PPM
July 2003
Didier Helal and Philippe Rouzet, STMSlide 97
doc.: IEEE 802.15-03/139r5
Submission
Manufacturability
• Architecture matches full CMOS implementation– Low cost, single chip product– Using today’s silicon technology
• Simulation proven hardware architecture– SystemC model used (synthesized model available)– Performance and gate complexity estimated from chipset and FPGA
implementation• Demonstrator in development
– 0.13 m CMOS technology • Size and form factor
– Single chip silicon allows small size like PC card, memory stick, …, and would be usable in portable devices
July 2003
Didier Helal and Philippe Rouzet, STMSlide 98
doc.: IEEE 802.15-03/139r5
Submission
Power consumption
• Low power architecture– Minimum RF front end (low power with respect to
alternative architecture)– Demodulation processed in digital– Channel estimation gates (~2/3 of demodulation
count) used only during frame preamble (<10% of time)
– Typical clock frequency is 1/PRP (only RF front end is high speed)
– Digital power consumption will scale as Moore’s law in future technology
July 2003
Didier Helal and Philippe Rouzet, STMSlide 99
doc.: IEEE 802.15-03/139r5
Submission
Scalability
• Low data rate (LDR) permits lower power, lower complexity– Channel estimation power cost can be reduced for low
data rate (need less path, and shorter sequence)– Simple modulation (polarity) compatible with HDR
devices• High data rate scalable easily
– ST expect data rate of up to 750 Mbps shortly– 1 Gbps theoretically possible for high-end products
July 2003
Didier Helal and Philippe Rouzet, STMSlide 100
doc.: IEEE 802.15-03/139r5
Submission
Location awareness
• Relative location (distance between stations) available at almost no cost– Thanks to channel estimation principle
• 2 performance levels possible (implementor choice)– A few decimeters accuracy (simple processing)– A few centimeters accuracy (signal processing of
estimated channel)– Minimal additional hooks in 802.15.3 MAC
July 2003
Didier Helal and Philippe Rouzet, STMSlide 101
doc.: IEEE 802.15-03/139r5
Submission
Multipath Immunity
• Channel estimation principle allows capture of most received energy – Equivalent to infinite rake architecture
• Excellent performance in worst multipath environment• Pulse shape/spectrum independent
– The receiver architecture don’t need a-priori knowledge on pulse shape (this is why it is so easy to match specific regulation)
– Dense multi-path channel with overlapping pulses don’t degrade performance
July 2003
Didier Helal and Philippe Rouzet, STMSlide 102
doc.: IEEE 802.15-03/139r5
Submission
Slotted CAP• CAP period is divided into slots with well-defined slot beginning
– beacon defines CAP duration as well as each slot duration (e.g 10μs)• Transmitter (Tx) sends frame at the beginning of the slot • Devices consume power to perform CCA (6μs preamble detection) only at the beginning of the
slot – 20ns is uncertainty of frame arrival (thus insured less power consumption than in the case
when the frame can arrive anywhere in 10μs slot assuming STM implementation choices)• Tx receives feedback about frame transmission by means of Imm-ACK• If frame is to be retransmitted, Tx sends frame in randomly selected slot (using a backoff
mechanism)
20ns 20ns 20ns 20ns 20ns
10μs 10μs 10μs 10μs
…
Slotted CAP
July 2003
Didier Helal and Philippe Rouzet, STMSlide 103
doc.: IEEE 802.15-03/139r5
Submission
CCA by preamble detection (optional)
• No assumption on frame start• Frame preamble tuning needed for CCA
– Preamble still periodic but with shorter sequences (allows continuous correlation without additional H/W for coarse synch.)
– Preamble includes both coarse and fine synchronization (~10μs)
• Power consumption : same as channel estimation phase (during all CCA period of activity)
July 2003
Didier Helal and Philippe Rouzet, STMSlide 104
doc.: IEEE 802.15-03/139r5
Submission
Out-of-band rejection filter
• Proposed: use elliptic filter with poles placed at known out-of-band interferers.
e.g. BP 3rd order with pole at 2.45GHz
July 2003
Didier Helal and Philippe Rouzet, STMSlide 105
doc.: IEEE 802.15-03/139r5
Submission
Comparison on different pulse shapes
Pulse BW = 3.2-7.3 GHz
At 110Mbps, with CM1, the impact of the Notch filter is minor :
0.5 dB on min Eb/No
0.3 dB on the receiver noise figure.
Monopulse Adaptive band PPM-UWB system easily accommodates regulation impact on pulse shape
July 2003
Didier Helal and Philippe Rouzet, STMSlide 106
doc.: IEEE 802.15-03/139r5
Submission
How does a 1-bit sampling system support interferers ?
0 1000 2000 3000 4000 5000 6000 7000-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
ampl
itude
sample
SIR = -10dB
blockersignal
800 900 1000 1100 1200 1300 1400 1500 1600 1700
-60
-40
-20
0
20
40
60
SIR
loca
l (dB
)sample
zoom of fig3
UWB Signal (red curve) and 802.11a type interferer (blue curve)
Let’s call Local Signal-to-Interferer Ratio (LSIR), the ratio between the amplitude of the signal S and the amplitude of the interferer I at a specific instant.
LSIR>0dB => S+I sample has same sign has S
Even at low SIR, there still are many samples that hold a non-corrupted information.
