ECE 447 Fall 2009

Lecture 5: TI MSP430

Software Development in C and Assembly pt. 2

Agenda

• Logic Instructions

• Arithmetic Instructions

• Signed Operations

• Status Register Instructions

• Flow Control Instructions

• Jump Instructions

ECE447: Logic Instructions (One Operand)

• Invert Instruction

• 1’s complement of the destination.

• It is emulated with the xor instruction.

ECE447: Logic Instructions (Two Operands)

• BIC and BIS do NOT modify the status bits.

• XOR, AND, & BIT modify the status bits.

ECE447: Byte Order (Big/Little Endian)

• Endianness is the byte ordering used to represent data in a computer system.

• Byte order is an important consideration in network programming, since two computers with different byte orders may be communicating.

• Failure to account for varying endianness when writing code for mixed platforms can lead to bugs that can be difficult to detect.

ECE447: Byte Swap Instruction (swpb)

Only operates on 16-bit operands.

ECE447: Rotations and Shifts

• MSP430 has arithmetic shift and rotation, but no logical shift right.

• Logical shift right was added to the MSP430X, discussed later.

ECE447: Arithmetic Instructions (One Operand)

• Notice all one-operand Arithmetic instructions are emulated.

• CLR does not affect the SR flags, including Z(ero)

ECE447: Arithmetic Instructions (Two Operands)

ECE447: Arithmetic Instructions (Decimal)

• Instructions to allow manipulation of operands that are in binary coded decimal (BCD) format.

• Value of each nibble is limited to 0 to 9, instead of 0 to F.

• Eg: Useful for display of a clock application on the LCD.

ECE447: Signed vs. Unsigned

Unsigned number

Signed number

B = b7 b6 b5 b4 b3 b2 b1 b0

B = b7 b6 b5 b4 b3 b2 b1 b0

128 64 32 16 8 4 2 1weights

weights -128 64 32 16 8 4 2 1

B = b020 + b121 + b222 + b323 + b424 + b525 + b626 + b727 = bi2ii=0

7

B = b020 + b121 + b222 + b323 + b424 + b525 + b626 - b727 = - b727 + bi2ii=0

6

ECE447: 2’s Complement Representation

-8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Xk=4

X>0 0 X<0

X+2k = X+10

ECE447: Unsigned vs. Signed Addition

Machine Programmer

0 0 0 1 0 0 1 11 0 0 0 0 1 0 11 0 0 1 1 0 0 0

111

Unsignedmind

Signedmind128 64 32 16 8 4 2 1weight

carry

XYS

+

=

FA

x0 y0

s0

c1

FA

x1 y1

s1

c2

FA

x2 y2

s2

c3

FA

x3 y3

s3

c4FA

x4 y4

s4

c5

FA

x5 y5

s5

c6

FA

x6 y6

s6

c7

FA

x7 y7

s7

c8

19

+ 133

152

19

- 123

104

+/-

FA: Full Adder

ECE447: Overflow of Signed Numbers

Indication of overflow

Positive+ Positive= Negative

Negative+ Negative= Positive

Formulas

Overflow2’s complement = xk-1 yk-1 sk-1 + xk-1 yk-1 sk-1

ECE447: Status Register Flags

• V - Overflow bit, set if the result of an operations has overflowed even if a carry is not generated, typically in the case of signed values.

• N - Negative flag, set to the msb of the result• Z - Zero flag, set if the result of an operation is

zero.• C - Carry flag represents that an overflow has

occurred in an operation and that the bit should be “carried” into the next more significant byte/word.

ECE447: Status Register Instructions

• Each of the SR instructions is emulated with BIS or BIC an immediate value, supplied by either CG1 or CG2.

• EINT and DINT enable and disable maskable interrupts.

ECE447: Sign Extension Instruction

• Sign extend an 8 bit number to a word length (16 or 20 bit) number.

• In register mode this will be to bit 15 in the MSP430, or bit 19 in the MSP430X.

• In all other addressing modes it extends to bit 15.

ECE447: Branch/Call/nop Instructions

• BR and NOP are emulated instructions.• BR is a one-way operation, since the PC is not

stored. (ie: you cannot return)• CALL cannot be emulated since the stack

operations must be coded into the operation.

ECE447: Return, Return from Interrupt

• RET is emulated and uses the auto-increment addressing mode to handle the stack pointer manipulation

• RETI is not emulated use to its manipulation of the SR register on the stack.

• PUSH places a word or byte on the stack and decrements the SP value by 2. Note: Pushing a byte on the stack still takes a word (16-bits) of space on the stack. This is done to assure alignment.

• POP is emulated since the autoincrement addressing mode can handle that stack pointer manipulation.

ECE447: Move/Stack Instructions

Example of Push/Pop

ECE447: Jump Instructions (1)

• JMP, is the simplest unconditional jump.

• All jump instructions are relative, so the range is limited.

• BR is not relative and can go anywhere in the address space, but is slower, and longer

ECE447: Jump Instructions (2)

• Conditional jumps operate with the SR flags from the last operation that affected the bits. (ie:CMP, ADD, INC…)

• Some jump instructions have two names for more concise usage in programming, however they produce identical machine code.

ECE447: MSP430X Instruction Extensions

• MSP430X required instruction changes to support the 20 bit address space.

• Handling 20 bit data, typically when computing addresses.

• 20-bit constants are needed to compute the addresses of the operands.

• MSP430X extended instructions are distinguished by an ‘x’ appended to the mnemonic. (ie: add -> addx)

• Address specific instructions are appended with an ‘a’ (ie: add -> adda)

• A few new instructions were added to the MSP430X for improved performance or function.

• Read: Ch 11.2 in Davies p607 for details.

ECE447: MSP430X Instruction Extensions

• Same function as MSP430 instructions, but to support 20 bit operands. NOTE: 16 bit instructions CAN be used on the MSP430X when 20-bit modes is not necessary.

ECE447: MSP430X Instruction Extensions

• New instructions POPM, PUSHM, allowing multiple items to be pushed/popped from the stack.

• New Multiple shifts instructions, rrcm, rrum, rram, rlam.

• Logical shift right is added, named rotate right unsigned, rrux

Summary

• Logic Instructions

• Arithmetic Instructions

• Signed Operations

• Status Register Instructions

• Flow Control Instructions

• Jump Instructions