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1ECE 667 Synthesis & Verification - BDD
ECE 667ECE 667
Synthesis and Verificationof Digital Systems
Binary Decision DiagramsBinary Decision Diagrams
(BDD)(BDD)
ECE 667 Synthesis & Verification - BDD 2
OutlineOutline
• Background– Canonical representations
• BDD’s– Reduction rules– Construction of BDD’s– Logic manipulation of BDD’s– Application to verification and SAT
• Reading:
read one of the BDD tutorials available on class web site
– Anderson, or– Somenzi
ECE 667 Synthesis & Verification - BDD 3
Common RepresentationsCommon Representations
• Boolean functions ( f : B B )– Truth table, Karnaugh map– SoP, PoS, ESoP– Reed-Muller expansions (XOR-based)– Decision diagrams (BDD, ZDD, etc.)
• Each minimal, canonical representation is characterized by– Decomposition type
• Shannon, Davio, moment decomposition, Taylor exp., etc.– Reduction rules
• Redundant nodes, isomorphic sub-graphs, etc.– Composition method (“Apply”, compose rule)
• What they represent– Boolean functions (f : B B)
– Arithmetic functions (f : B Int )
– Algebraic expressions (f : Int Int )
ECE 667 Synthesis & Verification - BDD 4
Binary Decision Diagrams (Binary Decision Diagrams (BDDBDD))
• Based on recursive Shannon expansion
f = x fx + x’ fx’
• Compact data structure for Boolean logic– can represents sets of objects (states) encoded as Boolean
functions
• Canonical representation– reduced ordered BDDs (ROBDD) are canonical– essential for verification
ECE 667 Synthesis & Verification - BDD 5
ROBDD’sROBDD’s
• Directed acyclic graph (DAG)• One root node, two terminal nodes 0, 1 (sinks)• Each node has exactly two children, associated with a variable• Shannon co-factoring tree, except reduced and ordered
(ROBDD)– Reduced:
• any node with two identical children is removed• two nodes with isomorphic BDD’s are merged
– Ordered: • Co-factoring variables (splitting variables) always follow
the same order along all paths
xi1 < xi2
< xi3 < … < xin
ECE 667 Synthesis & Verification - BDD 6
BDD ExampleBDD Example
Two different orderings, same function.
f = ab+a’c+bc’d
1
0
a
b b
c c
d
0 1
c+bd b
Root node
c+dc
d
a
c
d
b
0 1
c+bd
d*b
b
ECE 667 Synthesis & Verification - BDD 7
ROBDDROBDD
Ordered BDD (OBDD): Input variables are ordered - each path from root to sink visits nodes with labels (variables) in the same order.
ordered {a,c,b}
Reduced Ordered BDD (ROBDD) - reduction rules:– if the two children of a node are the same, the node is eliminated:
f = v f + v’ f– if two nodes have isomorphic graphs, they are replaced by one of them
These two rules make it so that each node represents a distinct logic function.
not ordereda
b c
c
0 1
b
a
c c
b
0 1
Not reduced !
ECE 667 Synthesis & Verification - BDD 8
Efficient Implementation of BDD’sEfficient Implementation of BDD’s
• BDDs is a compressed Shannon co-factoring tree:
• f = v fv + v fv
• leafs are constants “0” and “1”
• Three components make ROBDDs canonical (Proof: Bryant 1986):
– unique nodes for constant “0” and “1”
– identical order along each path
– hash table that ensures:
• (node(fv) = node(gv)) (node(fv) = node(gv)) node(f) = node(g)
– provides recursive argument that node(f) is unique when using the unique hash-table
v0 1
f
fv fv
ECE 667 Synthesis & Verification - BDD 9
Onset is Given by all Paths to “1”Onset is Given by all Paths to “1”
Notes:• By tracing paths to the 1 node, we get a cover of pairwise disjoint cubes.• The power of the BDD representation is that it does not explicitly enumerate all
paths; rather it represents paths by a graph whose size is measured by the number of the nodes, and not paths.
• A DAG can represent an exponential number of paths with a linear size (number of nodes) in terms of its variables.
• BDDs can be used to efficiently represent sets– interpret elements of the onset as elements of the set– f is called the characteristic function of that set
F = b’+a’c’ = ab’+a’cb’+a’c’ BDD encodes all paths to the 1 node
a
cb
0 1
10
1
10
0
f
fa= b’fa = cb’+c’
ECE 667 Synthesis & Verification - BDD 10
ImplementationImplementation• Variables are totally ordered:
If v < w then v occurs “higher” up in the ROBDDTop variable of a function f is a variable associated with its root node.
a
b
0 1
f b is top variable of f
b
0 1
f
reduced
Reduction (redundant node)
fa = b, fa = bf does not depend on a
since fa = fa .
vf
0 1
h g
1 0f
v
g h
MUX
v is top variable of f
• Each node is written as a triple: f = (v,g,h), where g = fv and h = fv . We read this triple as:
f = if v then g else h = ite (v,g,h) = vg+v ’ h
ECE 667 Synthesis & Verification - BDD 11
BDD Construction – naïve wayBDD Construction – naïve way• Reduced Ordered BDDReduced Ordered BDD
1 edge
0 edgea b c f
0 0 0 00 0 1 00 1 0 00 1 1 11 0 0 01 0 1 11 1 0 01 1 1 1
Truth table
f = ac + bc
Decision tree
10 0 0 1 0 10
a
b
c
b
c c c
f
ECE 667 Synthesis & Verification - BDD 12
BDD Reduction Rules -1BDD Reduction Rules -1
• Eliminate redundant nodes Eliminate redundant nodes
(with both edges pointing to same node)(with both edges pointing to same node)
f = a g(b) + a’ g(b) = g(b)b
g
a
b
f
g
ECE 667 Synthesis & Verification - BDD 13
BDD Reduction Rules -2BDD Reduction Rules -2
• Merge duplicate nodes (Merge duplicate nodes (isomorphicisomorphic subgraphs) subgraphs)
• Nodes must be unique
f1 = fa’ g(b) + fa h(c) = f2 f = f1 = f2
a a
b chg
f1 f2
a
b cg h
f
ECE 667 Synthesis & Verification - BDD 14
BDD Construction – cont’dBDD Construction – cont’d
10
a
b
c
b
c c c
f f
10
a
b
c
b
c
10
a
b
c
f = (a+b)c
2. Merge duplicate nodes
1. Merge terminal nodes 3. Remove redundant nodes
ECE 667 Synthesis & Verification - BDD 15
BDD Construction – the right wayBDD Construction – the right way
f = (a + b) c
ECE 667 Synthesis & Verification - BDD 16
Logic Manipulation using BDDsLogic Manipulation using BDDs
Useful operatorsUseful operators
– Complement ¬ F = F’
(switch the terminal nodes)
– Restrict: F|x=b = F(x=b) where b = const
0 1
F(x,y)
x=b 0 1
F(y)Restrict
• To restrict variable x to 1, reconnect all
incoming edges to nodes x to their 1-nodes
• To restrict variable x to 0, reconnect all
incoming edges to nodes x to their 0-nodes
¬
1 00 1
F F’
– Complement ¬ F = F’
(switch the terminal nodes)
– Restrict: F|x=b = F(x=b) where b = const
0 1
F(x,y)
x=b 0 1
F(y)Restrict
• To restrict variable x to 1, reconnect all
incoming edges to nodes x to their 1-nodes
• To restrict variable x to 0, reconnect all
incoming edges to nodes x to their 0-nodes
ECE 667 Synthesis & Verification - BDD 17
RestrictRestrict Operator ( Operator ( f (c=0, d=1) ) )
f = (a+d)(b+c)+a’d’bc
Set c = 0 Set d = 1
10
a
d
b
c
b
c
10
a
d
bb
c
10
a
bb
cd
fc’ = (a+d)b
Restricted BDD
fc’d= (a+1)b = b
1
b
0
fc’d = b
Original BDD
ECE 667 Synthesis & Verification - BDD 18
Useful BDD Operators – Apply OperationUseful BDD Operators – Apply Operation
• Basic operator for efficient BDD manipulation (structural)• Based on recursive Shannon expansion
F <op> G = x (Fx <op> Gx) + x’(Fx’ <op> Gx’)
where <op> = binary operations: OR, AND, XOR, etc
ECE 667 Synthesis & Verification - BDD 19
APPLYAPPLY Operator Operator
• Useful in constructing BDD for arbitrary Boolean logic
• Any logic operation can be expressed using Apply (ITE)
• Efficient algorithms, work directly on BDD graphs
• Apply: F G, Apply: F G, any Boolean operationany Boolean operation((AND, OR, XOR, AND, OR, XOR, ))
=
F G
0 1 0 10 1
F G
ECE 667 Synthesis & Verification - BDD 20
Apply Operation (cont’d)Apply Operation (cont’d)
• Apply: F GApply: F Gwhere stands for any Boolean operator (AND, OR, XOR, etc)where stands for any Boolean operator (AND, OR, XOR, etc)
=
F G
0 1 0 10 1
F G
• Any logic operation can be expressed using only Restrict and Apply
• Efficient algorithms, work directly on BDDs
• Apply can be used to construct a BDD bottom-up• From primary inputs, through internal logic gates, to output
• Apply: F GApply: F Gwhere stands for any Boolean operator (AND, OR, XOR, etc)where stands for any Boolean operator (AND, OR, XOR, etc)
ECE 667 Synthesis & Verification - BDD 21
Apply Operation - Apply Operation - ANDAND
10
a
c
aca AND c
10
a 2
c
10
3
03
2.3a
c1.3
1110
AND
= =
F G = x (Fx Gx) + x’(Fx’ Gx’)
ECE 667 Synthesis & Verification - BDD 22
Apply Operation - Apply Operation - OROR
OR
ac
10
a
c
4
5
bc
10
b
c
6
7 ==
10
a
b
c
f = ac+bc
c
4+6
0+0
a
7+5
1
0+6 b6+5
0+5
0
0+7
F + G = x (Fx + Gx) + x’(Fx’ +Gx’)
ECE 667 Synthesis & Verification - BDD 23
Application to VerificationApplication to Verification
• Equivalence Checking of combinational circuits• Canonicity property of BDDs:
– if F and G are equivalent, their BDDs are identical (for the same ordering of variables)
10
a
b
c
F = a’bc + abc +ab’c G = ac +bc
10
a
b
c
ECE 667 Synthesis & Verification - BDD 24
Application to SATApplication to SAT
• Functional test generation– SAT, Boolean satisfiability
analysis
– to test for H = 1 (0), find a path in the BDD to terminal 1 (0)
– the path, expressed in function variables, gives a satisfying solution (test vector) ab
ab’c
H
0 1
a
b
c
• Problem: size explosion
ECE 667 Synthesis & Verification - BDD 25
Efficient Implementation of BDD’sEfficient Implementation of BDD’s
Unique Table: key = (v,G,H), where F = ITE(v,G,H).• avoids duplication of existing nodes
– Hash-Table: hash-function(key) = value– identical to the use of a hash-table in AND/INVERTER circuits
hash valueof key
collisionchain
hash valueof key
No collision chain
Computed Table: key = (F,G,H)
• avoids re-computation of existing results
ECE 667 Synthesis & Verification - BDD 26
Unique Table - Hash TableUnique Table - Hash Table
• Before a node (v, g, h ) is added to BDD data base, it is looked up in the “unique-table”. If it is there, then existing pointer to node is used to represent the logic function. Otherwise, a new node is added to the unique-table and the new pointer returned.
• Thus a strong canonical form is maintained. The node for f = (v, g, h ) exists iff(v, g, h ) is in the unique-table. There is only one pointer for (v, g, h ) and that is the address to the unique-table entry.
• Unique-table allows single multi-rooted DAG to represent all users’ functions:
hash indexof key
collisionchain
ECE 667 Synthesis & Verification - BDD 27
Computed TableComputed TableKeep a record of (F, G, H ) triplets already computed by the ITE operator
– software cache ( “cache” table)
– simply hash-table without collision chain (lossy cache)
ECE 667 Synthesis & Verification - BDD 28
Extension - Complement EdgesExtension - Complement Edges
Combine inverted functions by using complemented edge– similar to circuit case– reduces memory requirements– BUT MORE IMPORTANT:
• makes some operations more efficient (NOT, ITE)
0 1
G Gonly one DAGusing complementpointer
0 1
G
0 1
G
two differentDAGs
ECE 667 Synthesis & Verification - BDD 29
Extension - Complement EdgesExtension - Complement Edges
To maintain strong canonical form, need to resolve 4 equivalences:
VV VV VV VV
VV VV VV VV
Solution: Always choose one on left, i.e. the “then” leg must have no complement edge.