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11-1 EE105 – Fall 2015 Microelectronic Devices and Circuits Prof. Ming C. Wu [email protected] 511 Sutardja Dai Hall (SDH)
11-1
EE105 – Fall 2015Microelectronic Devices and Circuits
Prof. Ming C. Wu
511 Sutardja Dai Hall (SDH)
11-2
One-Port Models (EECS 16A)
• A terminal pair across which a voltage and associated current are defined
CircuitBlockabv
+
-
abi
thevv
thevR
abv+
-
abi
thevithevRabv+
-
abi
11-3
Small-Signal Two-Port Models
• We assume that input port is linear and that the amplifier is unilateral: – Output depends on input – But input is independent of output.
• Output port: depends linearly on the current and voltage at the input and output ports
• Unilateral assumption is good as long as “overlap” capacitance is small (MOS)
inv+
-outv+
-
outiini
11-4
Two-Port Small-Signal Amplifiers
si sR inR outR LRi inA i
ini
sv
sR
inR
outR
LRv inA vinv+
-
Current Amplifier
Voltage Amplifier
11-5
Two-Port Small-Signal Amplifiers
sv
sR
inR outR LRm inG vinv+
-
si sR inR
outR
LRm inR i
ini
Transresistance Amplifier
Transconductance Amplifier
11-6
Input Impedance Zin
• Looks like a Thevenin resistance measurement, but note that the output port has the load resistance attached
Zin =vxix ZSremoved ,
ZLattached
11-7
Output Impedance Zout
• Looks like a Thevenin resistance measurement, but note that the input port has the source resistance attached
Zout =vxix ZLremoved ,
ZSattached
11-8
Single-Stage Amplifier Types
Common Source (CS)
Common Gate (CG)
Common Drain (CD)
11-9
Common Gate (CG) Amplifier
DC bias:
ISUP = IQ = IDS
11-10
Common Gate AC Model
11-11
Common Gate Small Signal
11-12
CG as a Current Amplifier: Find Ai
iout = id = −is
1iA = -
11-13
CG Input Resistance
At input:
Output voltage:
it = −gmvgs +vt − voutro
⎛
⎝⎜⎜
⎞
⎠⎟⎟
vout = −id (RD || RL ) = it (RD || RL )
it = gmvt +vt − RD || RL( )it
ro
⎛
⎝
⎜⎜
⎞
⎠
⎟⎟
vt
it
vout
11-14
Approximations…
• We have this messy result
• But we don’t need that much precision. Let’s start approximating:
1Rin
=itvt=
gm +1ro
1+ RD || RLro
gm >>1ro
RD || RL ≈ RL 0L
o
Rr»
Rin =1gm
11-15
CG Output Resistance
vtit
vsRS
− gmvgs +vs − vtro
= 0
vs1RS
+ gm +1ro
⎛
⎝⎜⎜
⎞
⎠⎟⎟=vtro
11-16
CG Output Resistance
Substituting vs = itRS
itRS1RS
+ gm +1ro
⎛
⎝⎜⎜
⎞
⎠⎟⎟=vtro
The output resistance is (vt / it)||RD
Rout = RD || RSroRS
+ gmro +1⎛
⎝⎜⎜
⎞
⎠⎟⎟
⎛
⎝⎜⎜
⎞
⎠⎟⎟
Rout = RD || ro + gmroRS + RS( )
11-17
Approximating the CG Rout
The exact result is complicated, so let’s try tomake it simpler:
Sgm µ500» W» kro 200
Rout ≅ RD || [ro + gmroRS + RS ]
Assuming the source resistance is less than ro,
Rout ≈ RD || [ro + gmroRS ]= RD || [ro(1+ gmRS )]
11-18
CG Two-Port Model
• Function: a current buffer– Low Input Impedance– High Output Impedance
11-19
Common Gate as a “V Amplifier”
11-20
Common-Drain Amplifier
21 ( )2DS ox GS T
WI C V VL
µ= -
2 DSGS T
ox
IV V WCL
µ= +
Weak IDS dependence
vin
11-21
Common Drain AC Schematic
vin
11-22
CD Voltage Gain
RL
Note vgs = vin – voutvoutRL || ro
= gmvgs
voutRL || ro
= gm vin − vout( )
vin
11-23
CD Voltage Gain (Cont.)
KCL at source node:
Voltage gain:
1RL || ro
+ gm⎛
⎝⎜⎜
⎞
⎠⎟⎟vout = gmvin
voutvin
=gm1
RL || ro+ gm
voutvin
≈gm
1/ RL + gm≈1
voutRL || ro
= gm vin − vout( )
11-24
CD Output Resistance
Sum currents at output (source) node:
RL
Rout = ro || RL ||vxix
ix = gmvx Rout ≈1gm
11-25
CD Output Resistance (Cont.)
• Function: a voltage buffer– High Input Impedance– Low Output Impedance
𝒓𝒓𝒐𝒐||𝑹𝑹𝑳𝑳 << 𝟏𝟏𝒈𝒈𝒎𝒎 ⟹ Ignore 𝒓𝒓𝒐𝒐||𝑹𝑹𝑳𝑳
11-26
Transistor Amplifiers àà Gm/V/I
Gm AmplifierCommon Source
I-BufferCommon Gate
V-BufferSource Follower
