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EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs &...

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EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs
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Page 1: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

EE365Adv. Digital Circuit Design

Clarkson University

Lecture #8

Buffers, Drivers, Encoders, MUXs & XORs

Page 2: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Topics

• Buffers

• Drivers

• Encoders

• Multiplexers

• Exclusive OR Gates

Rissacher EE365Lect #8

Page 3: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Three-state buffers• Output = LOW, HIGH, or Hi-Z.

• Can tie multiple outputs together, if at most one at a time is driven.

Rissacher EE365Lect #8

Page 4: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Different flavors

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Page 5: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Rissacher EE365Lect #8

Page 6: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Timing considerations

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Page 7: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Three-state drivers

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Page 8: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Driver application

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Page 9: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Three-state transceiver

Rissacher EE365Lect #8

Page 10: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Transceiver application

Rissacher EE365Lect #8

Page 11: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Encoders vs. Decoders

Decoder Encoder

Rissacher EE365Lect #8

Page 12: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Binary encoders

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Page 13: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Need priority in most applications

Rissacher EE365Lect #8

Page 14: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

8-input priority encoder

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Page 15: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Priority-encoder logic equations

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Page 16: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

74x148 8-input priority encoder

– Active-low I/O– Enable Input– “Got Something”– Enable Output

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Page 17: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

74x148circuit

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Page 18: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

74x148 Truth Table

Rissacher EE365Lect #8

Page 19: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

In Class Practice Problem

Write the truth table for a 4-to-2 encoder:

• No enables

• Active High inputs and outputs

Rissacher EE365Lect #8

Page 20: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

In Class Practice Problem

Rissacher EE365Lect #8

Page 21: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Cascading priority

encoders

• 32-inputpriority encoder

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Page 22: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Constant expressions

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Page 23: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Outputs

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Page 24: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Alternative formulation

• WHEN is very natural for priority function

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Page 25: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Multiplexers

Rissacher EE365Lect #8

Page 26: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

74x1518-input

multiplexer

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Page 27: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

74x151 truth table

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Page 28: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

CMOS transmission gates

• 2-input multiplexer

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Page 29: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Other multiplexer varieties• 2-input, 4-bit-wide

– 74x157

• 4-input, 2-bit-wide– 74x153

Rissacher EE365Lect #8

Page 30: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

In Class Practice Problem

Write the truth table for a 1-to-4 line Multiplexer:

• No enables

• Active High inputs and outputs

Rissacher EE365Lect #8

Page 31: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

In Class Practice Problem

Rissacher EE365Lect #8

Page 32: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Barrel shifter design example

• n data inputs, n data outputs• Control inputs specify number of

positions to rotate or shift data inputs• Example: n = 16

– DIN[15:0], DOUT[15:0], S[3:0] (shift amount)

• Many possible solutions, all based on multiplexers

Rissacher EE365Lect #8

Page 33: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

16 16-to-1 MUXs

16-to-1 mux = 2 x 74x151 8-to-1 mux + NAND gate

Rissacher EE365Lect #8

Page 34: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

4 16-bit 2-to-1 MUXs

16-bit 2-to-1 mux = 4 x 74x157 4-bit 2-to-1 mux

Rissacher EE365Lect #8

Page 35: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Properties of different approaches

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Page 36: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

2-input XOR gates• Like an OR gate, but excludes the case

where both inputs are 1.

• XNOR: complement of XOR

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Page 37: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

XOR and XNOR symbols

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Page 38: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Gate-level XOR circuits• No direct realization with just a few

transistors.

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Page 39: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

CMOS XOR with transmission gates

IF B==1 THEN Z = !A;ELSE Z = A;

Rissacher EE365Lect #8

Page 40: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Multi-input XOR• Sum modulo 2• Parity computation

• Used to generate and check parity bits in computer systems.– Detects any single-bit error

Rissacher EE365Lect #8

Page 41: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Parity tree

• Faster with balanced tree structure

Rissacher EE365Lect #8

Page 42: EE365 Adv. Digital Circuit Design Clarkson University Lecture #8 Buffers, Drivers, Encoders, MUXs & XORs.

Next time

• Comparators

• Adders

• Multipliers

• Read-only memories (ROMs)

Rissacher EE365Lect #8


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