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EE434 ASIC & Digital Systems
Partha Pande School of EECS Washington State University [email protected]
Spring 2015 Dae Hyun Kim
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Lecture 8
Interconnect
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Interconnect Layers
Intel 65nm (IEDMβ04) Intel 45nm (IEDMβ07)
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Interconnect Layers
Intel 32nm (IEDMβ08) Intel 22nm (IEDMβ12)
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Interconnect Layers
TSMC 16nm FinFET (IEDMβ13)
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Interconnect Layers
IBM 14nm FinFET (IEDMβ14) Intel 14nm FinFET (IEDMβ14)
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Interconnect Analysis
β’ Resistance
β’ Capacitance
β’ Delay calculation
β’ Coupling
β’ Buffer insertion (interconnect optimization)
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Wire
w
t
l
s
π π = ππππ
π‘π‘ β π€π€ πΆπΆ = ππ
π‘π‘ β πππ π
π·π·π·π·πππ·π·π·π· β π π πΆπΆ β ππ2
modeling
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Wire Resistance
w t
l
π π = ππππ
π‘π‘ β π€π€
ππ: Resistivity (constant)
π‘π‘: Thickness (constant)
ππ: Wire length
π€π€: Wire width Current
π π = ππππ
π‘π‘ β π€π€=πππ‘π‘βπππ€π€
= π π π π π π πππ€π€
π π π π π π : sheet resistance
Example 1 ππ: 100ππππ,π€π€: 0.065ππππ, π‘π‘: 0.13ππππ,ππ = 17.1 ππΞ© β ππ
π π = 17.1 β 10β9 Ξ© β ππ β100 β 10β6ππ
0.13 β 10β6ππ β 0.065 β 10β6ππ= 202Ξ©
Example 2 (Nangate 45nm) ππ: 100ππππ,π€π€: 0.065ππππ,π π π π π π = 0.38Ξ©
π π = (0.38Ξ©) β100ππππ
0.065ππππ= 585Ξ©
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Wire Capacitance
β’ Area capacitance
Metal 2
Metal 1
Ground plane
T
W πΆπΆππππππππ
πΆπΆππππππππ
ππππππππππ = ππππππ βπππ»π»
πΆπΆππππππππ = ππππππππππ β πΏπΏ
L
Area capacitance per unit length (F/m)
Total area capacitance (F)
H
S
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Wire Capacitance
β’ Lateral capacitance
Metal 2
Metal 1
Ground plane
W πΆπΆππππππππππππππ
ππππππππππππππππ = ππππππ βππππ
πΆπΆππππππππππππππ = ππππππππππππππππ β πΏπΏ
L
S
Lateral capacitance per unit length (F/m)
Total lateral capacitance (F)
T
H
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Wire Capacitance
β’ Fringe capacitance
Metal 2
Metal 1
Ground plane
W
πΆπΆππππππππππππ
ππππππππππππππ = ππππππ β ln 1 +πππ»π»
πΆπΆππππππππππππ = ππππππππππππππ β πΏπΏ
L
S
Fringe capacitance per unit length (F/m)
Total fringe capacitance (F)
T
H
πΆπΆππππππππππππ
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Delay Calculation (Elmore Delay)
β’ Delay of a long wire (distributed RC network) β ππ = π π π·π·π·π· β ππ β ππ + πΆπΆπΏπΏ + ππ ππ β ππ + πΆπΆπΏπΏ + ππ β ππ β ππ β 1 + πΆπΆπΏπΏ + β―+ ππ β ππ + πΆπΆπΏπΏ
= π π π·π·π·π· β πΆπΆπ€π€ππππππ + πΆπΆπΏπΏ + π π π€π€ππππππ β πΆπΆπΏπΏ + ππππππ ππ+1
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= π π π·π·π·π· β πΆπΆπ€π€ππππππ + πΆπΆπΏπΏ + π π π€π€ππππππ β πΆπΆπΏπΏ +π·π·π€π€π€π€π€π€π€π€ππ
β πΆπΆπ€π€π€π€π€π€π€π€ππ
β ππ ππ+12
β π π π·π·π·π· β πΆπΆπ€π€ππππππ + πΆπΆπΏπΏ + π π π€π€ππππππ β πΆπΆπΏπΏ +π·π·π€π€π€π€π€π€π€π€βπΆπΆπ€π€π€π€π€π€π€π€
2
V(t) = VDDΒ·u(t)
RDR ππ
ππ CL
VLOAD(t) ππ ππ ππ ππ
ππ ππ ππ ππ
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Coupling
β’ Effects β Delay β Crosstalk
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Coupling
Net 1
Net 2
πΆπΆππππππ1
πΆπΆππππππ2
πΆπΆππ
Aggressor
Victim
Victim: The net of interest.
Aggressor: The neighboring nets of the victim net.
1. When the neighboring net is stationary: πΆπΆπΏπΏ = πΆπΆππππππ + πΆπΆππ
2. When the two nets are switching in the same direction: πΆπΆπΏπΏ = πΆπΆππππππ
3. When the two nets are switching in the opposite direction: πΆπΆπΏπΏ = πΆπΆππππππ + 2πΆπΆππ
β’ Delay
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Coupling
β’ Crosstalk
Net 1
Net 2
πΆπΆππππππ1
πΆπΆππππππ2
πΆπΆππ
Aggressor
Victim
βππ1
βππ2 πΆπΆππ
πΆπΆππππππ2
βππ2 =πΆπΆππ β βππ1
(πΆπΆππππππ2 + πΆπΆππ)
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Coupling
β’ Crosstalk
πΆπΆπΏπΏ
πΆπΆππ
πππ π π‘π‘ = ππ0 β π’π’(π‘π‘)
πΆπΆπΏπΏ
πΆπΆ
πΆπΆ
π π
π π
ππ1
ππ2
+ -
πππΆπΆ ππ1 = π π πΆπΆ + πΆπΆπΏπΏ + 2πΆπΆπΆπΆ ππ2 = π π (πΆπΆ + πΆπΆπΏπΏ)
ππ2 π‘π‘ =ππ02
π·π·βππππ1 β π·π·β
ππππ2 π’π’(π‘π‘)
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Coupling
β’ How to reduce the coupling effect β Spacing
β Shielding
Signal Signal Signal
Signal Signal Signal
Shield Signal Shield
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Coupling
β’ How to reduce the coupling effect β Coding/Decoding
β’ Duan, TVLSIβ09
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Coding/Decoding for Coupling Minimization
ππ =πΆπΆπΌπΌπΆπΆπΏπΏ
Eliminate these patterns.
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Coding/Decoding for Coupling Minimization
β’ Forbidden Pattern Based Crosstalk Avoidance β Forbidden patterns
β’ β101β β’ β010β
β Forbidden pattern free (FPF) code
β’ 1101110: not FPF β’ 1100110: FPF
β’ βIf a bus contains FPF codes only, the bus will experience
maximum crosstalk of no greater than 2Cβ.
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Coding/Decoding for Coupling Minimization
β’ Forbidden Pattern Free (FPF)-Crosstalk Avoidance Code (CAC) FPF-CAC
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Coding/Decoding for Coupling Minimization
β’ Coding/Transmission/Decoding
Input
data Coding
FPF
code Transmission Decoding
Output
data
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Coding/Decoding for Coupling Minimization
fk: Fibonacci number
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Coding/Decoding for Coupling Minimization
Example (m=6) 1) v=0
v < f7 (=13)
=> d6=0, r6=0
2) k=5 (for)
r6 (=0) β₯ f6 (=8) => false
r6 (=0) < f5 (=5) => true
=> d5=0
r5 = r6 β f5*d5 = 0 β 5*0 = 0
3) k=4
r5 (=0) < f4 (=3)
=> d4=0
r4 = r5 β f4*d4 = 0
4) k=3: d3=0, r3=0
5) k=2: d2=0, r2=0
6) d1=r2=0
0 => (000000)
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Coding/Decoding for Coupling Minimization
Example (m=6) 1) v=15
v > f7 (=13)
=> d6 = 1, r6 = 7
2) k=5 (for)
d5 = d6 = 1
r5 = r6 β f5*d5 = 7 β 5*1 = 2
3) k=4
d4 = 0
r4 = r5 β f4*d4 = 2
4) k=3
d3 = 0
r3= r4 β f3*d3 = 2
5) k=2
d2 = 1
r2 = r3 β f2*d2 = 2-1 = 1
6) d1 = r2 = 1
15 => (110011)
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Coding/Decoding for Coupling Minimization
0+0+0+0+0+0 = (00000) 0+0+0+0+0+1 = (00001) 0+0+0+0+1+1 = (00010) 0+0+0+2+1+0 = (00011) 0+0+0+2+1+1 = (00100) 0+0+3+2+0+0 = (00101) 0+0+3+2+1+0 = (00110) 0+0+3+2+1+1 = (00111) 0+5+3+0+0+0 = (01000) 0+5+3+0+0+1 = (01001) 0+5+3+2+0+0 = (01010) 0+5+3+2+1+0 = (01011) 0+5+3+2+1+1 = (01100) 8+5+0+0+0+0 = (01101) 8+5+0+0+0+1 = (01110) 8+5+0+0+1+1 = (01111) 8+5+3+0+0+0 = (10000) 8+5+3+0+0+1 = (10001) 8+5+3+2+0+0 = (10010) 8+5+3+2+1+0 = (10011) 8+5+3+2+1+1 = (10100)
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Coding/Decoding for Coupling Minimization
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Coding/Decoding for Coupling Minimization
β’ Comparison
Example
1) 20 β 8
Non-FPF: (10100) β (01000) : (2+4+3+0+0)CI = 9CI FPF: (111111) β (011000) : (1+0+0+1+0+0)CI = 2CI 2) 21 β 10
Non-FPF: (10101) β (01010) : (2+4+4+4+2)CI = 16CI FPF: (1100000) β (0011100) : (0+2+2+0+1+0+0)CI = 5CI
(10100) (10011) (10010) (10001) (10000) (01111) (01110) (01101) (01100) (01011) (01010) (01001) (01000) (00111) (00110) (00101) (00100) (00011) (00010) (00001) (00000)
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Buffer Insertion (1)
β’ Delay minimization for driving a large load
πΆπΆπΏπΏ ππππππ
πΆπΆπΏπΏ ππππππ 1 2 β¦
n-1 n
πππΏπΏ πΌπΌ
= πππΌπΌπππΏπΏ 1
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Buffer Insertion (1)
πΆπΆπΏπΏ ππππππ 1 2 β¦
n-1 n
πΆπΆππππ,1 = πΆπΆππππ πππΏπΏ ππ1 + πππΏπΏ ππ1 πΆπΆππππππ,1 = πΆπΆπΊπΊπ·π·,ππ1 + πΆπΆπΊπΊπ·π·,ππ1 + πΆπΆππππ,ππ1 + πΆπΆππππ,ππ1
π π 1 β1
ππ πππΏπΏ 1πππ·π·π·π· β ππππ
π π πΌπΌ =π π 1πππΌπΌ
,πΆπΆππππ,πΌπΌ = πππΌπΌπΆπΆππππ,1 ,πΆπΆππππππ,πΌπΌ β πππΌπΌπΆπΆππππππ,1
πππΌπΌ = π π πΌπΌ πΆπΆππππππ,πΌπΌ + πΆπΆππππ,πΌπΌ+1 =π π 1πππΌπΌ
πππΌπΌπΆπΆππππππ,1 + πππΌπΌ+1πΆπΆππππ,1
ππππππππ = οΏ½π π 1 πΆπΆππππππ,1 +πππΌπΌ+1πππΌπΌ
πΆπΆππππ,1
ππ
πΌπΌ=1
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Buffer Insertion (1)
ππππππππ = οΏ½π π 1 πΆπΆππππππ,1 +πππΌπΌ+1πππΌπΌ
πΆπΆππππ,1
ππ
πΌπΌ=1
ππππππππππππππ1
= 0, β¦ ,ππππππππππππππππ
= 0 πππΌπΌπππΌπΌβ1
=πππΌπΌ+1πππΌπΌ
= πΎπΎ
ππ1 = 1 , ππππ+1 =πΆπΆπΏπΏπΆπΆ1
ππ2ππ1βππ3ππ2β β― β
ππππ+1ππππ
=ππππ+1ππ1
= πΎπΎππ
πΎπΎ =πππΌπΌ+1πππΌπΌ
=πΆπΆπΏπΏπΆπΆ1
1/ππ
ππ1 = 1 , ππ2 = πΎπΎ , ππ3 = πΎπΎ2 , β¦ , ππππ = πΎπΎππβ1
ππππππππ = οΏ½π π 1 πΆπΆππππππ,1 + πΎπΎπΆπΆππππ,1
ππ
πΌπΌ=1
= πππ π 1 πΆπΆππππππ,1 + πΎπΎπΆπΆππππ,1 = πππ π 1 πΆπΆππππππ,1 +πΆπΆπΏπΏπΆπΆ1
1/ππ
πΆπΆππππ,1
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Buffer Insertion (1)
ππππππππ = πππ π 1 πΆπΆππππππ,1 +πΆπΆπΏπΏπΆπΆ1
1/ππ
πΆπΆππππ,1
ππππππππππππππ
= π π 1 πΆπΆππππππ,1 +πΆπΆπΏπΏπΆπΆ1
1/ππ
πΆπΆππππ,1 + πππ π 1πΆπΆππππ,1πΆπΆπΏπΏπΆπΆ1
1/ππ
β1ππ2
πππππΆπΆπΏπΏπΆπΆ1
= 0
πΆπΆππππππ,1 +πΆπΆπΏπΏπΆπΆ1
1/ππ
πΆπΆππππ,1 = πΆπΆππππ,1πΆπΆπΏπΏπΆπΆ1
1/ππ 1ππ
πππππΆπΆπΏπΏπΆπΆ1
If πΆπΆππππππ,1 is small => ππ β πππππΆπΆπΏπΏπΆπΆ1
πΎπΎ =πΆπΆπΏπΏπΆπΆ1
1/ππ
= π·π·
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Buffer Insertion (2)
β’ Delay minimization
V(t) = VDDΒ·u(t)
RDR ππ
ππ CL
VLOAD(t) ππ ππ ππ ππ
ππ ππ ππ ππ
Ο β π π π·π·π·π· β πΆπΆπ€π€ππππππ + πΆπΆπΏπΏ + π π π€π€ππππππ β πΆπΆπΏπΏ +π·π·π€π€π€π€π€π€π€π€βπΆπΆπ€π€π€π€π€π€π€π€
2
Length: L (um)
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Buffer Insertion (2)
β’ Insert a single type of buffers.
ππππ = π π π·π·π·π· βπΆπΆπ€π€π€π€π€π€π€π€
πΏπΏππππ
+ πΆπΆππππ +π·π·π€π€π€π€π€π€π€π€
πΏπΏππππ
β πΆπΆππππ +12
π·π·π€π€π€π€π€π€π€π€πΏπΏππππ
β πΆπΆπ€π€π€π€π€π€π€π€πΏπΏππππ
= π π π·π·π·π· βπΆπΆπ€π€πππππππΏπΏ
π π ππ + πΆπΆππππ +π π π€π€πππππππΏπΏ
π π ππ β πΆπΆππππ +12
π π π€π€πππππππΏπΏ
π π ππ βπΆπΆπ€π€πππππππΏπΏ
π π ππ
ππππππππ = οΏ½ππππ
ππ
ππ=1
= π π π·π·π·π· β πΆπΆπ€π€ππππππ βπ π 1 + β―+ π π ππ
πΏπΏ+ ππ β π π π·π·π·π· β πΆπΆππππ
+π π π€π€ππππππ β πΆπΆππππ βπ π 1 + β―+ π π ππ
πΏπΏ
+π π π€π€ππππππ β πΆπΆπ€π€ππππππ
2πΏπΏ2π π 12 + β―+ π π ππ2
= π π π·π·π·π· β πΆπΆπ€π€ππππππ + ππ β πΆπΆππππ + π π π€π€ππππππ β πΆπΆππππ +π π π€π€ππππππ β πΆπΆπ€π€ππππππ
2πΏπΏ2π π 12 + β―+ π π ππ2
N-1 buffers
π π 1 (ππππ) π π 2 (ππππ) π π ππ (ππππ)
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Buffer Insertion (2)
ππππππππ = π π π·π·π·π· β πΆπΆπ€π€ππππππ + ππ β πΆπΆππππ + π π π€π€ππππππ β πΆπΆππππ +π π π€π€ππππππ β πΆπΆπ€π€ππππππ
2πΏπΏ2π π 12 + β―+ π π ππ2
Constant
Minimize ππ π π 1, β¦ , π π ππ = π π 12 + β―+ π π ππ2
subject to π π 1 + β―+ π π ππ = πΏπΏ
πππππππ π ππ
= 2 β π π ππ + 2 β π π ππ β β1 = 0
π π ππ = π π ππ β΄ π π 1 = π π 2 = β― = π π ππ
ππππππππ = π π π·π·π·π· β πΆπΆπ€π€ππππππ + ππ β πΆπΆππππ + π π π€π€ππππππ β πΆπΆππππ +π π π€π€ππππππ β πΆπΆπ€π€ππππππ
2ππ
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Buffer Insertion (2)
β’ Optimal N
ππππππππ = π π π·π·π·π· β πΆπΆπ€π€ππππππ + ππ β πΆπΆππππ + π π π€π€ππππππ β πΆπΆππππ +π π π€π€ππππππ β πΆπΆπ€π€ππππππ
2ππ
ππππππππππππππ
= π π π·π·π·π· β πΆπΆππππ βπ π π€π€ππππππ β πΆπΆπ€π€ππππππ
2ππ2= 0
ππ =π π π€π€ππππππ β πΆπΆπ€π€ππππππ2 β π π π·π·π·π· β πΆπΆππππ
N-1 buffers
π π = πΏπΏ/ππ (ππππ) π π (ππππ) π π (ππππ)
38
Buffer Insertion
β’ Insert multiple types of buffers.
β’ Branches
β’ Blockages β’ β¦
β’ This will be studied in EE582 in Fall 2015.
EE434οΏ½ASIC & Digital SystemsοΏ½οΏ½οΏ½οΏ½Lecture 8οΏ½οΏ½InterconnectInterconnect LayersInterconnect LayersInterconnect LayersInterconnect LayersInterconnect AnalysisWireWire ResistanceWire CapacitanceWire CapacitanceWire CapacitanceDelay Calculation (Elmore Delay)CouplingCouplingCouplingCouplingCouplingCouplingCoding/Decoding for Coupling MinimizationCoding/Decoding for Coupling MinimizationCoding/Decoding for Coupling MinimizationCoding/Decoding for Coupling MinimizationCoding/Decoding for Coupling MinimizationCoding/Decoding for Coupling MinimizationCoding/Decoding for Coupling MinimizationCoding/Decoding for Coupling MinimizationCoding/Decoding for Coupling MinimizationCoding/Decoding for Coupling MinimizationBuffer Insertion (1)Buffer Insertion (1)Buffer Insertion (1)Buffer Insertion (1)Buffer Insertion (2)Buffer Insertion (2)Buffer Insertion (2)Buffer Insertion (2)Buffer Insertion