PowerPoint Presentation

Electrocardiogram (ECG) application operation Part B

Performed By: Ran GelerMor Levy

Instructor:Moshe Porian

Project Duration: 2 Semesters Spring 2012Final Presentation

ContentsIntroductionOverviewTop ArchitectureComponentsData FlowSimulations and DebugPerformanceGUIProblems in developing processConclusions 2

IntroductionThe heart is a muscular organ that beats in rhythm to pump blood through the bodyBy analyzing the heart behavior and especially the electrical impulses we can help identify heart diseases and special circumstance that require close monitoring : . . .

* EGC3Medical TermsECGLeadBipolar leads Unipolar leads Precordial Leads

4Project Overview

Project focus DB FPGA. GUI 5Project Goals

Design and implement a communication interface between a PC to an ECG board using a FPGA.Implement a simulation component to PCB board behavior for tests.Learn how to integrate Multi Platforms elementsECG DB with FPGABuild an interactive GUI with debugger abilities.Methodic project

FPGA 6Top Architecture

What we have achieved:Implementing ECG controllerECG FSMIntegration with peripheralcomponents.Examination of the Implemented componentsCreating tests benchMocking TI DB behavior P & R to projects top architecture by QuartusAdding Flash memory supportImplementing a GUI

, . . : 100 FPGA . 8Top Architecture Data Flow

ADS1298R ECG DB9Top Architecture FrequencyFrequency requirements for modulesFPGA:Main frequency: 100MHzRx / Tx Modules@ frequency of 115,200Hz

ADS1928R:Main frequency: 2.048MHzSPI-Data Out freq: >110KHz

MATLAB GUI:Rx / Tx Via UART interface@ frequency of 115,200HzFlash Memory:Main frequency: 100MHz

ADS1298R ECG DB10Core microarchitecture

512BytesData Rate: 100MHzData Rate: >110KHz . , , / '...( , !) 11Core Architecture ECG FSMFIFOCommand & Aux RegsWishbone Master & SlaveSPI Cores

12ECG FSMControls the flow of data between the host and the DBThree Main chain of actions:Read DataRead RegistersWrite Registers

13ECG FSM - Graph

, 14FIFO at ECG Controller

1st Command2nd CommandAdditional Data

Operation Commands (ex: RDATAC, Rreg, Wreg, Standby, Reset, ect..)Optional: Second Byte for (Rreg, Wreg) and sample interval for RDATAC command.Data for commandsFIFO Size: 512 Bytes.Stores Instruction and Sampled data.Data structure on Instruction case: ecg controller . HOST ". ( ) ( ) . 256 ( ) .15SPIThe SPI Interface frequency:

At 24bit resolution per 8 Electrodes and 500 Samples per Sec:

Active at low. i.e. CS = 0

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DB16Flash Component

FLASHFlash ControllerFlashFSMRAM

Reset enWBSFlash Component256Byte 100MHz17Flash Component - Flash

One sample(24bit res. per 8 Electrodes)= 27Byte.Lets assume sample rate of 500 SPSFlash size = 4MBTherefore we can sample for 5min. : 310 .18Flash Component Flash client

Technical Demands:Common FLASH Interface protocol (CFI)Wishbone InterfacePerforms Read, Write, Reset and Erase transactionsInitiative read on power-onContains a timeout algorithmGeneric: adaptable to different FLASH sizes and clock frequencies.

BUSWishboneCFI? ?19ADS1298R ECG DB

FPGA Architecture design suited to Texas Instruments ADS1298R board.Arrived to the High Speed Digital Systems Lab

20Test MethodologiesOperation of the ECG Controller:Checking that states change are at timeChecking control signals & data signals between unitsNon existing commandsRead\Write data to flash from all components.Read\Write data from PC to board simulation component (DB Mock).

NOTE: When a transaction is executed the wishbone stall signal is raised to High, So other requests will remain pending at the Rx Wishbone Master.

21ECG Controller TB Data Flow

We have implemented a special closed component for Testing.DB MockingWe have implemented a component to imitate the Texas Instruments ADS1298R Chip behavior. The Mocking component is capable ofsaving 26 configuration registers values.Extracting \ writing data from a sequence ofregisters in a burst. Simulate a continues samples reading (RDATAC mode).

DB mockingThe component designed to meet timing constrainsof Texas Instruments board. Instructions and returned data timings.Continues data samples timing.Enter to sleep mode \ Wakeup time.

The component designed to help on Top architecture Implementation and debug process.The component Interface is as the Texas Instruments boars (SPI).ADS1298R ECG DB

SPI .25Simulations Read Transaction exampleTop Architecture Wave.

Rx TransactionSPIFlash26Simulations Read Transaction exampleSPI Transaction

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Simulations Read Transaction exampleFlash transaction

28Simulations DB Mock WREGOperation

29Simulations RDATAC Transaction example

30Simulation equipment

Programming & Debug gearDE2 -BoardHost for Simulations31Quartus SimulationsTop Arc Synthesis summary

32Quartus SimulationsMax Frequency

Architecture clocks

33GUIUsing Matlab 2012a we build a functional GUIAllows control on the DB using the DB registersEnables to communicate directly with the flashRunning ECG analyze

34GUI General

35GUI General

36GUI General

37GUI DB Registers

38GUI DB Registers

39GUI DB Registers

40GUI DB Registersreading from file

41GUI DB Registersreset

42GUI DB Registerssetting default values

43GUI DB Registersreading from DB

44GUI Flash

45GUI Flash

46GUI Flash

47GUI Flashloading from file

48GUI Flashwriting on the flash

49GUI Flashreading from the flash

50GUI Flash

51GUI FlashFlash control

52GUI Analyzer

53GUI Analyzer smooth

54GUI Analyzer stairs

55GUI Analyzer - stems

56GUI Analyzer - Save

57GUI Analyzer - Save

58GUI About

59GUI About

60Problems in developing processMeet timings requirements of the TI Evaluation board.Keep the projects specifications and requirements while adding more logic to the top arch.Debug and testing of thewhole implemented logic.

* 61ConclusionsWe learned a lot about the developing process & the importance of good planning a headThe importance of working organizedHow much good documentation of previous project is important

62 Conclusions - continueHow to build a GUI using MatlabSetting up the Matlab to communicate with outer devicesThe impotence of good and workable equipmentTest each component atomically.

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