ENGR 303 – Introduction to Logic Design Lecture 16

Dr. Chuck BrownEngineering and Computer Information Science

Folsom Lake College

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• Moore & Mealy State Machines

• Factoring

Outline for Todays Lecture

ENGR 303

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• Moore is a finite-state machine whose output values are

determined solely by its current state.

• Moore machines are safer to use: Outputs change at clock edge (always

one cycle later)

• Additional logic may be necessary to decode state into outputs—more

gate delays after clock edge

• Some sequential circuits can only be implemented as Moore machines

Moore State Machines

ENGR 303

This system takes in a stream of zeros and ones and outputs a 1 any time it gets the input sequence 011

State Name

Output

Input

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• Mealy1 machine is a finite-state machine whose output values

are determined both by its current state and the current inputs

• Mealy machines tend to have fewer states

• React faster to inputs in same cycle—don't need to wait for clock

• Input change can cause output change as soon as logic is done—a big

problem when two machines are interconnected

• Not all sequential circuits can be implemented using the Mealy model

Mealy State Machines

ENGR 303

1 named after George H. Mealy, who presented the concept in a 1955 paper, “A Method for Synthesizing Sequential Circuits”.

This system takes in a stream of zeros and ones and outputs a 1 any time it gets the input sequence 011

State Name

Output

Input

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1. Identify inputs and outputs

2. Sketch state transition diagram

3. Select state encodings (binary coding for this class)

4. Write state transition table

5. Write Boolean equations for next state and output logic

6. Sketch the circuit schematic

FSM Design Procedure

ENGR 303

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• Design a Mealy and Moore FSM of a sequence detector that

takes a serial data input stream of zeros and ones and outputs

a one any time the input sequence ends in 01

• Inputs: CLK, Reset, A

• Outputs: Y

Moore & Mealy FSM Examples

ENGR 303

01 Sequence Detector

CLK

Reset

A Y

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Moore FSM: arcs indicate input and state indicates output

Mealy FSM: arcs indicate input/output

State Transition DiagramsMoore FSM

Reset

S0

0

S1

0

S2

10

0 1

1 0

1

Reset

S0 S1

1/1

0/0

1/0 0/0

Mealy FSM

ENGR 303

This system takes in a stream of zeros and ones and outputs a 1 any time it gets the input sequence 01

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Moore FSM State Transition Table

ENGR 303

Current

State Input Next State Output

S1 S0 A DS'1 DS'0 Y

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

Moore FSM

Reset

S0

0

S1

0

S2

10

0 1

1 0

1

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Moore FSM State Transition Table

ENGR 303

Current

State Input Next State Output

S1 S0 A DS'1 DS'0 Y

0 0 0 0 1 0

0 0 1 0 0 0

0 1 0 0 1 0

0 1 1 1 0 0

1 0 0 0 1 1

1 0 1 0 0 1

1 1 0 X X X

1 1 1 X X X

Moore FSM

Reset

S0

0

S1

0

S2

10

0 1

1 0

1

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Moore FSM Next State K-Map

ENGR 303

0 0 1 0

0 0 X X

S1

S0A00 01 11 10

0

1

DS1’ = S0A

1 0 0 1

1 0 X X

S100 01 11 10

0

1

DS0’ = A’

S0A

Current

State Input Next State Output

S1 S0 A DS'1 DS'0 Y

0 0 0 0 1 0

0 0 1 0 0 0

0 1 0 0 1 0

0 1 1 1 0 0

1 0 0 0 1 1

1 0 1 0 0 1

1 1 0 X X X

1 1 1 X X X Y = S1

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Moore FSM Schematic

ENGR 303

Y

CLK

Reset

A

r

S'0

S0

S'1

S1

D

D

DS1’ = S0A

DS0’ = A’

Y = S1

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Current

State Input

Next

State Output

S0 A DS'0 Y

0 0

0 1

1 0

1 1

Mealy FSM State Transition & Output Table

ENGR 303

Reset

S0 S1

1/1

0/0

1/0 0/0

Mealy FSM

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Current

State Input

Next

State Output

S0 A DS'0 Y

0 0 1 0

0 1 0 0

1 0 1 0

1 1 0 1

Mealy FSM State Transition & Output Table

ENGR 303

Reset

S0 S1

1/1

0/0

1/0 0/0

Mealy FSM

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Current

State Input

Next

State Output

S0 A DS'0 Y

0 0 1 0

0 1 0 0

1 0 1 0

1 1 0 1

Mealy FSM State Transition & Output Table

ENGR 303

DS’0 = A’

Y = S0A

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Mealy FSM Schematic

ENGR 303

S'0 Y

CLK

Reset

A

r

S0

D DS’0 = A’

Y = S0A

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Moore & Mealy Timing Diagram

Mealy Machine

Moore Machine

CLK

Reset

A

S

Y

S

Y

Cycle 1 Cycle 2 Cycle 3 Cycle 4 Cycle 5 Cycle 6 Cycle 7 Cycle 8 Cycle 9 Cycle 10

S0 S2?? S2 S2S0 S1

1 0 1 1 0 1 1 10

S1

S0 S0?? S0 S1 S0S1

S1 S0

S1

Cycle 11

ENGR 303

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• Break complex FSMs into smaller interacting FSMs

• Example: Modify traffic light controller to have Parade Mode.

– Two more inputs: P, R

– When P = 1, enter Parade Mode & Bravado Blvd light stays green

– When R = 1, leave Parade Mode

Factoring State Machines

ENGR 303

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Unfactored FSM

Factored FSM

Controller

FSMTA

TB

LA

LB

PR

Mode

FSM

Lights

FSM

P

M

Controller

FSM

TA

TB

LA

LB

R

Traffic Light FSM Parade Mode

ENGR 303

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S0

LA: green

LB: red

S1

LA: yellow

LB: red

S3

LA: red

LB: yellow

S2

LA: red

LB: green

TA

TA

TB

TB

Reset

S4

LA: green

LB: red

S5

LA: yellow

LB: red

S7

LA: red

LB: yellow

S6

LA: red

LB: green

TA

TA

P

PP

P

P

P

R

R

R

R

R

P

RP

TA

P

TA

P

P

TA

R

TA

R

R

TB

RT

BR

Unfactored FSM

ENGR 303

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S0

LA: green

LB: red

S1

LA: yellow

LB: red

S3

LA: red

LB: yellow

S2

LA: red

LB: green

TA

TA

M + TB

MTB

Reset

Lights FSM

S0

M: 0

S1

M: 1

PReset

P

Mode FSM

R

R

Factored FSM

ENGR 303

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1. Identify inputs and outputs

2. Sketch state transition diagram

3. Select state encodings (binary coding for this class)

4. Write state transition table

5. Write Boolean equations for next state and output logic

6. Sketch the circuit schematic

Recap - FSM Design Procedure

ENGR 303