ES Academic Manual

Embedded Systems

I Objective / Relevance

Embedded systems are specialized computers used in larger systems or machines to control equipments such as automobiles, home appliances, communication, control and office machines. Embedded system is a combination of software and hardware system, in which s/w drives the hardware. The fact that such systems are everywhere and in our everyday life. Such pervasively is particularly evident in immersive realities, i.e., scenarios in which invisible embedded systems need to continuously interact with human users, in order to provide continuous sensed information and to react to service requests from the users themselves. Examples of such scenarios are digital libraries and eTourism, automotive, next generation buildings and infrastructures, eHealth, domestics. Having the users at the centre poses many new challenges to the current middleware and service technologies for embedded systems, in terms of Dynamicity, Scalability, Dependability, Security and privacy. These considerations require, in the Consortium opinion, novel techniques and middleware technologies targeted to person-centric embedded systems (i.e., usable in immersive scenarios). The main objective: - (1) less power consumption (2) memory constraint (3) less area requirement.

After going through this lesson the student would be able to• Know what an embedded system is• distinguish a Real Time Embedded System from other systems• tell the difference between real and non-real time• Learn more about a mobile phone• Know the architecture• Tell the major components of an Embedded system

II Syllabus

III Session Plan

Topics as per JNTU Syllabus

Sub-

Topics

Suggested Books(Page nos.)

R

Overview

Introduction to the subject in unit wise as per JNTU syllabus

Applicati

Applications of embedded systems


Sub-

Topics


R

ons & its extension Necess

Information Regarding


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Topics


R

ary background

Microcontrollers

UNIT - 1 : Embedded ComputingIntrodu

Introduction of Embedded Syst

T1-Ch1 (1


Sub-

Topics


R

ction

ems )

Complex Systems and M

Embedded Computing

T1-Ch1(2-8)

CharacteristicsChallenges


Sub-

Topics


R

icroproEmbedded Syst

Requirements

T1-Ch1(10-18)

SpecificationsArchitecture Des


Sub-

Topics


R

em Design

ign

Formalism

Structural description

T1-Ch1(21

Behavioral


Sub-

Topics


R

s for Syst

description -

29)

Design

Requirements

T1-Ch1(

Specificati


Sub-

Topics


R

Exam

ons 32-39UNIT – II :

8051 ArchitectureIntroduction

Introduction

T2-Ch3(60)

8 Archite

T2


Sub-

Topics


R

051 Microcontroller Hardwa

cture

-Ch3(60-72)

Pins


Sub-

Topics


R

rTimers and Counters

T0,T1

T2-Ch3(80-84)

I/O

P0,P1,P2,P3

T2-C


Sub-

Topics


R

Ports and Circuits

h3(73-77)

Serial D

SCON

T2-Ch3(8


Sub-

Topics


R

ata Communication

5-90)

External

Interfacing

T2-Ch3(78


Sub-

Topics


R

Memory

-79)

Interrupts

Priorities

T2-Ch3(91-96)

UNIT – III : 8051

Programming

Ass

T2-


Sub-

Topics


R

embly Language Programming

Ch4(110-111)


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Topics


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ProcessProgramming Tools

Programming Tools and Techniques

T2-Ch4(116-124)


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Topics


R

and TechniquesProgramming

Syntax for programming 8051

T2-Ch4(125-1


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Topics


R

28)

Data Transfer

Data Transfer Instructions

T2-Ch5(131-144)

Logical

Logical Instructions

T2-Ch6(1


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Topics


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Instructions

51-161)

Arithmetic Ope

Arithmetic Instructions

T2-Ch7(169-18


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Topics


R

rations

1)

Decimal Arithmetic

Decimal Arithmetic Instructions

T2-Ch7(182-183)

B Bra T


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Topics


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ranch Instructions

nch Instructions

2-Ch8(191-200)

Interrup

Interrupt Programming

T2-Ch8(2


Sub-

Topics


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t Programming

00-206)

UNIT – IV : PSoC

architecture and

Programming

PSoC as

Differences between mic

T3-Ch1(


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Topics


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a single chip solution fo

rocontroller and PSoC

1-50)

Advantages


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Topics


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r embedded sBl

Analog

T3


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Topics


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ocks in PSoC

,Digital and controller blocks

-Ch1(1-50)

Hardware progr

T3-Ch1(1-50)


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Topics


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amming through PSoC creato


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Topics


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rI/O Pin configurability

T3-Ch1(1-50)

UNIT – V : Applications


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Topics


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Blinking an LED

Project overview ,background information, project steps and conclusion

T4-Ch3(23-40)

Capsen

Project overview ,back

T4-Ch5


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Topics


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se

ground information, project steps and conclusion

(59-72)

digital logi

Project overview ,background information,

T4-C61(73-92


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Topics


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c

project steps and conclusion

)

precision analog l

Project overview ,background information, project steps and con

T4-Ch7(93-107)


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Topics


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ogic

clusion

serial communication

Project overview ,background information, project steps and conclusion

T4-Ch4(41-58)

UNIT –VI Introduction

UNIT – VII :


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Topics


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to RTOS

Basic Design Using a Real-Time

Operating

System

Kernel

Objects of KernelTask and Task StatesTask and Data

R6-Ch6 (157-172)

Sé R


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Topics


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maphores and Shared data

6-Ch6 (173-187)

Mail BoxesMessage Queues

R6-Ch7(193-2


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Topics


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03)

Timers

Timer FunctionsEventsPipes

R6-Ch7 (204-214)

ISR

Memory ManagementISR

R6-Ch7 (2


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Topics


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15-225)

UNIT –VI Basic design

using a RTOS

L42

T1- Ch10(401-404)R1-Ch12(5


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Topics


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93)

Principles

Principles

R6-Ch8(237)

Semaphores an

Semaphores and Queues

R6-Ch8(264-27


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Topics


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d Queues

2)

Hard Real-Time Sc

Hard Real-Time Scheduling Considerations

R6-Ch8(273-274)


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Topics


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heduling ConsiderationsSav

Saving Me

R6-


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Topics


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ing Memory and Power

mory and Power

Ch8(274-278)

An exa

An example RTOS

R6-Ch8


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Topics


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mple RTOS like uC-OS (Open

like uC-OS (Open Source)

()


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Topics


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Source)Host and Target Ma

Host and Target Machines

R6-Ch9(281-282)


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Topics


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chinesLinker/Locators for

Linker/Locators for Embedded Software

R6-Ch9(283-295)


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Topics


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Embedded SoftwareGetting E

Getting Embedded Software into

R6-Ch9(29


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Topics


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mbedded Software into the

the Target System

6-300)


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Target SystemTesting on Ho

Testing on Host Machine

R6-Ch10(304-3


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st Machine

21)

Using Laboratory

Using Laboratory Tools

R6-Ch10(327-345)


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ToolsAn Example System

An Example System

R6-Ch11(349-421)

UNIT – VIII :

Introduction

L57

T3-C


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Topics


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to advanced architectures

H6 (222 to 230)R2-CH6 (196 to 200)R2-CH6


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Topics


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(228 to 232)

ARM and SHARC

ARM and SHARC

T1-Ch2(62-98)

Proces

Processor and memor

T1-Ch2


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sor and memory organizatio

y organization and Instruction level parallelism

(62-98)


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n and Instruction level pa


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rallelismNetworked embedde

Bus protocols

T1-Ch8(458)


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Topics


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d systems12C bus and CAN b

12C bus and CAN bus

T1-Ch8(459-466)


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Topics


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usInternet-Enabled Systems

Internet-Enabled Systems

T1-Ch8(484-485)


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Topics


R

Design Example-Elevator Co

Design Example-Elevator Controller

T1-Ch8(486-492)


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Topics


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ntroller

IV ASSIGNMENT QUESTIONS

Unit 1

1. What is an embedded computer system? Give an example.2. What are the major components of embedded system hardware?3. Explain the characteristics of embedded computing applications.4. What are the reasons for using microprocessor in digital systems?5. Explain the challenges in embedded computing system design.6. Briefly describe about requirements in the design process. Explain with an example. 7. What is specification? Distinguish between requirements and specification.8. Write Short notes on,

(a) Architecture design(b) Components(c) System integration

2. What are the levels of abstraction in an embedded system design process?3. Compare and contrast top-down and bottom-up design methodologies.4. Explain with an example the structural description of the system components. Also discuss the

types of relationship between the objects and classes.5. How the behavioral description of a system is different from its structural description. Explain.6. Explain with a suitable illustration. How UML is used for system modeling?

Unit 2

1. Draw and explain the block diagram of 8051 microcontroller. 2. How is DPTR register is used in 8051 microcontroller? Explain.3. Explain the programming model of 8051 microcontroller.4. Discuss the significance of clock and oscillator circuit in 8051 microcontroller. Also discuss the

role of stack in storing memory addresses.5. Draw the pin diagram of 8051 microcontroller. Explain in detail about the various registers and

memory used by it.6. Distinguish between a counter and timers.7. What are the different modes of operation associated with a timer in 8051 microcontroller?

Explain.8. Explain the significance of each field in TMOD and TCON registers.9. Discuss in detail about the input/output pins, ports and circuits of 8051 microcontroller.10. Discuss in detail about the serial data communication circuit in8051 microcontroller.11. Draw SCON and PCON special function registers and explain the functioning of each field.12. Discuss the four modes of serial data transmission.13. Draw the memory organization of 8051 microcontroller and explain in detail.14. Define interrupt. What are the 2 ways of generating an interrupt? How to control an interrupt?15. Discuss about the different types of interrupts in 8051 microcontroller.16. Explain IE and IP special function registers.

Unit 3

1. What is an assembly-level language? Give the reasons for writing computer instructions in assembly language.

2. List the four types of utility programs.3. Write about the assembly language programming process, programming tools and techniques.4. Write short notes on addressing modes of 8051.5. Explain briefly about the external addressing using MOVX and MOVC instructions. Also discuss

code memory read-only data moves.6. Explain the significance of PUSH and POP instructions in direct data addressing.7. Signify the role played by exchange and swap instructions in moving data in 2 directions.8. Write about arithmetic operations and explain with examples.9. Discuss the role of flags in performing arithmetic operations and what instructions affect the flags.10. Compare and contrast byte-level and bit-level logical operations.11. Explain all the Boolean bit-level operations.12. Discuss rotate and swap operations.13. Write a brief note on shift and rotate operations in 8051.14. Explain different ALU instructions in 8051 with an example.15. Explain Bit jumps, Byte jumps and unconditional jumps.16. Write short notes on calls and sub routines.17. Explain the types of jump and call instructions of 8051 with examples.18. Write a brief note on SJMP, LJMP and AJMP instruction in 8051.19. Discuss about decimal arithmetic with example.20. Explain interrupt handling capacity of 8051.

Unit 4

1. What is PSOC? How it is different from microcontroller?2. Explain about the features provided by PSOC architecture.3. With a neat diagram explain the architecture of PSOC microcontroller.4. List out the various advantages and limitations of PSOC microcontroller.5. Explain the need of low power consumption in microcontroller based system.6. With neat diagram explain the analog block employed in the PSOC microcontroller.7. Write short notes on digital PSOC blocks.8. Discuss about the internal register organizations of CPU block in PSOC.9. State and explain in brief about the 4 embedded design steps involved in hardware configuration

through PSOC creator.10. Explain in detail about the three types of pins available in PSOC architecture.

UNIT 5

1. List the steps performed while starting a new project of blinking an LED.2. Write the steps of adding the following components.

a. Clock componentb. PWM componentc. Digital pin component

2. Explain the procedure for establishing connection between components and chips resources.3. Explain how pins are assigned to PSOC creator.4. Discuss in brief about cap sense and its operation.5. Write the five steps involved in adding and configuring a cap sense – CSD component.6. Write the steps for setting of the project of digital logic.

7. Explain the procedure for adding and configuring a control register.

8. Explain how sheet connectors are used.9. List the steps involved in a) adding a look up table b) adding more registers c)adding hardware

delays.

UNIT 6

1. What is a task? What are the different states of a task?2. What is a Shared Data problem in embedded system? Explain with an example.3. Explain the characteristics of a ‘reentrant’ function. What are the rules that help you to decide

whether a function is reentrant or not?4. What is a semaphore? Explain the working of semaphores in an RTOS with an example. Also

discuss the process of initializing semaphores.5. What are the problems that are to be addressed using semaphores?6. Compare and contrast the 3 methods of protecting shared data.7. What are kinds of Semaphores?8. Write short notes on the following in the context of an RTOS,

a. Priority inversionb. Deadly embracec. Mutexd. Counting Semaphores.

2. Compare binary semaphores, mutex and counter semaphores.3. Explain the features of the following methods of inter-task communication,

a. Semaphoresb. Queuesc. Mailboxesd. Pipes

4. Compare semaphores, events and queues for implanting inter task communication with an example.

5. Explain the inter-task communications through message queues, pipes and mailboxes.6. Why do we need timer functions in RTOS? Briefly discuss how they are provided.7. What are events? Explain the role of events in RTOS.8. Compare events with semaphores and queues.9. How memory management is done by an RTOS? Why is memory management not used in

embedded systems?10. What are the rules to be followed by the interrupt routines in RTOS? Why?

Unit 7

1. Explain the basic design principles when using an RTOS and differentiate between operating system and RTOS.

2. Explain with an example the basic design of an embedded system using a real time operating system.

3. Explain the need for encapsulating semaphores and queues with an example.4. Explain the hard real time scheduling considerations.5. Discuss various methods adopted to reduce memory space in embedded applications.

6. What are the techniques of energy and power management in an embedded system?7. Describe the function relevant to µC-OS operating systems.8. Explain the difference between a ‘Host computer system’ and a ‘Target system’ in terms of their

hardware and software.9. Explain in detail about cross-compilers and cross-assemblers.10. Write about embedded software development tools and any one debugging technique.

11. Explain the following software development models,a. Cross-compilers b. Cross-assemblers.c. Linker/Locatorsd. Loader.

2. Write short notes on,a. Address resolutionb. Initialized data and constant strings.c. Locator maps

3. Explain different methods of getting software into the target system.4. Explain in detail about the functioning of the following devices,

a. ROM Emulatorsb. Flash Memory andc. Monitors

5. Discuss about the goals for testing process.6. Give the basic technique for testing embedded software on the host system.7. Discuss the limitations of testing an embedded code on the host system.

Unit 8

1. Explain about the processor and memory organization in ARM processor.2. Discuss all the data, comparison, move and load-store instructions supported by the ARM

processor.3. Explain in details about the flow of control in ARM processor.4. Explain about the memory organization in SHARC processor.5. Discuss the data operations performed in SHARC processor.6. Explain the flow of control in SHARC processor is different from that of ARM processor.7. Discuss the procedure calls in SHARC processor.8. Explain the instruction-level parallelism in SHARC processor.9. Write a note on architectural features of ARM.10. Write about ARM architecture and compare with 8051 microcontroller architecture.11. Write a brief note on,

a. Memory organization of ARM processorb. Fixed point ALU in SHARC.

2. Write a brief notes on I2C bus.3. Write a brief notes on CAN bus architecture.4. Compare the data frame format of I2C bus and CAN bus.5. Discuss in detail about Internet – Enabled systems along with an example application.6. Write a brief note on,

a. Distributed embedded architectureb. IP Packet structure.

7. Discuss the operation of an elevator controller.

V Unit Wise – Question Bank

UNIT 1

1. Explain in detail the embedded system design process. (Nov/Dec – 2013)2. Explain the various levels of abstraction in the design of GPS moving map with a neat sketch.

(May/June – 2013)3. a) Explain the characteristics of embedded computing applications.

b) Explain the important problems or challenges that must be considered while designing an embedded system. (May/June – 2013)

4. a) Explain all the major steps involved in the embedded system design process andalso explain about the requirements analysis of a GPS moving map.b) Explain how UML is used to model systems, by taking model train controller asan example. (May/June – 2013)

5. Draw and explain an embedded system design flow. Also discuss the design challenges to optimize the design metrics in an embedded system design. (May,2012)

6. (a) Name and describe the four development models which most embedded projects are based upon.(b) Explain in brief about five challenges commonly faced when designing an embedded system. (MAY 2011)

7. a) Classify the embedded systems into small scale, medium scale and sophisticated systems.b) List the software tools needed in designing an embedded system. Discuss about any one of them. (MAY – 2010)

8. a) Explain the formalisms for embedded system design. b) List the various complex systems available and explain their performance characteristics. (MAY – 2010)

9. a) Name and describe the four development models which most embedded projects are based upon. b) Explain in brief about five challenges commonly faced when designing an embedded system. (MAY – 2010)

10. a) Explain why is the architecture of an embedded system important? b) Draw the layered embedded system model and explain about each layer.

(MAY–2010)11. Explain in detail about Embedded system design process with examples. (May/June – 2009)12. What is an Embedded system and write about the design process. . (May/June – 2009)13. Write about formalisms for embedded system design in detail. (May/June – 2009)14. Explain about Embedded Computing in detail. (May/June – 2009)

UNIT 2

1. Discuss about the interrupts and serial I/O ports of 8051. (Nov/Dec – 2013)2. a) Draw the flowchart for assembly language programming process and explain.

b) Explain when OV flag is raised.c) What is the function of PSW.3 and PSW.4? (May/June – 2013)

3. a) Explain the different modes of operation of timer/counter in 8051 microcontrollerb) Write an 8051 assembly language program for serial port programming and also explain the steps involved. (May/June – 2013)

4. Explain the basic architecture of a microcontroller with a neat diagram and how is it different from a microprocessor. (May,2012)

5. Explain the following instructions:(a)MOV, MOVX, MOVC(b)PUSH, POP(c)XCH, XCHD. (MAY 2011)

6. Describe the features of serial port of the 8051 in detail. (MAY 2011)7. a) Explain the operation of the 8051 microcontroller stack and the stack pointer with relevant

diagram. b) Discuss about special function registers and an internal ROM organization of the 8051 microcontroller. (MAY – 2010)

8. a) Explain the timer modes of operation in 8051 microcontroller. b) Discuss about SCON and PCON function registers relevant to serial data input/output in 8051 microcontroller. (MAY – 2010)

9. Explain about External and Internal Program memory. How does 8051 differentiate between the external and internal program memory ? (May/June – 2009)

10. Draw the memory organization in 8051 and explain in detail. (May/June – 2009)11. Draw the block diagram of the 8051 microcontroller and describe in detail about its hardware

features. (MAY – 2010)

UNIT 3

1. A) Write a program to check the status of ON\OFF condition of 8 machines using 8051.b) Explain any two programming tools used for Assembly Language Programming. (Nov/Dec – 2013)

2. a) Explain the siginificance of the following pins (i) ALE (ii) (iii) (iv) b) List the addressing modes of 8051 with an example for each. (May/June – 2013)

3. a) Write an 8051 assembly language program for multiplying the unsigned number in register R3 by the unsigned number on port2 and storing the result in external RAM locations 10h and 11h.b) Write a program to read data from P0 and echo it to P1continuously while giving a copy of it to the serial COM port to be transmitted out serially. (May/June – 2013)

4. a) Explain the learning process for assembly language programming. (MAY – 2010)b) Differentiate manual assembly process & automated assembly process. (MAY 2010)

5. a) Explain how to perform testing programs using a personal computer. b) Explain how to perform testing programs on a single-board computer. c) What is importance of testing programs? (MAY – 2010)

6. Explain the various addressing modes and logical operations of 8051 with examples. (May/June – 2009)

7. Explain about Assembly Language Programming tools and techniques. (May/June – 2009)8. Write about Arithmetic operations and explain with examples. (May/June – 2009)9. a) Explain the interfacing of A/D converter with 8051 microcontroller.

b) Write an assembly language program for the same. (May/June – 2009)10. Explain about data transfer and logical instructions with examples.(May/June– 2009)11. Write about the assembly language programming process, programming tools and Techniques.

(May/June – 2009)12. (a)With a diagram, show the memory mapping of the 8051 microcontroller.

(b)Find the baud rate for the serial port in mode0 for a 6MHz crystal.(c)Find the largest possible time delay for a timer in mode1 if a 12MHz crystal is used. (MAY 2011)

13. a) Explain how to understand the assembler program. Discuss about assembler directives. (MAY – 2010)b) What are the diamond decision elements? Discuss about them with simple 8051 decision instructions. (MAY – 2010)

14. a) Explain the commands that get data from ROM addresses. b) Explain the commands that exchange data. (MAY – 2010)

15 a) Explain the organization of RAM and ROM in 8051 with a neat structure.b) Write the difference between the operation of timers and counters.(May/June–2013)

16.Explain the types of JUMP and CALL instructions of 8051 with examples. (May/June – 2009) 17.Explain the timer modes of operation of 8051 in detail. (May/June – 2009)

21.Explain about the arithmetic operations and interrupts. (May/June – 2009)

UNIT 4

1. Describe the function of various blocks of psoc (Nov/Dec 2012)2. Explain the operation of psoc based capacitive sensor used for robust detectionof the human finger with a light touch.(may/june2013)

UNIT-5

1. Explain how serial communication from one i/o device to another i/o device is done using psoc (Nov/Dec 2012)2. Explain any one of the application of psoc (Nov/Dec 2012)3. Explain the features of the psoc3 and psoc5 architectures with neat diagrams(may/june2013)

UNIT 6

1. Briefly discuss the various software development tools used in the design of embedded systems. (May/June – 2013)

2. a) Explain how semaphores are useful as a signaling device.b) Explain about events and compare different methods for inter task communication. (May/June – 2013)

3. a) What is a task? What are the various task states explain for an example. b) What is a semaphore? How is it used for a critical section of a design? (May,2012)

4. Write the pros and cons of restricting the use of RTOS functions and features in developing embedded software using RTOS with a suitable example application. (MAY 2011)

5. Discuss the commonly asked questions on using timer functions as RTOS services. (MAY – 2010)6. Explain in detail the process of building software for embedded system.(MAY–2010)7. a) Explain how semaphores make a function reentrant with an example code using nucleus RTOS

function prototypes. 8. b) Write the merits and demerits of using multiple semaphores in an application. (MAY – 2010)

UNIT 7

1. Explain the various inter process communication mechanisms used in RTOS. (May/June – 2013)2. a) Compare various techniques of loading software in to the target system for testing

b) Explain the operation of logic analyzer both in timing mode and state mode. (May/June – 2013)

3. What is a queue and a pipe? How do they help in inter task communication? Explain each with an example. (May,2012)

4. (a)What are Reentrant functions? Explain how to decide if a given piece of function code is reentrant.(b)Verify whether the following function is reentrant with justification? If not, modify the code to make it reentrant using semaphores or any other mechanism Static int iValue; int iFixValue(int iParm){ int iTemp; iTemp = ivalue; iTemp +=iParm * 17;If (iTemp 4922 ) iTemp = iParm; iValue = iTemp; iParm = itemp+179; if (iParm < 2000) return 1; else return 0;} (MAY 2011)

5. Describe memory management function prototypes in Multi Task RTOS with an example. Assume suitable data wherever necessary. (MAY – 2010)

6. Discuss in detail how interrupt routines are tested in the test environment of testing on host machine. Give an example code of your choice. (MAY – 2010)

7. Write about Embedded software Development tools and any one Debugging Technique. (May/June – 2009)

8. Explain the basic design principles when using an RTOS and differential between operating system and RTOS. (May/June – 2009)

9. Write notes on a. Semaphores and queues in RTOS b. Hard Real-Time Scheduling Considerations (May/June – 2009)

10. Write in detail about Debugging techniques in Embedded software.(May/June–2009)11. Explain the basic design principles when using an RTOS and differentiate between Operating

system and RTOS. (May/June – 2009)12. Explain in detail about an Embedded software development tools.(May/June – 2009)13. Discuss in detail the goals of typical testing process for testing the target system. (May/June –

2009)14. a) Describe different types of data in an RTOS-based Real-Time System with their characteristics.

b) What do you understand by shared data problem? Explain with an example. (May/June – 2009)

UNIT 8

1. With a neat diagram explain the processor and memory organization of ARM processor. (May/June – 2013)

2. a) Explain about physical and electrical organization of a CAN bus along with itsdata frame format.b) Explain the theory of operation and requirements of an elevator controller with neat diagram. (May/June – 2013)

3. Explain in detail CAN Bus protocol. (May,2012)4. Explain the memory organization and Instruction Parallelism in ARM processors. (May,2012)5. a) How does a networked embedded system design process differ from standalone system?

b) Draw a neat block diagram of SHARC architecture and describe the same. (May,2012)6. Draw a neat block diagram of data path model of ARM processor. (May,2012)7. a) Describe the SHARC processor with the help of its functional block diagram.

b) Write short notes on SHARC Link ports. (MAY 2011)8. Describe the various architectural features of one of the SHARC processors of your choice with its

functional block diagram. (MAY – 2010)9. a) What is I2C bus? Describe its functional features and applications.

b) What is a CAN bus? Describe its functional features & applications.(MAY–2010)10. Explain how memory organization of ARM processor is different from conventional general

purpose processors memory organization. (MAY – 2010)11. Write two applications of SHARC processor-based systems with functional block diagram for

each application and explain its working. (MAY – 2010)12. Draw ARM7 Architecture and explain its features in detail. (May/June – 2009)13. Write about ARM architecture and compare with 8051 micro controller architecture. (May/June –

2009)14. Describe about ARM architecture, organization and specifications in detail. (May/June – 2009)15. Write about Processor and memory organization and instruction level parallelism in any one

advanced architecture. (May/June – 2009)

VI Unit Wise – Objective Questions

UNIT – 1

1. Absolute object file ________.

(a) has fixed non-relocatable addresses and is used by a device programmer

(b) has fixed non-relocatable addresses and is used by an emulator

(c) has fixed addresses and is used by a simulator

(d) is from an RTOS

2. Macro Assembler ________.

(a) assembles macros only

(b) assembles macros as well as subroutines only

(c) assembles macros as well as subroutines and ISRs

(d) generates software building blocks

3. Breakpoint________.

(a) removed before testing the codes

(b) removed before burning in the codes in PROM

(c) added before burning in the codes in PROM

(d) need not be removed

4. Assembler is a tool to________.

(a) develop and editing source file in assembly language and create list and object files, and object file is executable after linking/location

(b) develop and editing compiled file in assembly language and create object file, which is executable after linking/locating

(c) assemble file in assembly language and create object file, which is executable after linking/locating

(d) assemble macros

5. Burning the codes actually means________.

(a) erasing the select cells as per the source program hex-file

(b) writing the 0s at select cells as per the source object file

(c) converting the 0s at select cells into 1s as per the source program hex-file

(d) converting the 1s at select cells into 0s as per the source program hex-file

6. Code Bank________.

(a) is a code in the register bank of internal memory space in 8051

(b) code bank is used only in IDE generated object files for 8051 architecture

(c) memory bank of 64 kB size each in a program of code size greater than 64 kB and is used in extended 8051 as well as hardware bank switched 8051 classic architecture

(d) code bank is used only in extended 8051 architecture microcontrollers

7. Code optimization is to reduce________.

(a) the code size

(b) the code size and increase the code execution speed

(c) the code size or increase the code execution speed or both as per the option chosen

(d) the code size or decrease the code execution speed or both as per the option chosen

8. Compiler is a tool to develop and editing source file in high- level language and create _________.

(a) absolute object file

(b) assembled source file and absolute object file

(c) assembled source file, list file and absolute object file

(d) assembled source file, list file and object file

9. C51 compiler can have________.

(a) fourteen data types to specifically handle 8051 specific features

(b) only standard data bit, char, short, int, float and long data types

(c) only standard data unsigned and signed char, unsigned and signed short, unsigned and signed, int, float and long data types

(d) ANSI C standard data types

10. In an embedded system device means________.

(a) A microcontroller or peripheral IO or memory or memory system for a particular purpose or part of the application or application and the actions of which are controlled by the program sent or put into it

(b) A peripheral IO or memory or memory system interfaced to the microcontroller for a particular purpose or part of the application or application and the actions of which are controlled by the program sent or put into it

(c) A non-programmable peripheral IO or memory or memory system interfaced to the microcontroller

(d) ADC, timer, serial port and IO ports with the control, status and data registers

11. Emulator________.

(a) emulates the microcontroller

(b) emulates the microcontroller IOs, serial ports and timers and internal devices

(c) is a software embedded into a microcontroller

(d) is a simulator

12. Hex-file is Intel hex-formatted________.

(a) file of hexadecimal codes at different addresses

(b) file of binary codes at different addresses

(c) ASCII text file of hexadecimal codes at different absolute addresses

(d) binary file of hexadecimal codes at different addresses

13. Library is for ready made object codes for________.

(a) standard function

(b) standard function and common application functions, which can be linked when required

(c) common application functions, which can be linked when required

(d) for ready made object codes for standard function and common application functions, which can be exported when required

14. Monitor________.

(a) is in target board, runs application, and gets command during debugging

(b) is in a debugger at target board

(c) is in emulator board

(d) runs application at target board

15. Reentrant function is a function, which________.

(a) returns from the interrupt or diversion

(b) after return from the interrupt or diversion reenters into the same state of CPU, registers and variables as before leaving

(c) after return from the interrupt or diversion reenters into the same state of registers and stacks as before leaving

(d) after return from the interrupt or diversion reenters into the same state of CPU and stack as before leaving

Fill in the blanks

1. A tool to develop and edit source file in high- level language and create assembled source file, list file and object file is called________. The object file is executable after linking/location.

2. A cross-assembler________running on the________for________the machine codes for the target CPU.

3. A compiler is called cross-compiler when________compiling machine codes for CPU at the ________

4. Data types Boolean and sfr are specific to________MCU. Defining data types help a ________performing data type checking during________and________the assignments and expressions in a program corrected.

5. A bug means an error________at the________The bug(s) is________after the testing and________the actions of the codes.

6. Development cycle consists of________in software development phase.

7. Example of devices are________, and________Actions of device are controlled by the ________

8. Device-database helps in________for an application or project.

9. Device Programmer is a laboratory tool to________and has the________in the input.

10. Conversion of object file machine codes is done by________to assembly mnemonics or high-level language statements.

11. Editor facilitates________.

12. In-circuit Emulator emulates the________functions of the target CPU and________

13. Expression in C use ________,________ and________ operators on the variables or functions.

14. Hex-File is a ________ file, which saves ________ for ________at each address in ________.

15. The device is________according to the developed software by________the codes and data in the hex-file.

16. IDE is ________ tool for selecting ________ ________, ________, ________, ________and________It uses menus, tools,________and________during development.

17. JTAG is________standard test________and________architecture, used for testing ________through the________port.

18. A file of routines or macros having large number of the object code files, and that gives an object code file(s) is called________

19. Linker is a tool________into an absolute object code file. The file is________after linking.

20. A tool to develop a file is called________when the file has the machine codes, which are located at the addresses after they are burned in by the device programmer into the device(s).

UNIT – 2

Consider 8051 family microcontroller in the following questions

1. (a) A, B and PSW

(b) A is accumulator, only B and PSW

(c) PSW is not among ones, which

(d) None of the A, B and PSW are the special functions registers

2. Number of ports used in an expanded mode are:

(a) two

(b) three

(c) four in case of additional devices present in a family member

(d) depends according to the use of external program memory or on use of external as well as data memory

3. RS0 and RS1:

(a) are not in the PSW as these are not the flags

(b) are in the register sets (banks)

(c) are the bits-4 and 5, respectively, for selecting the register bank in the PSW

(d) are the bits-3 and 4, respectively, for selecting the register bank in the PSW. Note: Bit 7 is C (carry or borrow) flag

4. Reset pin is:

(a) active when connected to 1

(b) active for a few cycles only

(c) active when connected to 0

(d) active only on watchdog timer reset

5. Bit address 0x00 and byte address 0x00 are for the:

(a) Bit 0 at 0x20 and the byte at 0x00 in the internal RAM

(b) Bit 0 at 0x00 and the byte at 0x00 in the internal RAM

(c) Bit = 0 in a SFR and the byte = 0x00

(d) Bit 0 at 0x20 and byte at 0x00, respectively

6. TH1, TL1, TH0 and TL0 SFRs are at the addresses:

(a) 0x8D, 0x8C, 0x8B and 0x8A

(b) 0xAD, 0xAB, 0xAC and 0xAA

(c) 0x8D, 0x8B, 0x8C and 0x8A

(d) not between 0x80 and 0xFF as these are not the SFRs

7. Mode bits M1 and M0 can:

(a) be set as 11 at TMOD.5 and TMOD.4 and get assigned to TH0 as an 8-bit timer

(b) be set as 00 only

(c) can be set as 00 and 10 only

(d) not be set as 11 at TMOD.5 and TMOD.4 because timer 1 does not function in mode 3

8. Timer 1 runs and timer 0 stops:

(a) when TCON.6 = 1 and TCON.4 = 0

(b) when TCON.4 = 0 and TCON.5 = 1

(c) when TCON.7 = 1 and TCON.5 = 0

(d) when TCON all bits are 1s

9. (a) Synchronous mode of operation of serial interface can either be to transmit or receive at a given instant

(b) asynchronous mode of operation of serial interface can only either be transmit or receive at a given instant

(c) synchronous and asynchronous mode of operation of serial interface can be transmit and receive at a given instant

(d) only asynchronous 10T period and 11T periods exist in the serial interface using TB8 and RB8, bits

10. When SM2 is set to:

(a) 1, it facilitates the multiprocessor communication in case of mode 1 and 3 (variable baud rate serial UART mode)

(b) 1, it facilitates sending the address for the multiprocessor communication in case of mode 2 and 3 (total 11 bit serial UART mode)

(c) 0, it facilitates the multiprocessor communication in case of mode 2 and 3 (total 11 bit serial UART mode)

(d) 0, it facilitates the multiprocessor communication in case of mode 0 only (synchronous communication mode)

11. If a period is 0.33 ms between the serial bits, we can transfer in one second when SCON sets for mode 2:

(a) 300 characters

(b) 275 only

(c) 30 characters

(d) 272 characters

12. At the RS232C because of the need to provide a margin for the attenuation and noise pickups:

(a) 0 means + 3V down to + 25V

(b) 0 means + 5V down to + 25V

(c) 1 means + 3V down to + 25V

(d) 1 means + 5 V down to + 12V

13. IP.4 is set to 1 in the interrupt priority register:

(a) synchronous serial communication mode priority becomes highest

(b) timer T1 priority becomes highest

(c) interface serial communication mode priority becomes highest

(d) synchronous serial communication mode priority becomes lowest

14. If IP register has been set as 0x00 then:

(a) INT1 has the highest priority

(b) INT0 has the highest and serial interface as the lowest priority

(c) timer overflows have the highest priorities

(d) there is no priority, interrupt processes in the order of its occurrence

Fill in the Blanks

1. MOV A, R0 is an instruction of length = _______, fetched between the states S1 and _______ and executes between states _______ and _______ and takes _______ instruction cycle, and the time taken to execute is _______ μs when the oscillator frequency = _______.

2. MOV A, direct means _______ and the addressing mode is _______ MOV A, @Ri means _______ and the addressing mode is _______ MOV A, #data8 means _______ and the addressing mode is _______.

3. Machine codes for MOV A, @R1, MOV A, R1 and XRL A, R1 are _______.

4. MOV C, 28H transfer bit from _______ at the address of the byte = _______ to _______.

5. MOV DPH, 7DH will _______ and has _______ addressing mode.

6. SP _______ by 1 _______ when a PUSH instruction executes. PC changes by _______ when MOVX @Ri, A executes.

7. ORL C, is _______ operation between C and complement of _______ ADDC instruction affects _______ flags and MUL affects _______

8. For subtracting in 8051, we must make C = _______ because _______.

9. Let A = 51H and B = 27H. After MUL AB instruction A = _______ and B = _______, and the flag _______ changes and is _______.

10. DA A after adding BCD numbers 57 and 75 will give result _______ and C = _______.

11. _______ instructions change the OV flag.

12. DJNZ direct, Rel _______ and Rel can be between +_______ and -_______.

13. The following instructions complement _______ bits of _______ after _______ μs. (i) MOV A, #FFH; (ii) MOV R0, 03H; (iii) MOV R1, #FAH; NOP; NOP; DJNZ R1, FCH; (iv) DJNZ R0, F9H; (v) XRL A, P1 and (vi) MOV P1, A. Assume XTAL frequency = 12 MHZ.

14. AJMP is used when _______ and _______ affect the SP.

15. LCALL is used when _______ and _______ affect the SP.

16. The last instruction in a routine is _______.

17. The last instruction in an interrupt service routine is _______

UNIT – 3

1. In the MCU 8051 family, which one of the following options is true?

(a) An opcode is of 1 byte length in each instruction

(b) An opcode has variable number of bits in an instruction

(c) An opcode must have the operands also specified in each instruction

(d) Opcode bits cannot coexist with the bits for the program counter

2. There are distinct MOV instructions to transfer into an SFR.

(a) Three

(b) Four

(c) Five

(d) Six

3. MOVC instructions uses as a pointer for transferring a byte of the code or constant into the accumulator.

(a) PC

(b) Ri, DPTR, A + DPTR, A +PC, Ri

(c) Ri + PC, DPTR, A +PC

(d) No DPTR

4. SFR at address 83H has 20H and at 82H has FEH. INC DPTR

(a) Will not affect the SFRs

(b) Will effect the DPH of DPTR

(c) Will effect DPL of DPTR

(d) Will affect both DPH and DPL

5. All logic operations on a byte

(a) Place the result into A or direct and takes the same time

(b) Place the result into A or direct and takes the same time except for the operations on immediate data

(c) Place the result into A and takes the same time except for the direct and data operations

(d) Place the result into A or direct and takes the same time except for the direct and data operations

6. If A = 05H and B = 64H, then after MUL AB the SFRs at F0H and E0H

(a) Do not change

(b) Equal 01 H and F4H

(c) Equal F4H and 01H

(d) None of these equal F4H

7. OV flag affects in

(a) Multiply and divide

(b) Addition, subtract, multiply and divide

(c) Addition and subtraction

(d) Addition, subtraction and multiply operations

8. AC flag affects in

(a) Addition, subtraction, multiply and divide

(b) Multiply and divide

(c) Addition and subtraction

(d) Addition, subtraction and multiply operations

9. A bit address using an instruction can change a bit at

(a) Bit addressable valid SFRs or select internal RAM area

(b) Bit addressable valid SFRs only

(c) Carry and bit addressable valid SFRs and select internal RAM area

(d) Carry and bit addressable valid SFRs only

10. The carry flag affects in

(a) Add, subtract, multiply and divide

(b) Add, subtract, increment and decrement

(c) Add, subtract, RRC, RLC and Boolean processing instructions

(d) Add, subtract, RRC, RLC, CJNE and Boolean processing instructions

11. NOP instruction

(a) Is a jump to the next instruction within just one cycle

(b) Does no operation and does not change the program counter

(c) Stops the clock of the CPU and does not do any operations

(d) Increments the PC by 1, stops the clock of the CPU and does not do any operation

12. If C = 1 and bit at P2.1 = 0, the ANL C, A0H execution is such that

(a) C can be either 1 or 0

(b) C = 0

(c) P2.1 = 1

(d) C and P2.1 are both 1

13. There is DJNZ 18H, 0FDH instruction at the address 1000H. After the execution of this instruction, the new instruction address is

(a) 1000H if the accumulator is 00H after decrementing

(b) 1002H if R0 is 00H after decrementing

(c) 1003H if the accumulator is 00H after decrementing

(d) 1002H if R0 is not 00H after decrementing

14. A programmer should, wherever possible for temporary data or pointer address storage

(a) Use registers

(b) Use registers and internal memory

(c) Use registers and also use the stack if the register space is insufficient

(d) Use the stack

15. Registers are used in the instructions

(a) For the temporary variables

(b) For the temporary variables or pointers

(c) As an internal RAM as well as SFRs

(d) For the temporary variables or pointers or specific purposes like an accumulator

Fill in the Blanks

1 MOV A, R0 is an instruction of length = _______, fetched between the states S1 and _______ and executes between states _______ and _______ and takes _______ instruction cycle, and the time taken to execute is _______ μs when the oscillator frequency = _______.

2 MOV A, direct means _______ and the addressing mode is _______ MOV A, @Ri means _______ and the addressing mode is _______ MOV A, #data8 means _______ and the addressing mode is _______.

3 Machine codes for MOV A, @R1, MOV A, R1 and XRL A, R1 are _______.

4 MOV C, 28H transfer bit from _______ at the address of the byte = _______ to _______.

5 MOV DPH, 7DH will _______ and has _______ addressing mode.

6 SP _______ by 1 _______ when a PUSH instruction executes. PC changes by _______ when MOVX @Ri, A executes.

7 ORL C, is _______ operation between C and complement of _______ ADDC instruction affects _______ flags and MUL affects _______

8 For subtracting in 8051, we must make C = _______ because _______.

9 Let A = 51H and B = 27H. After MUL AB instruction A = _______ and B = _______, and the flag _______ changes and is _______.

10 DA A after adding BCD numbers 57 and 75 will give result _______ and C = _______.

11 _______ instructions change the OV flag.

12 DJNZ direct, Rel _______ and Rel can be between +_______ and -_______.

13 The following instructions complement _______ bits of _______ after _______ μs. (i) MOV A, #FFH; (ii) MOV R0, 03H; (iii) MOV R1, #FAH; NOP; NOP; DJNZ R1, FCH; (iv) DJNZ R0, F9H; (v) XRL A, P1 and (vi) MOV P1, A. Assume XTAL frequency = 12 MHZ.

14 AJMP is used when _______ and _______ affect the SP.

15 LCALL is used when _______ and _______ affect the SP.

UNIT – 4

1 A System-on-Chip (SOC)-based embedded system is one which uses configurable hardware surrounding a soft or hard processor core2.Conventional FPGA-based SoC architecture consists of configurable logic blocks(CLB’s), configurable I/O blocks, programmable interconnect, and a soft or hard processor core

3The CLB is the basic building block in an FPGA.

4The basic building block in a PSoC is the Digital Block

5A Digital Block consists of the data path, input multiplexers, output de-multiplexers,configuration registers, and chaining signals

6. The programmable interconnect enables routing of signals from any Digital Block to anyof the on-chip I/O pins.

UNIT – 5

1 The PSoC 3 and PSoC 5 architectures provide you with a programmable system-on-chip that excels

in precision analog processing and digital flexibility.

2 The PSoC platform offers 8-bit and 32-bit CPUs.

3. The PSoC 3 and PSoC 5 architectures include uncommitted operational amplifiers, switched cap/

continuous time (SC/CT) blocks, and comparators.

4. The digital to analog converter (DAC) of the PSoC 3 and PSoC 5 architectures operates as either a

voltage DAC or a current DAC.

5. The UDB contains two programmable logic devices (PLDs), a datapath module, and some control

and timing logic

6. The first task to be completed upon entering main() is to call the start functions for the different components that we have added. 7.The start functions route power to those components and enable theirfunctionality.

7. UART universal asynchronous receiver transmitter

8. UART serial communications port has been a basic link to communicate between the personal computer and external devices.

9.Cypress uses the term CapSense to describe capacitive sensing.

10.CapSense allows a robust detection of the humanfinger with a light touch and without any moving parts.

11The basic process in capacitive sensing is to measure a change in capacitance that is caused by theapproach of a finger or other conductive object that can affect capacitance

11. The configurable digital functions available in the UDBs of the PSoC device can be customized foryour design and routed to any GPIO pin.

12.The digital functions can operate independently from theCPU or the CPU can monitor and control the digital logic fabric through the use of control and statusregisters.

UNIT – 6

1. Real-time means ____________.

(a) actual time

(b) time from start of a task

(c) a time that has a fixed and unalterable zero reference, which a clock advances at constant intervals and which cannot be reloaded

(d) time measured using the system clock of a real-time operating system

2. Real-time operating system is one, which

(a) allows flexible scheduling of the system resources (CPU, memory, etc.) to several tasks

(b) controls the task synchronization using signals, semaphores and messages

(c) is an OS for the microcontrollers

(d) is an OS with preemptive scheduling

Fill in the Blanks

1. A hA system consists of ____________ and the system's software supervises the running of the tasks.

2. ____________ means information of the present program counter, stack pointer and other CPU registers. When the context of one task ____________ and the context of other task ____________ then that task runs.

3. RTOS controls a task which can be in one of the following states at any given instance ____________, ____________, ____________, ____________, waiting for a specific period, and waiting till some signal or message before some specific or undefined period.

4. Real-time means ____________ from the system's start and different actions takes place in the system at different instances of this time.

5. Real-time constraint means ____________ before which a task should start after an event(s). Realtime constraint also means the ____________ up to which it must respond to an event(s), and time limit within which it must finish.

6. Real-time operating system (RTOS) is ____________ when the system requires ____________ to be done at the ____________ and in ____________ space. RTOS is in between software layer between ____________ and ____________ and, ____________ routines.

UNIT -7

1.Which of the following options is true?

(a) A task cannot call any other function

(b) A function can call a task

(c) A task can call multiple tasks in a multi-tasking system

(d) A task can be assigned to an ISR

2Which of the following options is true?

(a) A deleted task means a task not present in the RAM

(b) A deleted task means a task detached from the RTOS control and a deleted task cannot be created again

(c) A deleted task means a task detached from RTOS control

(d) A deleted task means a task detached from RTOS control and the deleted task can be created again in the same task or from another task

3. A task control block ____________.

(a) saves all the tasks ID, state, priority number, stack pointer, message pointer(s), requested action pointer(s) and return address

(b) can save the created task ID, state, priority number and return address

(c) is for RTOS multi-tasking control

(d) is assigned to a task where the task ID, state, priority number, stack pointer, message pointer(s), requested action pointer(s) and return address save

4. Which of the following options is not right?

(a) A signal is a boolean notification

(b) A signal and a semaphore are of one bit each

(c) A signal and a mutex are of one bit each

(d) A signal, a semaphore and a message are of one bit each

5. Which of the following options is right?

(a) A signal is to notify to the RTOS to permit running of a waiting task or section of a task

(b) A signal permits running of a waiting task or a section of task

(c) A signal means start a waiting task immediately on priority

(d) A signal is from a task that it has finished its task


(a) A timeout is used to let a waiting task or a section of task run after waiting for a signal

(b) A timeout is used to let a waiting task or a section of task run after waiting for a signal or message or semaphore or timer timeout

(c) A timeout is a signal not received within the defined number of ticks

(d) A timeout is a signal or semaphore or mailbox message not received within the defined number of ticks or a wait period over for a blocked task


(a) A task is a program in infinite loop under the RTOS control

(b) A task is a program thread that has no in-between branches, which lead to another end point and thus has only one start point and one end point and task program can be in infinite loop

(c) A task is a program that also has an infinite loop and starts only on a signal or action from OS

Fill in the blanks

1____________ controls the running of the tasks and interrupt-service routines using the hardware.

2The task of ____________ when ready, preempts (blocks) the low-priority task in order to function within the time constraints.

3Task in ____________ state of ready when it gets a signal for which it is waiting or gets a message for which it is waiting or time out when its waiting-period is over.

4____________ are assigned to the tasks in preemptive scheduling.

5 When the tasks run in cyclic schedule and when one completes then other is signalled to start, then scheduling is called ____________.

6 The ____________ generates a timeout at regular (preset) intervals. It is called ____________ The ____________ interrupts the RTOS at ____________. System clock ticks are used for the ____________ actions.

7 A task ____________ another task but it can call the function(s) to implement certain action(s).

8 A task i waits for ____________ when OS_wait function executes for a period = ____________.

9 A task i ____________ a signal at time t1. Then waiting task j takes the ____________ and takes over the resources (CPU, memory, IOs, etc.) and starts at time t2.

10 A task i ____________ a semaphore (token) s1 at time t1. Then waiting task j takes the ____________ and takes over the resources (CPU, memory, IOs, etc.) and starts at time t2.

11 A task i ____________ a ____________ into mailbox Ml at time t1. Then waiting task j the ____________ the message and takes over the resources (CPU, memory, IOs, etc.) and starts at time t2.

12 A high priority task must be waiting for ____________, ____________, ____________, or ____________ so that the lower priority task can run in preemptive scheduling.

13 RTX51 Tiny kernel requires only ____________ bytes of program memory codes space. When we don't need ____________, ____________, and ____________ functions we use it. Maximum number of defined tasks can be ____________. Maximum number of tasks which can be active are ____________ at an instant. It requires maximum DATA space of ____________. Bytes in Internal RAM. It requires STACK space of ____________ bytes per task.

14 RTX51 Full has the functions for preemptive scheduling. RTX51 Full has the following features.

(a) Generates the timer ticks (for cyclic interrupts) using ____________.

(b) Provides for ____________ of a high priority task by switching from a lower priority task.

(c) It has program codes of = ____________ Kbytes, data in internal RAM DATA = ____________ bytes, stack in internal RAM (IDATA) = ____________ bytes, and external memory XDATA = ____________ bytes (minimum).

(d) It has the functions to enable preemptive scheduling. high-priority task must have an infinite loop

UNIT – 8

1Philips ARM MCU LPC 21xx has _______________.

(a) 60 MHz operation, 0.18-mm CMOS, embedded fast flash

(b) 48 MHz operation, 0.18-mm CMOS, embedded fast flash

(c) 60 MHz operation, 0.13-mm CMOS, embedded fast flash

(d) 60 MHz operation, 0.13-mm CMOS, but no embedded fast flash.

2ARM _______________.

(a) instruction set and processor show RISC features

(b) processor is RISC but instruction set retaining the best of CISC features and that gives a simplicity of programming

(c) all arithmetic and logic operations are on registers

(d) all arithmetic and logic operations are on registers used as index register

3CPU registers _______________.

(a) SP, LR and PC are separate registers from r0-r15 GPR set

(b) SP and PC are separate registers from r0-r15 GPR set

(c) LR and PC are registers within the r0-r15 GPR set and a register can be assumed as SP

(d) CPSR, SP, LR and PC are registers within the r0-r15 GPR set

4For un-nested calls, _______________.

(a) SP is not necessary

(b) SP is necessary

(c) Saving PC is necessary

(d) Saving PC and LR is necessary

5 STMFD r13!,{r9-r14} instruction means store _______________.

(a) registers r9 and r14 at memory start address pointed by r13 and then increment r13 for next time to next available memory address after the block transfer

(b) word after subtracting r9 and r14 at memory start address pointed by r13 and then increment r13 for next time to next available memory address after the block transfer

(c) registers r9 and r14 at memory start address pointed by r13 and then pre-increment r13 for memory address before the block transfer

(d) registers r9 to r14 at memory start address pointed by r13 and then increment r13 for next time to next available memory address after the block transfer

6 Directly an extended address _______________.

(a) is not used in ARM

(b) is not used in ARM and a pseudo instruction is used for it by assembler

(c) Only register and immediate addressing modes are used in ARM

(d) Only register, indexed and immediate addressing modes are used in ARM

7 Condition test for _______________.

(a) GT (greater than) means N and Z =0

(b) GT (greater than) means V and Z = 0

(c) GT (greater than) means N = V and Z = 0

(d) GT (greater than) means Z = 0

8 Exception priorities are in following descending order _______________.

(a) Reset, Data Abort, FIQ, IRQ Pre-fetch Abort, SWI or Undef

(b) Reset, Data Abort, FIQ, IRQ Pre-fetch Abort, SWI and Undef

(c) Reset, FIQ, IRQ, Data Abort, Pre-fetch Abort, SWI or Undef

(d) not in fixed order, it is as per user-defined prioritization

Fill in the Blanks

1. _______________ does processing of multiple instructions and data by _______________ and pipeline- based processing.

2. A _______________ _______________ has two or more pipelines for processing in which, at an instance more than one instruction is at the fetching, decoding and executing stages.

3. Pipelining facilitates when each instruction fetch is in a single cycle, _______________ in single cycle and _______________ in the single cycle. The performance becomes _______________-times in n-stage pipeline in the pipelined processor. Pipelining gives about _______________-times greater performance in MIPS (million instructions per second) for same clock speed and same architecture implementation.

4. _______________ means a computer processor, which has …… addressing modes, _______________ length instructions, _______________ cycle times for executing an instruction and instruction decoder implementing instructions using _______________

5. Smart card interface is an interface for _______________ or _______________ -less communication with an MCU- based card.

6. SPSR Saved program status register has the bits for _______________ for the _______________ program.

7. Byte, _______________ and word are three data types in ARM.

8. SVC means _______________ and SWI instruction is used for _______________

9. Thumb means _______________ instruction set for _______________ -bit ARM. It gives advantage of _______________ density and instructions at which _______________ at run-time into _______________ -bit ARM instructions.

10. Zero wait state means _______________

11. ARM MCUs can run in _______________ power modes— _______________, _______________, _______________ and Power-off)

12. ARM has _______________ architecture. _______________ processors have _______________ addressing modes— _______________ and store architecture, _______________ register set, and …… implementation of the instructions, _______________ cycle and _______________ length of instructions.

13. RISC gives _______________ performance in MIPS. ARM has _______________ 32-bit registers with _______________ as PC, _______________ as link register for return address and conventionally _______________ as stack pointer.

14. ARM architecture-based MCUs give _______________ performance at _______________ Four MCU examples are _______________, _______________, _______________ and _______________

15. _______________ is an exception thrown for data error. Exception means _______________ condition of an _______________ interrupt or error, which _______________ and links to the handler (ISR).

16. _______________ is a memory in an MCU, in which sectors can be _______________ fast and bytes can be written _______________

17. _______________ is a term used in C program for running a function (handler) when an _______________ is thrown. ARM has SWI handler, which runs on catching an exception.

18. Exception handler means _______________, which address is specified by a vector address and which runs to respond the exception.

19. _______________ is a term used in C program for activation of a run-time condition or error or interrupt running a function (handler) or method when an exception is thrown. ARM has instruction _______________ to throw an exception.

VII Sample question papers

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