Unit 4 — DPSK QPSK/OQPSK/DPSK Manual 52 FACET by Lab-Volt Exercise Generation and Demodulation of DPSK Signal EXERCISE OBJECTIVE When you have completed this exercise, you will see the operation principle and characteristics of the DPSK signal generator by measuring the waveform and spectrum of a DPSK signal. You will also be familiar with the demodulation principle of the DPSK signal demodulator. DISCUSSION Figure 4-2 illustrates the block diagram for DPSK signal generation which consists of a DPSK encoder and a BPSK modulator. Thus, the procedure for a DPSK signal generation takes two separate steps; the differential encoding followed by the BPSK modulation. The DPSK encoder consists of an EXCLUSIVE NOR and a delay circuit, and the BPSK modulator consists of a level converter, carrier signal, and a multiplier. A cos c t A cos c t + _ + _ 1 LEVEL CONV. DPSK ENCODER DATA INPUT DELAY Figure 4-2. The block diagram for DPSK signal generation The differential encoding refers to the procedure of encoding the data differentially, that is, the presence of a binary one or zero is manifested by the symbol’s similarity or difference when compared to the preceding symbol. Figure 4-3 illustrates a differential encoding of a binary message data stream, m(k), where k is the sample time index. The differential encoding starts (second row in the figure) with the first bit of the code bit sequence, c(0), chosen arbitrarily (here taken to be one). Then the sequence of encoded bits, c(k), can be encoded in the following way: mk ck ck 1 where the symbol represents modulo-2 addition and the overbar denotes complement. In Figure 4-3, the differentially encoded message is obtained by using the above equation. In other words, the present code bit, c ( k ), is a one if the message bit, m ( k ), and the prior coded bit, c ( k -1), are the same, otherwise, c ( k ) is a zero. The third row translates the coded bit sequence, c ( k ), into the phase shift sequence, θ( k ), where a zero is characterized by a 180˚ phase shift, and a one is characterized by a 0˚ phase shift .
Transcript
Unit 4 — DPSK
QPSK/OQPSK/DPSK Manual
52 FACET by Lab-Volt
Exercise Generation and Demodulation of DPSK Signal
EXERCISE OBJECTIVE
When you have completed this exercise, you will see the operation principle and
characteristics of the DPSK signal generator by measuring the waveform and spectrum
of a DPSK signal. You will also be familiar with the demodulation principle of the DPSK
signal demodulator.
DISCUSSION
Figure 4-2 illustrates the block diagram for DPSK signal generation which consists of a
DPSK encoder and a BPSK modulator.
Thus, the procedure for a DPSK signal generation takes two separate steps; the
differential encoding followed by the BPSK modulation. The DPSK encoder consists of
an EXCLUSIVE NOR and a delay circuit, and the BPSK modulator consists of a level
converter, carrier signal, and a multiplier.
A cos ct
A cos ct+_
+_1LEVEL
CONV.
DPSK ENCODER
DATA INPUT
DELAY
Figure 4-2. The block diagram for DPSK signal generation
The differential encoding refers to the procedure of encoding the data differentially,
that is, the presence of a binary one or zero is manifested by the symbol’s similarity or
difference when compared to the preceding symbol.
Figure 4-3 illustrates a differential encoding of a binary message data stream, m(k),
where k is the sample time index. The differential encoding starts (second row in the
figure) with the first bit of the code bit sequence, c(0), chosen arbitrarily (here taken to be
one).
Then the sequence of encoded bits, c(k), can be encoded in the following way:
m k c k c k1
where the symbol represents modulo-2 addition and the overbar denotes complement.
In Figure 4-3, the differentially encoded message is obtained by using the above
equation. In other words, the present code bit, c(k), is a one if the message bit, m(k), and
the prior coded bit, c(k-1), are the same, otherwise, c(k) is a zero.
The third row translates the coded bit sequence, c(k), into the phase shift sequence, θ(k), where a zero is characterized by a 180˚ phase shift, and a one is characterized by a 0˚ phase shift.
Unit 4 — DPSK
QPSK/OQPSK/DPSK Manual
FACET by Lab-Volt 53
Informationmessage
1 1 0 1 1 1 0 0 1 1 0
Differentially encoded message
1(ref.) 1 1 0 0 0 0 1 0 0 0 1
Corresponding phase shift
0 0 0 ̟ ̟ ̟ ̟ 0 ̟ ̟ ̟ 0
Figure 4-3. Example of Differential Encoding
The procedure for DPSK signal demodulation also takes two separate steps; the BPSK
demodulation which uses coherent detection followed by the differential decoding.
Figure 4-4 illustrates the block diagram for DPSK decoder which consists of an
EXCLUSIVE NOR and a delay circuit. That is, the differentially encoded message is
obtained by using the following equation.
m k c k c k1
where the symbol ⊕ represents modulo-2 addition and the overbar denotes
complement. In other words, the present message bit, m(k), is a one if the code bit, c(k),
and the prior coded bit, c(k-1), are the same, otherwise, m(k) is a zero.
DELAY
Encoded
Message Decoded
Message
Figure 4-4. The block diagram for DPSK decoder
Figure 4-5 illustrates an example of a differential decoding of the sequence of encoded bits, c(k), where k is the sample time index. The sequence of encoded bits, c(k), is
delayed by a bit to give the prior coded bit, c(k-1).
Then the message data stream, m(k), can be decoded by the EXCLUSIVE NOR of the
encoded bits, c(k) and the prior coded bit, c(k-1).
Encoded message 1 1 1 0 0 0 0 1 0 0 0 1
Delayed message 1 1 1 0 0 0 0 1 0 0 0 1
Decoded message 1 1 0 1 1 1 0 0 1 1 0
Figure 4-5. Example of Differential Decoding
Unit 4 — DPSK
QPSK/OQPSK/DPSK Manual
54 FACET by Lab-Volt
EQUIPMENT REQUIRED
Description
FACET base unit
QPSK/OQPSK/DPSK circuit board
Virtual Instrument*
Oscilloscope, dual trace
Spectrum Analyzer
Function Generator
Generator, sine/square wave
Power supply, 15 Vdc (2 required)**
* Throughout this manual, settings for the oscilloscope, function generator, and spec-
trum analyzer refer to Lab-Volt’s Virtual Instrument Model 1250. Equivalent instrumen-
tation may be substituted.
** Only required if the FACET base unit does not contain a power supply
