Intro to Semicon

Field Effect Transistor

FETs

• The acronym FET stands for Field Effect Transistor.

• It is a three-terminal unipolar solid-state device in which current is controlled by an electric field as is done in vacuum tubes.

• Two Types of FETs:

1. JFET

2. MOSFET

FETs

JFETs

• Basic Construction- it can be fabricated with either an N-channel or P-channel though N-channel is generally preferred.- for fabricating an N-channel JFET, first a narrow bar of N-type semiconductor material is taken and then two P-type junctions are diffused on opposite sides of its middle part.- these junctions form two P-N diodes or gates and the area between this gates is called channel.

JFETs

JFETs

- the two P-regions are internally connected and a single lead is brought out which is called the gate terminal.- Ohmic contacts are made at the two ends of the bar - one lead is called source terminal and the other drain terminal.- when potential difference is established between drain and source, current flows along the length of the bar through the channel located between the two P-regions.

JFETs

- the current consists of only majority carriers.• Source

- it is the terminal through which majority carriers enter the bar.

• Drain

- it is the terminal through which majority carriers leave the bar. The drain-to-source voltage VDS drives the drain current ID.

JFETs

• Gate- these are two internally-connected heavily-doped impurity regions which form two PN junctions. The gate-source voltage VGS reverse-biases the gates.

• Channel- it is the space between two gates through which majority carriers pass from source-to-drain when VDS is applied.

JFETs

• Theory of Operation

1. Gates are always reversed-biased. Hence, gate current IG is practically zero.

2. The source terminal is always connected to the end of the drain supply which provides the necessary charge carriers.

JFETs

• When VGS = 0 and VDS = 0

- in this case, drain current ID = 0, because VDS = 0. The depletion regions around PN junctions are of equal thickness and symmetrical.

JFETs

• When VGS = 0 and VDS is increased from zero

- the JFET is connected to the VDD supply- the electrons flow from S to D whereas conventional drain current ID flows through the channel from D to S.- the gate-to-channel bias at any point along the channel is = /VDS/ + /VGS/.

- since external bias VGS = 0, gate-channel reverse bias is provided by VDS alone.

JFETs

- since the value of VDS keeps decreasing, as we go from D to S, the gate-channel bias also decreases accordingly.

- it has a maximum value in the drain-gate region and minimum in the source-gate region.

- depletion regions penetrate more deeply into the channel in the drain-gate region than in the source-gate region.

JFETs

- as VDS is gradually increased from zero, ID increases proportionally as per Ohm’s law.

- the ohmic relationship between VDS and ID continues till VDS reaches a certain critical value called pinch-off voltage VPO when drain current becomes constant at its maximum value called IDSS.

JFETs

- when VDS is increased beyond VPO, ID remains constant at its maximum value IDSS up to a certain point.

- ultimately, a certain value of VDS (called VDSO) is reached when JFET breaks down and ID increases to an excessive value.

JFETs

JFETs

• When VDS = 0 and VGS is decreased from zero

- in this case, as VGS is made more and more negative, the gate reverse bias increases which increases the thickness of the depletion regions.

- the channel is said to be cut-off

- the value of VGS which cuts off the channel and hence the drain current is called VGS(off).

JFETs

JFETs

• When VGS is negative and VDS is increased

- values of VP as well as breakdown voltages are decreased.

JFETs

• Static Characteristics of a JFET

1. Drain Characteristics – it gives the relation between ID and VDS for different values of VGS.

2. Transfer Characteristics – it gives relation between ID and VGS for different values of VDS.

JFETs

JFETs

• JFET Drain Characteristic with VGS= 01. Ohmic Region – this part of the characteristic is linear indicating that for low values of VDS, current varies directly with voltage.

2. Curve AB – in this region, ID increases at reverse square-law up to point B which is called pinch-off point.3. Pinch-off Region – it is also known as saturation region.

JFETs

JFETs

• JFET Characteristics with External Bias

- pinch-off voltage is reached at a lower value of ID than when VGS = 0.

- value of VDS for breakdown is decreased

JFETs

• Transfer Characteristic

ID = IDSS ( 1 – VGS/VP)2

MOSFET OR IGFET

• Depletion-Enhancement MOSFET or DE MOSFET

- it can be operated in both depletion mode and enhancement mode by changing the polarity of VGS.

- it is known as normally-ON MOSFET

DE MOSFET

• Construction

- it has source, gate and drain

- its gate is insulated from its conducting channel by an ultra-thin metal-oxide insulating film.

DE MOSFET

• Working

- depletion mode

- a DE MOSFET behaves like a JFET

DE MOSFET

- enhancement mode

- positive gate operation

DE MOSFET

• Static Characteristics of a DE MOSFET

MOSFET or IGFET

• Enhancement-only MOSFET

- operates only in the enhancement mode and has no depletion mode.

- it works with large positive gate voltages only.

- there exist no channel between the drain and source.

- normally-OFF MOSFET

E-MOSFET

E-MOSFET

ID = k (VGS – VGS(th))2