High-Mobility InSe Transistors: The Nature of Charge TransportTsung-Han Tsai,† Feng-Shou Yang,†,‡ Po-Hsun Ho,† Zheng-Yong Liang,† Chen-Hsin Lien,†
Ching-Hwa Ho,§ Yen-Fu Lin,‡ and Po-Wen Chiu*,†,∥,⊥
†Department of Electrical Engineering, National Tsing Hua University, Hsinchu 30013, Taiwan‡Department of Physics, National Chung Hsing University, Taichung 40227, Taiwan§Graduate Institute of Applied Science and Technology, National Taiwan University of Science and Technology, Taipei 10617,Taiwan∥Institute of Atomic and Molecular Sciences, Academia Sinica, Taipei 10617, Taiwan⊥Frontier Research Center on Fundamental and Applied Science of Maters, National Tsing Hua University, Hsinchu 30013, Taiwan
*S Supporting Information
ABSTRACT: InSe is a high-mobility layered semiconductorwith mobility being highly sensitive to any surrounding mediathat could act as a source of extrinsic scattering. However, littleeffort has been made to understand electronic transport in thinInSe layers with native surface oxide formed spontaneouslyupon exposure to an ambient environment. Here, we explore theinfluence of InOx/InSe interfacial trap states on electronictransport in thin InSe layers. We show that wet oxidation(processed in an ambient environment) causes massive deep-lying band-tail states, through which electrons conduct via 2Dvariable-range hopping with a short localization length of 1−3nm. In contrast, a high-quality InOx/InSe interface can beformed in dry oxidation (processed in pure oxygen), with a lowtrap density of 1012 eV−1 cm−2. Metal−insulator transition canbe thus observed in the gate sweep of the field-effect transistors (FETs), indicative of band transport predominated by extendedstates above the mobility edge. A room-temperature band mobility of 103 cm2/V s is obtained. The profound difference in thetransport behavior between the wet and dry InSe FETs suggests that fluctuating Coulomb potential arising from trappedcharges at the InOx/InSe interface is the dominant source of disorders in thin InSe channels.
KEYWORDS: InSe, transistor, mobility, localization, trap states, variable range hopping
■ INTRODUCTION
Layered semiconductors are gaining attention as an activecomponent of future nanoelectronic and optoelectronicdevices with functionalities that are absent in conventionalbulk semiconductors such as high speed, high flexibility, andlow power consumption.1−6 In particular, they feature theexotic properties of high mobility as the out-of-planedimension is thinned down to an atomic scale. Blackphosphorus (BP) and indium selenide (InSe) are therepresentative high-mobility layered materials because oftheir small effective mass (me* = 0.15m0 for BP and me* =0.14m0 for InSe) and p-like character in band edges.7−10
However, the lack of structural stability in an ambientenvironment makes BP to be of minor interest for practicalapplications.11,12 This draws most research attention toInSe,8,13,14 a more stable metal−chalcogen double layer witha honeycomb lattice covalently bonded in a Se−In−In−Seconfiguration.Early studies have shown that InSe bulk exhibits intrinsic
mobility of 103 cm2/V s at room temperature, which increases
up to 104 cm2/V s at cryogenic temperature, indicating anoverwhelming role of phonon scattering in band transport viaextended electronic states.15,16 Thinning of InSe results in anappreciable reduction of mobility and a reverse of itstemperature dependence. The mobility decreases monotoni-cally with the reduction of temperature, implying the onset ofthermally assisted transport. On the one hand, the substrateeffect comes into play in the thin InSe layers because of theweakening of screening. Any surrounding medium that comesin intimate contact with the thin InSe layers could act as asource of extrinsic scattering and lowers the mobilityaccordingly. On the other hand, spontaneous surface oxidationis of increasing importance in the thin InSe layers. A newinterface sets in and generates another source of Coulombscattering. The presence of charged impurities or polarizationfields at the interface between the substrate and the thin InSe
Received: June 24, 2019Accepted: September 6, 2019Published: September 6, 2019
layers has shown its profound influence on electron mobility,resembling the cases found in MoS2.
17,18 Such interfacialCoulomb potential is also reminiscent of mobility lowering forgraphene lying on the SiO2/Si substrate,
19 as is evident by theformation of electron−hole puddles near the charge neutralityof the Dirac cone.20 Screening of the interfacial Coulombpotential by means of h-BN encapsulation or substratepassivation has been applied to boost intrinsic mobility to1−2 × 103 cm2/V s at room temperature,8,13,21 an order of
magnitude higher than that of any documented transition-metal dichalcogenides.Despite the rapid progress in mobility engineering, the
nature of electron transport in thin InSe layers remains poorlyunderstood. Unlike graphene and MoS2, which are chemicallyinert, the InSe surface is prone to adsorb gas molecules becauseof the presence of lone-pair states of Se at the top of thevalence band.22 A thin native oxide is progressively formedwhen exposed to an ambient environment, forming chargedtraps at the InOx/InSe interface with poor screening. The
Figure 1. InSe FETs with thin surface tunnel oxide. (a) Cross-sectional schematic of InSe FETs with thin surface oxide on the top. The right panelof the diagram shows one kind of oxide polyhedra with corner sharing. The wet oxide contains not only structural vacancies but also hydroxylgroups, responsible for the larger hysteresis in the gate sweep shown in (b). (b) Room-temperature Ids−Vgs curves of InSe FETs with dry (d-InSe)or wet (w-InSe) surface oxide. The InSe channel length defined by the hard-mask evaporation is 15 μm.
Figure 2. LF noise characterization of the d- and w-InOx/InSe interfaces. Typical PSDs as a function of frequency under different applied Vgs for(a) d- and (b) w-InSe FETs. The dashed line represents the slope of the 1/f trend. The value of Vds was kept at 0.1 V. (c) Mean value of estimatedα and β for the dry and wet FETs. (d) Normalized current fluctuation, SΙ/Ids
2, with the best fits as a function of Ids extracted at f = 20 Hz and Vds =0.1 V. The dashed line represents the HMF model. (e) αsc values were calculated for the d- and w-InSe FETs. (e) Effective trap density profiles atVgs = 80 V for the d- and w-InSe FETs. (f) Density of interface trap states in the d- and w-InSe FETs.
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fluctuating Coulomb potential from the trapped charges isexpected to cause massive localized states in a InSe channeland would play a dominant role in charge transport. Here, weinvestigate temperature- and gate-dependence of electricalconductivity, low-frequency (LF) noise, and gate dependenceof the optical response time to explore the nature of band-tailstates and their impact on charge transport in thin InSe layers.Two types of oxide interface are employed: wet oxide, which isformed naturally in ambient conditions, and dry oxide which isgrown in pure oxygen conditions. By comparing the transportbehavior in the devices with distinctive interfaces, we show thatthe trap states which predominate charge transport in the thinInSe layers are not arising from the SiO2/Si substrate interfaceas previously noted but from the InOx/InSe interface. Thedeep-lying trap states at the wet oxide interface cause hoppingtransport, while the dry oxide interface features the low densityof shallow traps that allow band transport at a low accessiblegate voltage.
■ EXPERIMENTAL SECTIONGrowth of InSe Crystals. InSe crystals were grown by the
chemical vapor transport method using ICl3 as a transport agent. Inand Se (with purity of 99.9999 and 99.999%, respectively) were usedto prepare the powder compounds of the crystals by reaction at 600°C for 2 days in evacuated quartz ampoules. To improve thestoichiometry, Se with an extra 1 mol % was added to thestoichiometric mixture of the constituent elements. Each element(10 g), along with an appropriate amount of the transport agent (10mg/cm3 ICl3), was introduced into a quartz ampoule, which wasevacuated to 10−6 Torr and sealed. The growth was carried out at a
growth temperature of 600 °C (heating zone) → 500 °C (growthzone) with a gradient of −5 °C/cm. The growth lasted for 288 h toproduce large crystals.
Device Fabrication. InSe flakes were exfoliated on the Si/SiO2substrates with 290 nm dry oxides. The exfoliation process was carriedout in a glovebox filled with pure nitrogen. For the InSe flakes withdry oxide, the samples were quickly transferred to a sealed chamberfilled with 30 Torr of ultrapure oxygen (99.999%) for one day. For theInSe flakes with wet oxide, the samples were exposed to the ambientenvironment for one day. For the fabrication of field-effect transistors(FETs), 20/50 nm Ti/Au electrodes were deposited through ashadow mask using a thermal evaporator.
Raman Characterization. A micro Raman spectrometer (LabRa-man 800, Horiba Jobin Yvon) equipped with a motorized samplestage and an excitation light source of 532 nm laser was used toacquire the spectra. The laser power was set below 0.1 mW to avoidlaser-induced heating and damage.
LF Noise Measurements. The LF noise measurements of theInSe FETs were carried out using the Programmable Point-ProbeNoise Measuring System (3PNMS, Synergie Concept Co.) with asystem noise floor of ∼1 × 10−27 A2 Hz−1. To minimize externalelectrical interference to the monitored charge fluctuations, all LFnoise measurements were performed in a grounded metal chamber ona vibration-isolated table in the dark.
■ RESULTS AND DISCUSSION
Figure 1a shows the schematic of a back-gated InSe FET.Degenerately doped silicon, which is covered with 285 nmSiO2 atop, serves as the substrate and back gate. Thin InSelayers used in the current study are ∼13 nm in thickness,obtained by mechanical exfoliation on the Si substrate in a
Figure 3. Electron transport in w-InSe FETs. (a) Conductivity as a function of back-gate voltage at different temperatures. The inset shows theoptical image of the device. (b) Conductivity fits to the Mott VRH model for a range of gate biases. (c) Characteristic temperature T0 as a functionof back-gate voltage, extracted from the slope of linear fits in (b).
Figure 4. Electron transport in d-InSe FETs. (a) Conductivity as a function of back-gate voltage at different temperatures. The inset shows theoptical image of the device. The dotted line is a guide to the eye that indicates the voltage of the MIT. (b) Conductivity as a function of reverse oftemperature 1/T for a range of gate biases. The solid lines are linear fits. (c) Activation energy as a function of gate voltage, acquired from the linearfits to the Arrhenius-activated transport model. The dotted line, a guide to the eye, indicates the gate voltage at Ea = 0.
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glovebox. Right after exfoliation, a thin surface oxide wasgrown for 24 h either in a sealed chamber filled with pureoxygen (dry oxide, d-InOx) or in an ambient environment (wetoxide, w-InOx). A characteristic Ag mode of In2O3 appears in
the Raman spectra of the thin InSe layers for both wet and dryoxidation (Supporting Information).23 A noticeable broadband at 160−260 cm−1 also appears in the w-InOx because ofthe formation of the amorphous structure with hydroxylgroups incorporated.14,24,25 After the oxidation process, metalcontacts were made on top by thermal evaporation with a hardmask aligned on the target InSe flake to define the channelregion. Electron-beam irradiation or any solution process isfound to cause an immediate degradation in the crystallinestructure, penetrating deep and turning the top InSe layersamorphous. Electron-beam or optical lithography is thusavoided to provide a well-defined InOx/InSe interface. Thedry oxide usually appears to be under-stoichiometric incomposition with few Se residues and oxygen vacancies.25
The resulting polarization field in the oxide causes a profoundhysteresis in the Ids−Vgs curves of the transistor, as shown inFigure 1b. The current increases at Vgs > 0, indicating anintrinsic n-type behavior. The dry oxide acts as a thin tunnelbarrier and effectively eliminates Fermi-level pinning at thesource/drain metal contacts, yielding a high on-state current inthe order of 102 μA/μm in the transfer characteristics.14 Incontrast, a much larger hysteresis shows up in the Ids−Vgs
curves of the FET with wet oxide (w-InSe FET), rationallyattributed to the presence of a massive amount of oxygenvacancies and hydroxyl groups in the oxide.24−26 The on-current drops by 2 orders of magnitude as compared to theFET with dry oxide (d-InSe FETs). The difference for chargetransport at the dry and wet oxide interfaces stemsfundamentally from different origins. The different nature ofcharged interfacial states in the oxide determines the
Figure 5. Electron mobility in d-InSe FETs. (a) Effective mobility as afunction of gate voltage measured at various temperatures. (b)Effective mobility and the corresponding band mobility as a functionof temperature at Vgs = 30 V.
Figure 6. Optical properties of band-tail states in w- and d-InSe FETs. (a,d) show a single cycle of temporal photoresponse upon white lightillumination for Vgs = 0, −40, and −80 V in w- and d-InSe FETs, respectively. The power density of illuminated light is 2 mW/cm2. With increasein the negative gate voltage, the fall time reduces. (b,e) are simplified energy-band diagrams to depict carrier excitation, recommendation, andtrapping dynamics. The continuous band-tail states near the conduction band edge, mid gap, and valence band edge are approximated by discretedistribution. The red dotted arrow indicates the slow recombination process occurred at the midgap deep traps, while the blue dotted arrow is forthe fast recommendation at the shallow traps. (c,f) are schematics of the density of states in thin InSe layers with w- and d-InOx/InSe interfaces,respectively. The w-InOx/InSe interface exhibits massive midgap traps that are responsible for the slow recommendation process found in (a). Incontrast, the d-InOx/InSe interface has much lower band-tail traps, leading to the ultrafast fall time observed in (d).
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characteristics of the band-tail states in InSe and is the focus ofthe current study.To gain insight into transport behaviors in solid-state
electronics, LF noise measurement has been utilized as ameans to diagnose fluctuation sources of the carrier flow in theconducting channels and also to provide relevant informationabout the quality and reliability of devices, especially fordownscaling transistors because of their high surface-to-volumeratio.27−33 Typical power spectral densities (PSDs) of currentfluctuations, SΙ , are shown in Figure 2a,b as a function offrequency under different applied Vgs for the d- and w-InSeFETs, respectively. The frequency range was from 2 to 10 kHz.The value of Vds was kept at 0.1 V, in which the chargefluctuations mostly stem from the layered InSe-conductingchannel rather than from the contact resistance. The staticacquisitions of the corresponding output characteristics for thed- and w-InSe FETs are shown in Figure S2. Such linear Ids−Vds variations imply a low contribution from the contacts. Inaddition to the linearity of the output characteristics, thesource/drain contact resistance values are further found to be 2× 106 and 7 × 106 Ω for d- and w-InSe FETs, respectively,based on the Y-function method.34 Both the estimated valuesfrom the Y-function method are the upper bound of contactresistances in transistors and are only occupied less than 20%of total device resistances, which again suggest that theelectrical properties are dominated by the InSe channel. InFigure 2a,b, one can readily see that with increase in Vgs, SΙsignificantly increases at a fixed frequency for both d- and w-InSe FETs and exhibits a clear 1/f spectral trend. The dashedline showing the ideal 1/f dependence is also plotted as anintuitive comparison. It is worth noting that the system noisehas been subtracted from the measured LF noise for eachelectrostatic field condition. The upswing PSDs under highfrequencies and low Vgs, which come from the instrumentallimitations, do not affect the analysis of the LF signals in thefollowing discussion. To further determine how closely thePSDs can obey the 1/f dependence, the experimental LF noisewas characterized by the empirical law SΙ/Ids
α ∝ f−β, where αand β are the scaling exponents for the current and frequency,respectively. In Figure 2c, the exponent α = 2.03 ± 0.1 and2.04 ± 0.09 for the d- and w-InSe FETs, respectively, suggeststhat 1/f noise is an equilibrium phenomenon and is generatedby fluctuations in resistance as opposed to being driven by theapplied current heating.35 SΙ as a function of Ids, which variesquadratically with the increase of Ids, is provided in Figure S5.It should be emphasized that such Ids-dependent SI stronglyindicates charge fluctuations that are dominated by theconducting InSe channel as well as the occurrence of theohmic contact at the source/drain metal interfaces.30,36 Thenormalized SΙ for both FETs is further offered and shown inFigure S6. The exponent β for both FETs is derived and closeto unity with a small standard deviation, indicating uniformtrapping/scattering distribution in spaces and energies.In the LF noise models developed for silicon-based FETs,
the presence of 1/f current fluctuations can be described fromtwo main perspectives.37 When the random and uncontrolledperturbations originate from the variation of carrier numbers(Δn) in the channel, a large number of trapping/detrappingprocesses for carriers near the semiconductor interfacemodulate the flat-band potential. Taking into considerationthe correlated mobility fluctuation (CMF) due to themodulation of the scattering rate induced by the interfacecharge fluctuations, SΙ can be further normalized by the square
of the Ids values and given as SΙ/Ids2 = (1 + αscμeffCoxIds/gm)
(gm/Ids)2 SVfb, where SVfb = q2kBTNit/fWLCox
2 is the flat-bandvoltage spectral density; αsc is the Coulomb scatteringcoefficient associated with mobility fluctuation; and μeff, Cox,gm, q, kBT, and Nit are the effective mobility, gate capacitanceper unit area, gate transconductance, elementary charge,thermal voltage, and effective trap density, respectively. Wand L are the channel width and length for InSe FETs,respectively. This model is the so-called carrier numberfluctuation with CMF (CNF−CMF). If the sensibility of themobility fluctuations to trap charges is weak enough, in whichαsc can be negligible, normalized current fluctuations SΙ/Ids
2
vary as (gm/Ids)2. This reduced model is the CNF, which
mainly postulates the prevalence of surface domination. On theother hand, when mobility fluctuations (Δμ) arise from thevariation of the mean free path for charged defect scatterings,eventually leading to the electric noise, the normalized currentfluctuations can be expressed in the form of SΙ/Ids
2 ∝ 1/Ids.This 1/f model named as the Hooge mobility fluctuation(HMF) is often introduced to describe the behavior of electricnoise in terms of bulk conditions. Assuming the validity of the1/f noise behavior at sufficiently low frequencies, thenormalized PSDs can be examined as a function of Ids in alog−log scale. One can know that the normalized PSDs follows(gm/Ids)
2 for either the CNF−CMF or CNF model accordingto the scattering contribution of the electric noise, whereas itscales with the reciprocal of Ids in the HMF model.Figure 2d shows a log−log plot of the normalized PSDs for
the d- and w-InSe FETs at f = 20 Hz and Vds = 0.1 V,respectively, as a function of Ids to identify the dominant sourceof noise. The observed SΙ/Ids
2 does not obey the linear Idsvariation but evidently depends on the change in (gm/Ids)
2 overa large Ids range for both FETs. The solid lines represent thebest fits of the CNF−CMF model, indicating that the influenceof the mobility scattering cannot be effortlessly ignored. Thestraight dashed line showing the HMF model is also portrayedhere as a guide to the eye. The αsc of 1.2 × 104 V s C−1 for thed-InSe FET is further evaluated and is 2 orders of magnitudehigher than that of (∼102 V s C−1) for the w-InSe FETs, whichreveals that the bulk condition mostly dominates the charge-transport mechanism and the LF noise, being highly consistentwith the previous report in the literature.36 Because the LFnoise for both FETs was based on the CNF−CMF modelaffected by carrier-trapping/detrapping events, to delineate amore concrete picture of the microscopic nature for chargetransport, the effective trap density can be explored as afunction of the trap depth. In the best fits of the CNF−CMFmodel as shown in Figure 2d, Nit as a function of frequency canbe determined. Moreover, considering that physical carrier-trapping/detrapping occurs because of the tunneling processesbetween charge-trap states and the InSe-conducting channel,the frequency dependence of the tunneling trap depth, z, canbe expressed as z = λ ln(1/2πfτ0),
38 where τ0 is the timeconstant and is usually taken as 10−10 s and λ is the tunnelingdistance parameter. In fact, the accurate determination of λ isquite difficult because of the origin of complex trapping statessuch as interface trap states, damaged surface sites, or bulkchannel defects, hence, the λ value of approximately 10−8 cmfor general silicon-based FETs is thus used. The effective trapdensity profiles were evaluated in terms of z/λ, as shown inFigure 2f, for the d- and w-InSe FETs. It is noticed that the z/λvalue in the x axis only offers the relative distance from theconducting channel. As shown in the figure, Nit is independent
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of z/λ, which strongly illustrates that the LF noise produced bythe mechanism of the tunneling transition requires a uniformdistribution of trap states, which is self-consistent with theobservation of the 1/f behavior. Besides, the Nit of 10
12 eV−1
cm−2 for the d-InSe FET is much lower than that of 1014 eV−1
cm−2 for the w-InSe FETs. The smaller Nit observed suggeststhat fewer scattering events occur in the d-InSe FETs, yieldingbetter performance in device operations. The observed Nit forthe d-InSe FET is also compatible with the high-quality MoS2/high κ dielectric interface measured with impedance spectros-copy and photo-excited charge collection spectroscopy.39,40
The different nature of Nit at the d- and w-InOx/InSeinterfaces directly impacts the mechanism that governselectron transport. We measure the conductivity σ as afunction of Vgs in a cryogenic probe station from T = 298 to 78K, with σ ≡ Ids/Vds. The carrier density is calculated using theparallel-plate capacitor model with n = Cox(Vgs − Vth)/e, whereCox = 11.8 nF/cm2 is the gate capacitance, e = 1.6 × 10−19 C isthe elementary charge, and Vth is the threshold voltageextracted from the intersection of the tangent at the maximumtransconductance point with the Vgs axis. Figure 3a shows theVgs-dependence of σ in variable temperature measurements forthe w-InSe FETs. At Vgs>0, the increase in σ with increasing Tindicates the behavior of an insulator. The variation of σ with Tcan be described by the Mott variable-range hopping (VRH)model
σ σ= [− ]+T T T( ) exp ( / ) d0 0
1/( 1)(1)
where T0 is the correlation energy scale, d is the dimensionalityof the system, and σ0 is a temperature-dependent prefactorgiven by AT−m with m varying between 0.8 and 1. Figure 3bshows the fit to the VRH model with d = 2. Electron transportin the w-InSe FET can be well described by the model,indicating trap-limited transport behavior in the accessible Vgs.At Vgs = 0, the Fermi level is below the conduction bandminimum, located in the region of localized trap states.Ramping up Vgs populates the trap states with electrons whichtransport via thermally assisted hopping between localizedstates, resembling electron transport in the nonpassivatedmonolayer MoS2 on the silicon substrate.17,18,41,42
The localized trap states in the band tail could originatefrom poor screening of the charged impurities at the InOx/InSe interface, InSe/SiO2 interface, and/or the lattice defectssuch as selenium vacancies and grain boundaries. By analyzingthe characteristic temperature T0, we can extract thelocalization length ξ from the linear fit of the σ−T−1/3 plots(Figure 3c). Assume that Nit is constant throughout the rangeof gate sweep Vgs = 36−60 V. Taking Nit ≈ 1 × 1014 from theLF noise measurements and using T0 = 13.8/kBξ
2Nit, where kBis the Boltzmann constant, we obtain ξ ≃ 1 nm for T0 = 2 ×104 at Vgs = 36 V. Increasing T0 to 9 × 104 yields a localizationlength of ξ ≃ 3 nm at Vgs = 60 V, indicating the reduction ofdeep trap states at high gate voltage. The localization length ofthe w-InSe FET is shorter than that of MoS2 lying on theSiO2/Si substrate.
17,18
To identify the origin of the localized trap states in w-InSeFETs, we compare the Vgs dependence of σ in a variabletemperature measured for the d-InSe FET (Figure 4a). Themost prominent difference in the σ−Vgs curves of the d-InSeFET lies in that an explicit metal−insulator transition (MIT)occurs at a gate voltage VMIT, which separates two differenttransport behaviors: below the VMIT, σ increases with
decreasing T and the channel conducts via localized states bythermally assisted transport such as VRH or Arrhenius-typeactivation; above the VMIT, it turns into a metallic state andelectrons propagate as the Bloch waves on the conductionband. Although the insulator behavior at Vgs < VMIT looksintuitively similar to that observed in the w-InSe FET, themechanism governing electron transport is, however, different.Modeling σ with the VRH behavior found unfit, and only thehigh temperature σ (T > 170 K) partly follows the VRH model(Supporting Information). Another attempt to describe thetransport behavior at Vgs < VMIT is shown in Figure 4b, inwhich the conductivity versus the inverse of temperature isplotted using the Arrhenius form
ikjjjjj
y{zzzzzσ σ= −
Ek T
exp0a
B (2)
where Ea is the activation energy and σ0 is a fitting parameter.We found that neither the Arrhenius model nor the VRHmodel can individually describe the transport behavior in themeasured temperature range. The conduction mechanism ofthe d-InSe FET at Vgs < VMIT can be rationally attributed to thecombination of the two thermally assisted transport mecha-nisms. This result reflects the fact that low density of trap statesexists at the d-InOx/InSe interface, in line with the LF noisemeasurements. The different transport mechanism betweenthe w- and d-InSe FETs indicates that the InOx/InSe interfacetrap states predominate electron transport in the thin InSelayers than the Coulomb potential from the substrate interfaceor the lattice defects.Figure 4c shows the extracted activation energy Ea of the
Arrhenius plots at each gate voltage. The activation energy Eacorresponds to the energy difference between the mobilityedge EM and the Fermi energy EF, that is, Ea = EM−EF. At Ea =0, the Fermi energy crosses the mobility edge that appears atVgs ≈ 18.5 V, nearly coincident with the Vth of the room-temperature σ−Vgs curve. Knowing the location of EM allowsus to calculate the band mobility μband. We also compare it withthe effective mobility μeff which lumps the contribution oflocalized and extended states to transport together. Theeffective mobility is written as μeff = σ/en, where n is the chargecarrier at a given Vgs and can be calculated through the parallel-plate capacitor model discussed above. Figure 5a shows μeffversus Vgs at different temperatures. At a given temperature, μeffpeaks at a specific Vgs and then reaches saturation. At high Vgs,where EF is above EM, μeff increases slowly with the decrease oftemperature, unlike the sharp variation reported for MoS2.
43
μeff is < 103 cm2/V s over the measured temperature range,lower than the phonon-limited intrinsic mobility of InSe.44 Toextract the band mobility, we use μband = σ/enband, where nbandis the extended states above the mobility edge and written asnband = Cox(Vgs − VM)/e with VM being the gate voltagecorresponding to EM. Figure 5b compares μband with μeff at Vgs= 30 V in the d-InSe FET. We found that the room-temperature μband can reach ∼1200 cm2/V s, close to thetheoretical limit.44
Sweeping the back-gate voltage allows us to move the Fermienergy up or down in the band gap. Through populating ordepopulating the band-tail states, we can explore the carrierdynamics upon light modulation because the band-tail statesare responsible for the charge trapping and recombina-tion.17,45−47 Here, we measure the temporal response time atsome specific Vgs and acquire the fall time τfall, which is defined
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as the decrease of signal amplitude by 90% and related to therecombination of electron−hole pairs. Figure 6a shows thecurrent on/off response time during one cycle of lightmodulation for the w-InSe FETs. The temporal responsetime is long, in the order of 102 s. τfall decreases with increase innegative Vgs, varying from τfall = 42 s at Vgs = 0 to τfall = 21 s atVgs = −80 V. The long τfall indicates that holes are populated indeep-lying and long-lived trap states in the w-InOx/InSeinterface, spanning widely from Vgs = 0 to −80 V (Figure 6b,c).In contrast, the temporal response time in the dry oxide isultrashort, in the order of 10−4 s, as shown in Figure 6d. Thefall time decreases from τfall = 217 μs at Vgs = 0 to τfall = 165 μsat Vgs = −80 V. The rapid optical response upon lightillumination is a synergetic consequence of the low contactbarrier, which increases carrier mobility, and the shallow natureof the trap states at the d-InOx/InSe interface (Figure 6e,f).
■ CONCLUSIONSInSe is a layered semiconductor with high mobility in nature.As the thickness of InSe layers is reduced and approaches to ascale below ∼20 nm, surface oxidation takes place sponta-neously in ambient conditions. The resulting InOx/InSeinterface trap states are found to predominate electrontransport in the thin InSe FETs. For the transistors with athin surface oxide grown in air, the transport is diffusive andwell described by 2D Mott VRH, indicating the presence ofmassive trap states at the InOx/InSe interface. For thetransistors with a thin surface oxide grown in pure oxygen,MIT occurs in the temperature-dependent transfer character-istics, indicating low density of trap states at the InOx/InSeinterface, and band transport occurs at a gate voltage above themobility edge. The different landscape of the trap statesbetween the wet and dry oxides is characterized by the LFnoise measurements and the optical response time upon gatesweep. Our results shed light on the InSe band-tail states andprovide the direction for future mobility engineering in theInSe-based electronic and optoelectronic devices.
■ ASSOCIATED CONTENT*S Supporting InformationThe Supporting Information is available free of charge on theACS Publications website at DOI: 10.1021/acsami.9b11052.
Raman spectra of InSe with dry or wet surface oxides;TEM images of surface oxidation; transfer characteristicsof another InSe d-FET; output characteristics of InSeFETs; power spectral density of current; normalized SIas a function of frequency; VRH fit for the conductivityof d-InSe FETs; and band mobility of InSe d-FETs(PDF)
This work is supported by the Ministry of Science andTechnology of Taiwan under grant nos. MOST 107-2119-M-007-011-MY2, MOST 106-2119-M-007-008-MY3, MOST106-2628-M-007-003-MY3, and MOST 107-2119-M-005-006.
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