High- or Low-Side, BidirectionalCurrent Power Monitor with 2-Wire Interface
Check for Samples: INA220B-Q1
1FEATURES DESCRIPTIONThe INA220B-Q1 device is a current shunt and power• Qualified for Automotive Applicationsmonitor with an 2-wire interface. The INA220B-Q1
• AEC-Q100 Qualified with the following results: device monitors both shunt drop and supply voltage.– Device Temperature Grade 1: –40°C to A programmable calibration value, combined with an
125°C Ambient Operating Temperature internal multiplier, enables direct readouts inamperes. An additional multiplying register calculatesRangepower in watts. The 2-wire interface features 16– Device HBM ESD Classification Level H2programmable addresses. The separate shunt input
– Device CDM ESD Classification Level C3B on the INA220B-Q1 device allows it to be used in• High- or Low-Side Sensing systems with low-side sensing.• Senses Bus Voltages From 0 V to 26 V The INA220B-Q1 device is available in two grades: A
and B. The B grade version has higher accuracy and• Reports Current, Voltage, and Powerhigher precision specifications.• 16 Programmable AddressesThe INA220B-Q1 device senses across shunts on• High Accuracy: 0.5% (Max) Over Temperaturebuses that can vary from 0 V to 26 V, useful for low-(INA220B-Q1)side sensing or CPU power supplies. The device• User-Programmable Calibration uses a single 3 V to 5.5 V supply, drawing a
• Fast (3.4 MHz) 2-Wire Mode maximum of 1 mA of supply current. The INA220B-Q1 device operates from –40°C to 125°C.• MSOP-10 Package
RELATED PRODUCTSAPPLICATIONSDESCRIPTION DEVICE
• AutomotiveCurrent/Power Monitor with Watchdog, Peak-Hold, INA209and Fast Comparator Functions• Servers
INA210, INA211,• Telecom Equipment Zero-Drift, Low-Cost, Analog Current Shunt Monitor INA212, INA213,Series in Small Package INA214• Notebook ComputersZero-Drift, Bidirectional Current Power Monitor with INA219• Power Management 2-Wire Interface
• Battery Chargers• Power Supplies• Test Equipment
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be moresusceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
ORDERABLE PARTTA PACKAGE (2) NUMBER TOP-SIDE MARKING
–40°C to 125°C VSSOP-DGS Reel of 2500 INA220BQDGSRQ1 IPUQ
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see theINA220B-Q1 product folder at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
INA220B-Q1 UNIT
Supply Voltage, VS 6 V
Differential (VIN+) – (VIN–) (2) –26 to 26 VAnalog Inputs,VIN+, VIN– Common-Mode –0.3 to 26 V
VBUS –0.3 to 26 V
SDA GND – 0.3 to 6 V
SCL GND – 0.3 to VS 0.3 V
Input Current Into Any Pin 5 mA
Open-Drain Digital Output Current 10 mA
Operating Temperature –40 to 125 °C
Storage Temperature –65 to 150 °C
Junction Temperature 150 °C
Human Body Model (HBM) AEC-Q100 Classification Level 2 kVH2ESD Ratings
Charged Device Model (CDM) AEC-Q100 Classification 750 VLevel C3B
(1) Stresses above Absolute Maximum Ratings may cause permanent damage. Exposure to absolute maximum conditions for extendedperiods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any otherconditions beyond those specified is not implied.
(2) VIN+ and VIN– may have a differential voltage of –26 V to 26 V; however, the voltage at these pins must not exceed the range –0.3 V to26 V.
versus Power Supply PSRR VS = 3 V to 5.5 V 10 μV/V
Current Sense Gain Error ±40 m%
versus Temperature, MSOP-10 1 m%/°C
Input Impedance Active Mode
VIN+ Pin 20 μA
VIN– Pin 20 μA
VBUS Pin (5) 320 kΩ
Input Leakage (6) Power-Down Mode
VIN+ Pin 0.1 ±0.5 μA
VIN– Pin 0.1 ±0.5 μA
DC ACCURACY
ADC Basic Resolution 12 Bits
1LSB Step Size
Shunt Voltage 10 μV
Bus Voltage 4 mV
Current Measurement Error ±0.2 ±0.3 %
over Temperature ±0.5 %
Bus Voltage Measurement Error VBUS = 12 V ±0.2 ±0.5 %
over Temperature ±1 %
Differential Nonlinearity ±0.1 LSB
ADC TIMING
ADC Conversion Time 12-Bit 532 586 μs
11-Bit 276 304 μs
10-Bit 148 163 μs
9-Bit 84 93 μs
Minimum Convert Input Low Time 4 μs
SMBus
SMBus Timeout (7) 28 35 ms
(1) BRNG is bit 13 of the Configuration Register.(2) This parameter only expresses the full-scale range of the analog-to-digital converter (ADC) scaling. In no event should more than 26 V
be applied to this device.(3) Referred-to-input (RTI).(4) Shaded cells indicate improved specifications of the INA220B-Q1.(5) The input impedance of this pin may vary approximately ±15%.(6) Input leakage is positive (current flowing into the pin) for the conditions shown at the top of the table. Negative leakage currents can
occur under different input conditions.(7) System management bus (SMBus) timeout in the INA220B-Q1 resets the interface any time SCL or SDA is low for over 28 ms.
The INA220B-Q1 device is a digital current shuntData transfer is then initiated and eight bits of datamonitor with an 2-wire and SMBus compatibleare sent, followed by an Acknowledge bit. Duringinterface. It provides digital current, voltage, anddata transfer, SDA must remain stable while SCL ispower readings necessary for accurate decisionHIGH. Any change in SDA while SCL is HIGH ismaking in precisely controlled systems.interpreted as a START or STOP condition.Programmable registers allow flexible configuration
for measurement resolution, and continuous versus Once all data have been transferred, the mastertriggered operation. Detailed register information generates a STOP condition, indicated by pullingappears at the end of this data sheet, beginning with SDA from LOW to HIGH while SCL is HIGH. TheTable 3. See the Register Block Diagram for a block INA220B-Q1 device includes a 28 ms timeout on itsdiagram of the INA220B-Q1 device. interface to prevent locking up an SMBus.
INA220B-Q1 TYPICAL APPLICATION Serial Bus Address
The figure on the front page shows a typical To communicate with the INA220B-Q1 device, theapplication circuit for the INA220B-Q1 device. Use a master must first address slave devices via a slave0.1 μF ceramic capacitor for power-supply bypassing, address byte. The slave address byte consists ofplaced as closely as possible to the supply and seven address bits, and a direction bit indicating theground pins. intent of executing a read or write operation.
The input filter circuit consisting of RF1, RF2, and CF is The INA220B-Q1 device has two address pins, A0not necessary in most applications. If the need for and A1. Table 1 describes the pin logic levels forfiltering is unknown, reserve board space for the each of the 16 possible addresses. The state of pinscomponents and install 0 Ω resistors unless a filter is A0 and A1 is sampled on every bus communicationneeded. See the Filtering and Input Considerations and should be set before any activity on the interfacesection. occurs. The address pins are read at the start of each
communication event.BUS OVERVIEW
Table 1. INA220B-Q1 Address Pins andThe INA220B-Q1 device offers compatibility with both Slave Addresses2-wire and SMBus interfaces. The 2-wire and SMBus
A1 A0 SLAVE ADDRESSprotocols are essentially compatible with one another.GND GND 1000000
The 2-wire interface is used throughout this dataGND VS+ 1000001sheet as the primary example, with SMBus protocolGND SDA 1000010specified only when a difference between the twoGND SCL 1000011systems is being addressed. Two bidirectional lines,
serial bus clock line (SCL) and serial bus data line VS+ GND 1000100(SDA), connect the INA220B-Q1 to the bus. Both VS+ VS+ 1000101SCL and SDA are open-drain connections.
VS+ SDA 1000110The device that initiates the transfer is called a VS+ SCL 1000111master, and the devices controlled by the master are SDA GND 1001000slaves. The bus must be controlled by a master
SDA VS+ 1001001device that generates the SCL, controls the busSDA SDA 1001010access, and generates START and STOP conditions.SDA SCL 1001011
To address a specific device, the master initiates aSCL GND 1001100START condition by pulling the SDA from a HIGH toSCL VS+ 1001101a LOW logic level while SCL is HIGH. All slaves on
the bus shift in the slave address byte on the rising SCL SDA 1001110edge of SCL, with the last bit indicating whether a SCL SCL 1001111read or write operation is intended. During the ninthclock pulse, the slave being addressed responds tothe master by generating an Acknowledge and pullingSDA LOW.
Serial Interface When reading from the INA220B-Q1 device, the lastvalue stored in the register pointer by a writeThe INA220B-Q1 device operates only as a slaveoperation determines which register is read during adevice on the 2-wire bus and SMBus. Connections toread operation. To change the register pointer for athe bus are made through the open-drain I/O linesread operation, a new value must be written to theSDA and SCL. The SDA and SCL pins featureregister pointer. This write is accomplished by issuingintegrated spike suppression filters and Schmitta slave address byte with the R/W bit LOW, followedtriggers to minimize the effects of input spikes andby the register pointer byte. No additional data arebus noise. The INA220B-Q1 device supports therequired. The master then generates a STARTtransmission protocol for fast (1 kHz to 400 kHz) andcondition and sends the slave address byte with thehigh-speed (HS) (1 kHz to 3.4 MHz) modes. All dataR/W bit HIGH to initiate the read command. The nextbytes are transmitted most significant byte first.byte is transmitted by the slave and is the mostsignificant byte of the register indicated by theWRITING TO AND READING FROM THE register pointer. This byte is followed by anINA220B-Q1 DEVICE Acknowledge from the master; then the slavetransmits the least significant byte. The masterAccessing a particular register on the INA220B-Q1acknowledges receipt of the data byte. The masterdevice is accomplished by writing the appropriatemay terminate data transfer by generating a Not-value to the register pointer. Refer to Table 3 for aAcknowledge after receiving any data byte, orcomplete list of registers and correspondinggenerating a START or STOP condition. If repeatedaddresses. The value for the register pointer asreads from the same register are desired, it is notshown in Figure 17 is the first byte transferred afternecessary to continually send the register pointerthe slave address byte with the R/W bit LOW. Everybytes; the INA220B-Q1 device retains the registerwrite operation to the INA220B-Q1 device requires apointer value until it is changed by the next writevalue for the register pointer.operation.
Writing to a register begins with the first byteFigure 14 and Figure 15 show read and writetransmitted by the master. This byte is the slaveoperation timing diagrams, respectively. Note thataddress, with the R/W bit LOW. The INA220B-Q1register bytes are sent most significant byte first,device then acknowledges receipt of a valid address.followed by the least significant byte. Figure 16The next byte transmitted by the master is theshows the timing diagram for the SMBus ALERTaddress of the register to which data will be written.response operation. Figure 17 illustrates a typicalThis register address value updates the registerregister pointer configuration.pointer to the desired register. The next two bytes are
written to the register addressed by the registerpointer. The INA220B-Q1 device acknowledgesreceipt of each data byte. The master may terminatedata transfer by generating a START or STOPcondition.
HS 2-Wire Mode The master then generates a repeated STARTcondition (a repeated START condition has the sameWhen the bus is idle, both the SDA and SCL lines aretiming as the START condition). After this repeatedpulled HIGH by the pull-up devices. The masterSTART condition, the protocol is the same as F/Sgenerates a START condition followed by a validmode, except that transmission speeds up to 3.4serial byte containing the HS master code 00001XXX.Mbps are allowed. Instead of using a STOPThis transmission is made in fast (400 kbps) orcondition, repeated START conditions should bestandard (100 kbps) (F/S) mode at no more than 400used to secure the bus in HS mode. A STOPkbps. The INA220B-Q1 device does not acknowledgecondition ends the HS mode and switches all thethe HS master code, but does recognize it andinternal filters of the INA220B-Q1 device to supportswitches its internal filters to support 3.4 Mbpsthe F/S mode.operation.
Figure 18. Bus Timing Diagram
Bus Timing Diagram DefinitionsFAST MODE HIGH-SPEED MODE
PARAMETER MIN MAX MIN MAX UNITS
SCL Operating Frequency f(SCL) 0.001 0.4 0.001 3.4 MHz
Bus Free Time Between STOP and START t(BUF) 600 160 nsCondition
Hold time after repeated START condition. t(HDSTA) 100 100 nsAfter this period, the first clock is generated.
Repeated START Condition Setup Time t(SUSTA) 100 100 ns
Power-Up Conditions The conversion ready bit clears under theseconditions:Power-up conditions apply to a software reset via the1. Writing to the Configuration Register, exceptRST bit (bit 15) in the Configuration Register, or the
when configuring the MODE bits for power-down2-wire bus general call reset.or ADC off (Disable) modes;
BASIC ADC FUNCTIONS 2. Reading the Status Register; or3. Triggering a single-shot conversion with theThe two analog inputs to the INA220B-Q1 device,
convert pin.VIN+ and VIN–, connect to a shunt resistor in the busof interest. Bus voltage is measured at VBUS pin. The
Power MeasurementINA220B-Q1 device is typically powered by aseparate supply from 3 V to 5.5 V. The bus being Current and bus voltage are converted at differentsensed can vary from 0 V to 26 V. There are no points in time, depending on the resolution andspecial considerations for power-supply sequencing averaging mode settings. For instance, when(for example, a bus voltage can be present with the configured for 12-bit and 128 sample averaging, up tosupply voltage off, and vice-versa). The INA220B-Q1 68 ms in time between sampling these two values isdevice senses the small drop across the shunt for possible. Again, these calculations are performed inshunt voltage, and senses the voltage with respect to the background and do not add to the overallground from VBUS for the bus voltage. conversion time.When the INA220B-Q1 device is in the normal
PGA Functionoperating mode (that is, MODE bits of theConfiguration Register are set to '111'), it If larger full-scale shunt voltages are desired, thecontinuously converts the shunt voltage up to the INA220B-Q1 device provides a PGA function thatnumber set in the shunt voltage averaging function increases the full-scale range up to 2, 4, or 8 times(Configuration Register, SADC bits). The device then (320 mV). Additionally, the bus voltage measurementconverts the bus voltage up to the number set in the has two full-scale ranges: 16 V or 32 V.bus voltage averaging (Configuration Register, BADCbits). The mode control in the Configuration Register Compatibility with TI Hot Swap Controllersalso permits selecting modes to convert only voltage
The INA220B-Q1 device is designed for compatibilityor current, either continuously or in response to anwith hot swap controllers such the TI TPS2490. Theevent (triggered).TPS2490 uses a high-side shunt with a limit at 50
All current and power calculations are performed in mV; the INA220B-Q1 device full-scale range of 40the background and do not contribute to conversion mV enables the use of the same shunt for currenttime; conversion times shown in the Electrical sensing below this limit. When sensing is required atCharacteristics table can be used to determine the (or through) the 50 mV sense point of the TPS2490,actual conversion time. the PGA of the INA220B-Q1 device can be set to ÷2
to provide an 80mV full-scale range.Power-down mode reduces the quiescent current andturns off current into the INA220B-Q1 device inputs,
Filtering and Input Considerationsavoiding any supply drain. Full recovery from power-down requires 40 μs. ADC off mode (set by the Measuring current is often noisy, and such noise canConfiguration Register, MODE bits) stops all be difficult to define. The INA220B-Q1 device offersconversions. several options for filtering by choosing resolution and
averaging in the Configuration Register. TheseIn triggered mode, writing any of the triggered convertfiltering options can be set independently for eithermodes into the Configuration Register (even if thevoltage or current measurement.desired mode is already programmed into the
register) triggers a single-shot conversion. The internal ADC is based on a delta-sigma (ΔΣ)front-end with a 500 kHz (±30%) typical samplingAlthough the INA220B-Q1 device can be read at anyrate. This architecture has good inherent noisetime, and the data from the last conversion remainrejection; however, transients that occur at or veryavailable, the conversion ready bit (Status Register,close to the sampling rate harmonics can causeCNVR bit) is provided to help coordinate one shot orproblems. Because these signals are at 1 MHz andtriggered conversions. The conversion ready bit is sethigher, they can be dealt with by incorporatingafter all conversions, averaging, and multiplicationfiltering at the input of the INA220B-Q1 device. Theoperations are complete.high frequency enables the use of low-value series
space resistors on the filter for negligible effects onmeasurement accuracy. In general, filtering theINA220B-Q1 device input is only necessary if there
are transients at exact harmonics of the 500 kHz the addition of 10 Ω resistors in series with each input(±30%) sampling rate (> 1 MHz). Filter using the of the INA220B-Q1 device sufficiently protects thelowest possible series resistance and ceramic inputs against dV/dt failure up to the 26 V rating ofcapacitor. Recommended values are 0.1 μF to 1 μF. the INA220B-Q1 device. These resistors have noFigure 19 shows the INA220B-Q1 device with an significant effect on accuracy.additional filter added at the input.
Simple Current Shunt Monitor UsageOverload conditions are another consideration for the (No Programming Necessary)INA220B-Q1 device inputs. The INA220B-Q1 device
The INA220B-Q1 device can be used without anyinputs are specified to tolerate 26 V across the inputs.programming if it is only necessary to read a shuntA large differential scenario might be a short tovoltage drop and bus voltage with the default 12-bitground on the load side of the shunt. This type ofresolution, 320 mV shunt full-scale range (PGA = ÷event can result in full power-supply voltage across8), 32 V bus full-scale range, and continuousthe shunt (as long the power supply or energyconversion of shunt and bus voltage.storage capacitors support it). It must be remembered
that removing a short to ground can result in inductive Without programming, current is measured bykickbacks that could exceed the 26 V differential and reading the shunt voltage. The Current Register andcommon-mode rating of the INA220B-Q1 device. Power Register are only available if the CalibrationInductive kickback voltages are best dealt with by Register contains a programmed value.zener-type transient-absorbing devices (commonlycalled transzorbs) combined with sufficient energy Programming the INA220B-Q1storage capacitance.
The default power-up states of the registers areIn applications that do not have large energy storage shown in the INA220 register descriptions section ofelectrolytics on one or both sides of the shunt, an this data sheet. These registers are volatile, and ifinput overstress condition may result from an programmed to other than default values, must beexcessive dV/dt of the voltage applied to the input. A reprogrammed at every device power-up. Detailedhard physical short is the most likely cause of this information on programming the Calibration Registerevent, particularly in applications with no large specifically is given in the section, Programming theelectrolytics present. This problem occurs because an INA220 Power Measurement Engine.excessive dV/dt can activate the ESD protection inthe INA220B-Q1 device in systems where largecurrents are available. Testing has demonstrated that
PROGRAMMING THE INA220B-Q1 DEVICE Calibration Register can also be selected to providePOWER MEASUREMENT ENGINE values in the Current and Power Registers that either
provide direct decimal equivalents of the values beingCalibration Register and Scaling measured, or yield a round LSB number. After these
choices have been made, the Calibration RegisterThe Calibration Register makes it possible to set the also offers possibilities for end user system-levelscaling of the Current and Power Registers to calibration, where the value is adjusted slightly towhatever values are most useful for a given cancel total system error.application. One strategy may be to set theCalibration Register such that the largest possible Below are two examples for configuring the INA220B-number is generated in the Current Register or Power Q1 device calibration. Both examples are written soRegister at the expected full-scale point; this the information directly relates to the calibration setupapproach yields the highest resolution. The found in the INA220B-Q1 EVM software.
Calibration Example 1: Calibrating the INA220B-Q1 device with no possibility for overflow. (Note that thenumbers used in this example are the same used with the INA220B-Q1 EVM software as shown inFigure 20)1. Establish the following parameters:
VBUS_MAX = 32
VSHUNT_MAX = 0.32
RSHUNT = 0.52. Using Equation 1, determine the maximum possible current.
(1)
3. Choose the desired maximum current value. This value is selected based on system expectations.
Max_Expected_I = 0.64. Calculate the possible range of current LSBs. To calculate this range, first compute a range of LSBs that is
appropriate for the design. Next, select an LSB within this range. Note that the results will have the mostresolution when the minimum LSB is selected. Typically, an LSB is selected to be the nearest round numberto the minimum LSB value.
(2)
(3)
Choose an LSB in the range: Minimum_LSB<Selected_LSB < Maximum_LSB
Current_LSB = 20 × 10–6
Note:This value was selected to be a round number near the Minimum_LSB. This selection allows forgood resolution with a rounded LSB.
5. Compute the Calibration Register value using Equation 4:
6. Calculate the Power LSB, using Equation 5. Equation 5 shows a general formula; because the bus voltagemeasurement LSB is always 4 mV, the power formula reduces to the calculated result.
(5)
7. Compute the maximum current and shunt voltage values (before overflow), as shown by Equation 6 andEquation 7. Note that both Equation 6 and Equation 7 involve an If - then condition:
(6)
If Max_Current ≥ Max Possible_I thenMax_Current_Before_Overflow = MaxPossible_I
ElseMax_Current_Before_Overflow = Max_Current
End If
(Note that Max_Current is greater than MaxPossible_I in this example.)
Max_Current_Before_Overflow = 0.64 (Note: This result is displayed by software as seen in Figure 20)
End If(Note that Max_ShuntVoltage is greater than VSHUNT_MAX in this example.)Max_ShuntVoltage_Before_Overflow = 0.32 (Note: This result is displayed by software as seen inFigure 20)
8. Compute the maximum power with Equation 8.
(8)
9. (Optional second calibration step) Compute corrected full-scale calibration value based on measured current.
Figure 20 illustrates how to perform the sameprocedure discussed in this example using theautomated INA220B-Q1 EVM software. Note that thesame numbers used in the nine-step example areused in the software example in Figure 20. Also notethat Figure 20 illustrates which results correspond towhich step (for example, the information entered instep 1 is enclosed in a box in Figure 20 and labeled).
Calibration Example 2 (Overflow Possible) numbers used in the nine-step example are used inthe software example in Figure 21. Also note thatThis design example uses the nine-step procedure forFigure 21 illustrates which results correspond tocalibrating the INA220B-Q1 device where overflow iswhich step (for example, the information entered inpossible. Figure 21 illustrates how the samestep 1 is circled in Figure 21 and labeled).procedure is performed using the automated
INA220B-Q1 EVM software. Note that the same
1. Establish the following parameters:
VBUS_MAX = 32
VSHUNT_MAX = 0.32
RSHUNT = 52. Determine the maximum possible current using Equation 10:
(10)
3. Choose the desired maximum current value: Max_Expected_I, ≤ MaxPossible_I. This value is selectedbased on system expectations.
Max_Expected_I = 0.064. Calculate the possible range of current LSBs. This calculation is done by first computing a range of LSBs
that is appropriate for the design. Next, select an LSB withing this range. Note that the results will have themost resolution when the minimum LSB is selected. Typically, an LSB is selected to be the nearest roundnumber to the minimum LSB.
(11)
(12)
Choose an LSB in the range: Minimum_LSB<Selected_LSB<Maximum_LSB
Current_LSB = 1.9 × 10–6
Note:This value was selected to be a round number near the Minimum_LSB. This section allows for goodresolution with a rounded LSB.
5. Compute the Calibration Register using Equation 13:
(13)
6. Calculate the Power_LSB using Equation 14. Equation 14 shows a general formula; because the bus voltagemeasurement LSB is always 4 mV, the power formula reduces to calculate the result.
7. Compute the maximum current and shunt voltage values (before overflow), as shown by Equation 15 andEquation 16. Note that both Equation 15 and Equation 16 involve an If - then condition.
(15)
If Max_Current ≥ Max Possible_I thenMax_Current_Before_Overflow = MaxPossible_I
ElseMax_Current_Before_Overflow = Max_Current
End If
(Note that Max_Current is less than MaxPossible_I in this example.)
Max_Current_Before_Overflow = 0.06226 (Note: This result is displayed by software as seen in Figure 21)
End If(Note that Max_ShuntVoltage is less than VSHUNT_MAX in this example)Max_ShuntVoltage_Before_Overflow = 0.3113 (Note: This result is displayed by software as seen inFigure 21)
8. Compute the maximum power with equation 8.
(17)
9. (Optional second calibration step) Compute the corrected full-scale calibration value based on measuredcurrent.
Figure 21 illustrates how to perform the same Also note that Figure 21 illustrates which resultsprocedure discussed in this example using the correspond to which step (for example, theautomated INA220B-Q1 EVM software. Note that the information entered in step 1 is enclosed in a box insame numbers used in the nine-step example are Figure 21 and labeled).used in the software example in Figure 21.
CONFIGURE, MEASURE, AND CALCULATE shunt voltage. By knowing the value of the shuntEXAMPLE resistor, the device can then calculate the amount of
current that created the measured shunt voltage drop.In this example, the 10 A load creates a differential The first step when calculating the calibration value isvoltage of 20 mV across a 2 mΩ shunt resistor. The setting the current LSB. The Calibration Registervoltage present at the VIN– pin is equal to the value is based on a calculation that has its precisioncommon-mode voltage minus the differential drop capability limited by the size of the register and theacross the resistor. The bus voltage for the INA220B- Current Register LSB. The device can measureQ1 device is measured at the external VBUS input pin, bidirectional current; thus, the MSB of the Currentwhich in this example is connected to the VIN– pin to Register is a sign bit that allows for the rest of the 15measure the voltage level delivered to the load. For bits to be used for the Current Register value. It isthis example, the voltage at the VIN– pin is 11.98 V. common when using the current value calculations toFor this particular range (40 mV full-scale), this small use a resolution between 12 bits and 15 bits.difference is not a significant deviation from the 12 V Calculating the current LSB for each of thesecommon-mode voltage. However, at larger full-scale resolutions provides minimum and maximum values.ranges, this deviation can be much larger. These values are calculated assuming the maximum
current that will be expected to flow through theNote that the Bus Voltage Register bits are not right-current shunt resistor, as shown in Equation 2 andaligned. In order to compute the value of the BusEquation 3. To simplify the mathematics, it isVoltage Register contents using the LSB of 4 mV, thecommon to choose a round number located betweenregister must be shifted right by three bits. This shiftthese two points. For this example, the maximumputs the BD0 bit in the LSB position so that thecurrent LSB is 3.66 mA/bit and the minimum currentcontents can be multiplied by the 4 mV LSB value toLSB would be 457.78 µA/bit assuming a maximumcompute the bus voltage measured by the device.expected current of 15 A. For this example, a value ofThe shifted value of the Bus Voltage Register1 mA/bit was chosen for the current LSB. Setting thecontents is now equal to BB3h, a decimal equivalentcurrent LSB to this value allows for sufficientof 2995. This value of 2995 multiplied by the 4 mVprecision while serving to simplify the math as well.LSB results in a value of 11.98 V.Using Equation 4 results in a Calibration Register
The Calibration Register (05h) is set in order to value of 20480, or 5000h.provide the device information about the currentshunt resistor that was used to create the measured
The Current Register (04h) is then calculated by this result by the power LSB that is 20 times themultiplying the shunt voltage contents by the 1 × 10-3 current LSB, or 20 × 10-3, results in a powerCalibration Register and then dividing by 4095. For calculation of 5991 × 20 mW/bit, which equals 119.82this example, the shunt voltage of 2000 is multiplied W. This result matches what is expected for thisby the Calibration Register of 20480 and then divided register. A manual calculation for the power beingby 4095 to yield a Current Register of 2712h. delivered to the load would use 11.98 V (12VCM – 20
mV shunt drop) multiplied by the load current of 10 AThe Power Register (03h) is then be calculated by to give a 119.8 W result.multiplying the Current Register of 10002 by the BusVoltage Register of 2995 and then dividing by 5000. Table 2 shows the steps for configuring, measuring,For this example, the Power Register contents are and calculating the values for current and power for1767h, or a decimal equivalent of 5991. Multiplying this device.
Table 2. Configure, Measure, and Calculate Example (1)
STEP # REGISTER NAME ADDRESS CONTENTS ADJ DEC LSB VALUE
Step 1 Configuration 00h 019Fh
Step 2 Shunt 01h 07D0h 2000 10 µV 20 mV
Step 3 Bus 02h 5D98h 0BB3 2995 4 mV 11.98 V
Step 4 Calibration 05h 5000h 20480
Step 5 Current 04h 2712h 10002 1 mA 10.002 A
Step 6 Power 03h 1767h 5991 20 mW 119.82 W
(1) Conditions: load = 10 A, VCM = 12 V, RSHUNT = 2 mΩ, VSHUNT FSR = 40 mV, and VBUS = 16 V.
The INA220B-Q1 device uses a bank of registers forRegister contents are updated 4 μs after completionholding configuration settings, measurement results,of the write command. Therefore, a 4 μs delay ismaximum and minimum limits, and status information.required between completion of a write to a givenTable 3 summarizes the INA220B-Q1 deviceregister and a subsequent read of that registerregisters; Figure 13 illustrates the registers.(without changing the pointer) when using SCLfrequencies in excess of 1 MHz.
Table 3. Summary of Register Set
POINTERADDRESS POWER-ON RESET
HEX REGISTER NAME FUNCTION BINARY HEX TYPE (1)
All-register reset, settings for bus00 Configuration Register voltage range, PGA Gain, ADC 00111001 10011111 399F R/W
resolution and averaging
01 Shunt Voltage Shunt voltage measurement data Shunt voltage — R
02 Bus Voltage Bus voltage measurement data Bus voltage — R
03 Power (2) Power measurement data 00000000 00000000 0000 R
Contains the value of the current flowing04 Current (2) 00000000 00000000 0000 Rthrough the shunt resistor
Sets full-scale range and LSB of current05 Calibration and power measurements; overall 00000000 00000000 0000 R/W
system calibration
(1) Type: R = Read-Only, R/W = Read/Write.(2) The Power Register and Current Register default to '0' because the Calibration Register defaults to '0', yielding a zero current value until
Bit 15 Setting this bit to '1' generates a system reset that is the same as power-on reset. Resets all registers to defaultvalues; this bit self-clears.
BRNG: Bus Voltage Range
Bit 13 0 = 16 V FSR1 = 32 V FSR (default value)
PG: PGA (Shunt Voltage Only)
Bits 11, 12 Sets PGA gain and range. Note that the PGA defaults to ÷8 (320 mV range). Table 4 shows the gain and range forthe various product gain settings.
Table 4. PG Bit Settings [12:11] (1)
PG1 PG0 GAIN RANGE
0 0 1 ±40 mV
0 1 ÷2 ±80 mV
1 0 ÷4 ±160 mV
1 1 ÷8 ±320 mV
(1) Shaded values are default.
BADC: BADC Bus ADC Resolution/Averaging
Bits 7–10 These bits adjust the Bus ADC resolution (9-, 10-, 11-, or 12-bit) or set the number of samples used whenaveraging results for the Bus Voltage Register (02h).
Bits 3–6 These bits adjust the Shunt ADC resolution (9-, 10-, 11-, or 12-bit) or set the number of samples used whenaveraging results for the Shunt Voltage Register (01h).BADC (Bus) and SADC (Shunt) ADC resolution/averaging and conversion time settings are shown in Table 5.
Bits 0–2 Selects continuous, triggered, or power-down mode of operation. These bits default to continuous shunt and busmeasurement mode. The mode settings are shown in Table 6.
The Shunt Voltage Register stores the current shunt voltage reading, VSHUNT. Shunt Voltage Register bits areshifted according to the PGA setting selected in the Configuration Register (00h). When multiple sign bits arepresent, they will all be the same value. Negative numbers are represented in twos complement format.Generate the twos complement of a negative number by complementing the absolute value binary number andadding 1. Extend the sign, denoting a negative number by setting the MSB = '1'. Extend the sign to anyadditional sign bits to form the 16-bit word.
Example: For a value of VSHUNT = –320 mV:1. Take the absolute value (include accuracy to 0.01 mV) ==> 320.002. Translate this number to a whole decimal number ==> 320003. Convert it to binary ==> 111 1101 0000 00004. Complement the binary result : 000 0010 1111 11115. Add 1 to the complement to create the twos complement formatted result ==> 000 0011 0000 00006. Extend the sign and create the 16-bit word: 1000 0011 0000 0000 = 8300h (Remember to extend the sign to
all sign-bits, as necessary based on the PGA setting)
At PGA = ÷8, full-scale range = ±320 mV (decimal = 32000, positive value hex = 7D00, negative value hex =8300), and LSB = 10 μV.
Bit 1 Although the data from the last conversion can be read at any time, the INA220B-Q1 device conversion ready(CNVR) bit indicates when data from a conversion is available in the data output registers. The CNVR bit is setafter all conversions, averaging, and multiplications are complete. CNVR will clear under the following conditions:
1.) Writing a new mode into the operating MODE bits in the Configuration Register (except for Power-down orDisable)
2.) Reading the Power Register
OVF: Math Overflow Flag
Bit 0 The Math Overflow Flag (OVF) is set when the power or current calculations are out of range. It indicates thatcurrent and power data may be meaningless.
Power Register 03h (Read-Only)
Full-scale range and LSB are set by the Calibration Register. See the Programming the INA220 PowerMeasurement Engine section.
Full-scale range and LSB depend on the value entered in the Calibration Register. See the Programming theINA220 Power Measurement Engine section. Negative values are stored in twos complement format.
The value of the Current Register is calculated by multiplying the value in the Shunt Voltage Register with thevalue in the Calibration Register according to the equation:
CALIBRATION REGISTER
Calibration Register 05h (Read/Write)
Current and power calibration are set by bits D15 to D1 of the Calibration Register. Note that bit D0 is not used inthe calculation. This register sets the current that corresponds to a full-scale drop across the shunt. Full-scalerange and the LSB of the current and power measurement depend on the value entered in this register. See theProgramming the INA220 Power Measurement Engine section. This register is suitable for use in overall systemcalibration. Note that the '0' POR values are all default.
MOSFET rated tostandoff supply voltagesuch as BSS84 forup to 50 V
Data
ClockCurrent Register 2-WireInterface
Voltage Register
VIN+
ADC
INA220B-Q1
GND
A0
A1
VS Supply Voltage)(
VBUS (Bus Voltage Input)
V
I
Shunt(40 mV maxfor 12-bit)
4.3 kW1 W
3.3 V to 5 V1/4 W Zeneror shunt reg
HCPL2300
HCPL2300
HCPL2300
4.3 kW
4.3 kW
4.3 kW
4.3 kW
SDA
SCL
5 V
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
35.7 kW
13.7 kW
24 VTranzorb Power Register
-48 VSupply
-48 Vto Load
VIN-
0.1 Fm
10 Fm
0.1 Fm
0.1 Fm
0.1 Fm
-48VSupply
0.1mF
INA220B-Q1
SLOS785A –JUNE 2012–REVISED JUNE 2012 www.ti.com
ADDITIONAL APPLICATION IDEAS
Figure 23, Figure 24, and Figure 25 show the INA220B-Q1 device in additional circuit configurations for current,voltage, and power monitoring applications.
Figure 23. –48 V Telecom Current, Voltage, and Power Sense with Isolation
Figure 24. 48 V Telecom Current, Voltage, and Power Sense
Changes from Original (June 2012) to Revision A Page
• Device went from preview to production ............................................................................................................................... 1
INA220BQDGSRQ1 ACTIVE VSSOP DGS 10 2500 Green (RoHS& no Sb/Br)
CU NIPDAUAG Level-2-260C-1 YEAR -40 to 125 IPUQ
(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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