Page 1
10BASE-T APPLICATIONS (802.3, 802.3U, AND 802.3AB)
EXTERNAL INTERFACES PROVIDED:
- IEEE 1149.1 JTAG MANAGEABILITY CONNECTION TO BMC
- NC-SI (DMTF NC-SI OVER RMII) OR LEGACY SMBUS OR NC-SI OVER MCTP OVER PCI-E OR SMBUS FOR
- MDI (COPPER) STANDARD IEEE 802.3 ETHERNET INTERFACE FOR 1000BASE-T, 100BASE-TX, AND- PCIE V2.1 (2.5GT/S) GEN1 X1
2. I210-AT1. 82574
DUAL DESIGNI210-AT_82574 NIC REFERENCE SCHEMATIC
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 1DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
Page 2
2. TOC1. TITLE PG
TABLE OF CONTENTS
12.NC-SI PHY
8. POWER SUPPLY & I210 REGULATOR
14.TEST I/O & LED13.NC-SI MDI & CLK
11.SVR BUCK-BOOST10.SVR 12V-4V9. POWER MUX
7. POWER SUPPLY TREE6. 82574 CONFIGURATION5. SUPPORT CIRCUITS4. MDI, LED & SDP3. PCI-E & NC-SI I/O
INITIAL RELEASE (INTEL PUBLIC)
REVISION CONTROLR1.90
483190 2012-09-281.90I210-AT/82574 REFERENCE SCHEMATIC 2DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
Page 3
82574L-XTAL
PCIE_NC-SI_SMB
KEEP STUB SHORT
NOTE: PE_(T/R)_N/P INTENTIONALLY SWAPPED FOR ROUTING
NC
NCNCNCNC
21R13
2
1 C116
21C33
21
C34
R66
R132
2
1 R102
2
1R111R71
R68
2
1
R37
2
1
R44
2
1
R127
2
1R121
2
1R122
2
1R107
2
1R108
21R105
R67
21R7421R73
2
1 C52
2
1F3
2
1F4
B11
B6B5
B12
B3
A13A14
B17
A1
B14B15
A11
A16A17
A8A7A6A5
B9
B18
B16
A18
A15
A12
A4
B13
B7
B4
B10A10A9
B8
A3A2 B2
B1
J1
3634
35
16
2120
17
2423
2625
89
7
56
32
4443
EU2
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 3
10.0
K10
.0K 6A3
14A1
6B4
14A2
13A2 14A2
12B1 14A2
12B4 14A2
12B4 14A2
12B4 14A2
12B4 14A2 12B4 14A2
14A3
14A3 14A4
14A3 14A4
14B2
14B2
0 NCSI_ARB_OUT_RNCSI_ARB_OUT
NCSI_ARB_IN_RNCSI_ARB_IN
NCSI_CLK_IN
NCSI_TX_EN
NCSI_RXD_1
33
0.1UF0.1UF
PER0_P
PET_P
NCSI_CRS_DV
NCSI_TXD_0NCSI_TXD_1NCSI_RXD_0
10.0
K
SMBALRT_N
PET_N
SMBD
SMBCLK
PE_V3P3_AUX
SMDATSMCLK
PER0_N
PE_V12
PE_V3P3_NC
PET0_NPE_WAKE_NPE_RST_N
PET0_P
PE_CLK_NPE_CLK_P
10.0
K 100K 100K
V3P3_LAN
10.0
K
10.0
K
0
10.0
K
10.0
K
10.0
K
10.0
K
V3P3_LAN
0
0
0
V12P0_PE_MAIN
0603LF
X5R
10UF6.3V
V3P3_PE_AUX
10UF
0603LF
X5R
6.3V
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
IN
OUTIN
IN
OUT
BI
BI
ININ
IN
OUT
OUTOUT
OUTIN
IN
KEY
FCONN36_PCI_EXPRESSX1
PRSNT1A_N12V312V4GND35JTAG2JTAG3JTAG4JTAG53_3V23_3V3
REFCLKNREFCLKPGND36
PERST*
GND37
WAKE_N
RSVD2
3_3VAUXJTAG13_3V1
GND2SMDATSMCLK
GND1RSVD1
12V212V1
PETN[0]PETP[0]
GND3
PERN[0]PERP[0]
GND38
GND4PRSNT2_N
GND5
I210_AT
NC_SI_RXD1NC_SI_RXD0NC_SI_TXD1NC_SI_TXD0
NC_SI_ARB_OUTNC_SI_ARB_IN
NC_SI_TX_ENNC_SI_CRS_DVNC_SI_CLK_IN
PE_TNPE_TP
SMB_ALRT_NSMB_DATASMB_CLK
PE_WAKE_NPE_RST_N
PE_CLKNPE_CLKP
PE_RNPE_RP
Page 4
82574
I210-AT REQUIRES THE CENTER TAP ONLY HAVE DECOUPLING CAPACITORS.
MDI_LED_SDP
82574 IS BIAS BY 1.9V AT THE MAGNETICS CENTER TAP.
ESD-EMI FILTER RANGE 470PF-100NF
CONNECT LED2 TO CATHODE OF ORANGE SPEED LED AND THE ANODE OF THE GREEN SPEED LED.LED2->IF LINKED AT 1000BASE-T THEN LOW.
CONNECT THE ANODE OF THE LINK/ACTIVITY LED TO VCC.CONNECT LED1 TO THE CATHODE OF THE LINK/ACTIVITY LED. LED1->IF LINK UP THEN LOW. IF LINK DOWN THEN HIGH. BLINK HIGH FOR ACTIVITY.
CONNECT LED0 TO CATHODE OF GREEN SPEED LED AND THE ANODE OF THE ORANGE SPEED LED.LED0->IF LINKED AT 100BASE-TX THEN LOW.
2
1 C118
2
1 C117
21
J24
2
1C109
2
1C91
2
1C81
2
1C100
2
1 C27
2
1C23
2
1C28
R82
2
1C74
60626163
5049
5352
5554
5857
333031
EU2
21R63
R114
R81
2
1
R622
1C21
21R156
21R153
21R148
21R138 87
6
54
321
MH4
MH3
12
11
10
9
JA2
R72
21R83
R80
24
2322
212019
181716
151413
987
654
32
121110
1L2
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 4
82
6A3
6B3 14A1 14B4
14B4
6B3 14B4
6B3 14B4
14A2
GND_EARTH
0805LF
1000PF3000V1808LF
TERM
PLA
NE
MDI_3_RJ_NMDI_3_RJ_P
MDI_2_RJ_PMDI_1_RJ_N
MDI_0_RJ_N
82
160
D49184-001
0.1UF 0.1UF
MDI_0_RJ_P
V3P3_LAN
EMPTY0805LF
0
1UF
EMPTY
MDI_2_RJ_N
MDI_1_RJ_P
0.1UF0.1UF0.1UF 0.1UF
MDI_CT
1.0UF82
75
75
75
75
MDI_3_N
MDI_0_P
LINK_100_R
160
82
MDI_0_NMDI_1_PMDI_1_NMDI_2_PMDI_2_NMDI_3_P
LINK_ACT LINK_ACT_R
LINK_100
LINK_1000
0
SDP1SDP2SDP3
SDP0
ACT_BTB
LINK_1000_R
1UF
0.1UF
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
RJ45-5RJ45-4RJ45-6RJ45-3RJ45-2RJ45-1
RJ45-7RJ45-8
GRN
GRN
YLW
CR1_2
IO1IO2
IO8
CR1_1
IO3
IO4IO5
IO6
IO7
GND
_MH3
GND
_MH4
CR2_2
CR2_1
d49184_001_bracket
IO1IO2
OUT
I210_AT
MDI_3_PMDI_3_N
MDI_2_PMDI_2_N
MDI_1_PMDI_1_N
MDI_0_PMDI_0_N
LED2LED1LED0
SDP3SDP2SDP1/PCIE_DISSDP0
IN
C1C2 L23
L22L21L20
C4C5
L19
L24
C3
L17C7 L18
L14
L13
C10C9
L15L16
C8
C12
C11
C6
BIBIBIBI
Page 5
SUPPORT CIRCUITS
ATEST_P_NCATEST_N_NC
ENA JTAG
SI-PU-SEC-ENA
I210I210
CAD NOTE: KEEP SPI TRACES SHORT FOR 70MHZ SIGNALING
FOR INFORMATION SEE DATA SHEET FOR NON-SECURE MODEBY PULLING DOWN NVM_SI (PIN 12) DURING POWER_UP.INSTALLING J14 DISABLES SECURITY AND THE INVM LOCK
SI-PD-SEC-DISNVM_SK=JTAG MODE
JTAG_RSVD->PD (R35)JTAG_MAIN->PU(INT)
CAD NOTE: PLACE NEAR IC
I210
3.3K
3.3K
R163R14112
14
15
13
48DEV_OFF_N
33
33
R593.3K
R143
2
1R35
2
1
R84
21
21R16221
21R142
2
1R65
2
1 C84
J14
2
1R1
06
2
1
R94
2
1
R99
21R104
2
1
R51
21R85
2
1R78
J13R77
2
1 C20
2
1 C19
2
1R76
2 1Y3
2
1 R75
2
1
R161
2
1
3
8
1 2
7
4
56
U7
4546
1
184
2919
28
EU2
3.3K
25.000MHZ
XTAL_INXTAL_OUT
JTCK
COG
27.0PF
V3P3_LAN
JTDI14A3
JTDO
RSET
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 5
6B3
6B3 14A2
14A1 14B2
6B3 14A3
6B3 14A2
14B2
14A3
6B3
14A4
14A4
14A4
Y1_P1
EMPTY
EMPTY
LAN_CLK_IN
EMPTY
3.3K
27.0PF
33
1%
3.3K
3.3K
LAN_PWR_GOOD
COG
JTMS
00
MOSI
0.1UF
V3P3_LAN
3.3K
0NONE
ICSOICLF
0
Y1_P2
MISO
SCLKSS
33
V3P3_LAN
4.99K
3.3K33K
33K
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
2
1
IN
OUT
OUTOUT
IN
IN
OUTOUTINOUT
OUT IN
2
1
SOCKET_SST25VF040b
GND
VCC
Q
HOLD_N
W_N
S_N
C
DI210_AT
NVM_SKNVM_SONVM_SI
NVM_CS_N
LAN_PWR_GOODDEV_OFF_NRSET
JTAG_TMSJTAG_TDOJTAG_TDIJTAG_CLK
XTAL2XTAL1
Page 6
V1P9_82574
V1P05_82574
8257482574
82574 REFERENCE
82574 OPTION A
V3P3
V1P9
V1P05
NVMT
XTAL2
XTAL1
DIS_REG10
AUX_PWR
V1P9
V1P05
V1P9
V1P05
V1P05
V1P9
V1P9
V1P05
KEEP R AND C LOW.(SHORT, NO PLANE TO BASE)
V1P05
XTAL
MDI_CT
PU=EE/PD=FLS
CAD NOTE: SHORT STUBS
CAD NOTE: THICK TRACES/PLANES
V1P9 WILL USE SPV V1P5_LAN NETV1P05 WILL USE SVL V0P9_LAN NET
82574 CONFIGURATION
CTRL19
CAD NOTE;
21 R20
21R9
21R131
21R133
21 R110
21 R100
21 R97
21 R70
21 R69
21 R89
21 R92
21 R96
21R136
21
R58
21R160
21 R147
2
1 C37
2
1 C35
2
1 C25
2
1 C24
21R145
2
1 R137
2
1R139
21R151
21
C30
2
1C38
2
1 C22
2
1R88
3
4
21 U6
2
1 R90
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 6
5B4 14A2
3B2
8A4
8A4
8A2 14A3 8A2 14A3
3B2
8A4
8A4
4B4 14B4
8A4
8A4
8A2
5B4
8A4
8B3
4B3
5B3
4B4 14B4
4B4 14A1 14B4
5B4 14A3
8A2
5B4 14A2
JTCK0
EMPTY
V3P3_LAN
V0P9_LAN V1P5_LAN
NCSI_ARB_IN_R
VDD_42
VDD_59
V3P3_LAN
AVDD09_OUTV3P3_LAN
0.1UF4.99K
NCSI_ARB_OUT_R 0
0
0
0
0
V1P5_LAN0
0
0
0VDD_27
0VDD_32
0
SDP3 0
AVDD33_41
0
V3P3_LAN
AVDD33_51
CBOT
3.3K
Y1_P20
0
VDD0_64
10UF
BCP69T1V1P5_LAN
0.01UF
NC_22MDI_CT
Y1_P1
3.3K
3.3K
10UF 0.1UF 0.1UF
0.1UF
0
SDP0
SDP1
JTDO
AVDD15_OUT
3.3K
JTMS
V0P9_LAN
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
OUT
IN
OUT
OUT
OUT
OUT
IN OUT
OUT IN
OUT
IN
OUT
OUT
Page 7
ENABLEV3P3
SHEET 9
SHEET 10
REGULATOR
TPD54620
SWITCHING
THIS DESIGNNOT USED IN
MAINPE_V12P0
AUXPE_V3P3
PE_V3P3MAIN
3.3VLAN
I210-SVR1.5V
SUPPORT
3.3V
FOR 3.3VREGULATORBUCK/BOOSTLTC3533
DIODE OR
V3P3
FOR 12V TO 4V SHEET 11
0.9VSHEET 8
BY SYSTEM POWER DESIGNER FOR EACH PLATFORM.POWER SUPPLIES SHOULD BE OPTIMIZEDTHESE POWER SUPPLIES ARE EXAMPLES.
POWER SUPPLY TREE
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 7DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
Page 8
CAD NOTE: KEEP CLOSE TO IC
POWER SUPPLY & I210 REGULATOR
CONFIGURATION USING INTEGRATED SVR FOR V1P5 & V0P9
*
82574
JTDI-NC82574
V1P05_82574
82574
82754
THICK TRACES = PLANE
DECOUPLING ON ZERO R402-0 R, 20MIL-OHM-1.5A
NVMT
AUX_PWR
*
*
*
*
*
*LOCALIZED AND DISTRIBUTED BULK CAPACITANCE RANGE ~15UF
2
1C6
2
1 C7
2
1
R18
2
1 R19
2
1 C83
2
1 C72
2
1 C93
2
1 C43
2
1 C73
2
1 C113
2
1 C104
2
1 C79
2
1 C75
2
1 C95
2
1 C110
2
1 C82
2
1 C89
2
1 C103
2
1 C102
2
1 C76
2
1 C115
2
1 C92
21 J17
21 J16
21 J15
2
1 R152
2
1 R64
2
1 R103
2
1 R135
2
1
R146
2
1 R144
2
1 R140
2
1 C98
2
1 C77
2
1 C111
2
1C105
2
1 C97
2
1C101
2
1C90
2
1 C88
2
1C78
C2664
5141
2710
39
5647
3859
423211
22
65
4037
EU2
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 8
6B4 6B4
6B4 14A3
6A3
6B3
6B3
6B4
6B3
6A3
6B3 6B3
V0P9_LAN
V1P5_LAN
47UF
EMPTY
V0P9_LAN
10UFEMPTY
47UF
VDD_42
10UF
AVDD15_OUT
10UF
AVDD09_OUT
VDD0_64
AVDD33_41
VDD_27
VDD_59
VDD_32
V3P3_LAN
EMPTY0.1UF
0.039UF
V1P5_LAN
0
V0P9_LAN
0.1UF
10UF
0.1UF
0.1U
F
NC_22
0.1U
F
0.1U
F
0.1U
F
V3P3_LAN
0.1U
F
0.1U
F
0.1U
F
00000000
0.1UF 0.1UF
EMPTY
47UF
AVDD33_51
10UF
V1P5_LAN
X7R
CTOP
0.1UF0.1UF0.1UF0.1UF
0.1UF
0.1UF0.1UF0.1UF
6.3V
10UF
0805LF
EMPTY
EMPTY
CBOT
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
IN
2
1
2
1
2
1
IN
IN
OUT
ININ
IN
IN
IN
IN
IN
I210_AT
E_PAD_GND
CBOTCTOP
VDD0P9_OUT
VDD1P5_OUT
VDD3P3_51
VDD1P5_47
RSVD_22_NC
VDD1P5_56
VDD3P3_41
VDD3P3_64VDD3P3_10
VDD0P9_32
VDD0P9_59VDD0P9_11
VDD3P3_27
VDD0P9_42
Page 9
~4.3V TYP
IDEAL DIODE
EXTERNAL SATA POWER
INPUTS TO V3P3 DIODE ORPOWER MUX (AUX / MAIN SWITCH)
21
J11
21 J22
12CR3
21 J12
C99C80
21F1
12CR4
987
321
654
121110
151413
J10
2
1 C32
2
1 C3
2
1 C14
2
1 C13
2
1 R30
2
1 R32
2
1 R28
2
1 R25
2
1 C10
21
C622
1 R234
3
6521
U3
123
5
1278
9
11
613
104
U4
CR2
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 9
10UF
MBRS540LT3
EMPTY
1812LFEMPTY EMPTY
7343LF7343LF
180UF
NTGS4141N
6.3V20%
V3P3_OR
V3P3_OR
100K 100K
V3P3_PE_AUX
100K
5V_USB TPS54620_OUTPUT
MBRS540LT3
MBRS540LT3
100UF10UF
IC
EMPTY
EMPTY
100K
20%
8.2K
0.1UF
6.3V20%
EMPTY
V3P3_NC
V12P0_NC
10UFEMPTY
0.1UF
180UF
V5P0_CONN_UNFUSED
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
2
1
2
1
2
1
CONN15_E33878_001
12V_1512V_1412V_13
GND_12GND_11GND_10
VCC_9VCC_8VCC_7
GND_6GND_5GND_4
VCC3_3VCC3_2VCC3_1
G
S1
D2 D3 D4D1
G
LTC4352
FAULT
STATUS
OUTGATE
SOURCE
CPO
VIN
EPADGND
REV
0V
UV
VCC
Page 10
TPS54620 SWITCHING REGULATOR
PLACE ALL CAPS CLOSE TO ASSOCIATED PINS
VIN-MAX = 13.0VVOUT-MAX = 4.46VVOUT-MIN = 4.22V
~3.5MS STARTUP-TIME
ENABLES CONVERTER FOR VIN ~8V OR GREATER
PLACE 0.1 UF CAP CLOSE TO VIN PIN
PLACEMENT NOTE::
VIN-MIN = 11.0V
2
1 C40
2
1 C48
2
1 C47
2
1 C49
2
1 C85
2
1 C86
2
1 C87
21 J23
C108
7
6
91
15
14
54
1211
32
10
8
13
EU3
C42
2
1 R101
2
1 R109
21L12
1 C46
2
1 R158
2
1 C45
2
1C106
2
1 C107
2
1 R116
2
1 C114
2
1 R154
2
1R157
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 10
22.00UF
1206LF
TPS54620_VSENSE
TPS54620_EN
30.10K
TPS54620_SSTPS54620_RT
TPS54620_COMP
TPS54620_OUTPUT
V12P0_PE_MAIN
1%1.0UF
1%
196.00K1%
100K
0.1UF
EMPTY10UH
0.1UF
TPS54620_BOOT
1% 150.0PF
1%1.15K
820.00PF
37.40K
8.45K1%
0.047UF
25V22.00UF
1206LF 1206LF
22.00UF25V 25V
22.00UF
1206LF
1206LF25V22.00UF
1206LF25V22.00UF
25V1206LF25V22.00UF
0.01UF
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
2
1
TPS54620
PH_12
GND_3
PVIN_5
PWRPAD
GND_2
VSENSE
PH_11
BOOT
COMPRT/CLKSS/TR
PWRGD
EN
VIN
PVIN_4
Page 11
VOLTAGE BOOST REQUIRED TO COMPENSATE FOR
VOUT_MIN = 3.18VVOUT_MAX = 3.41V
I3533-MAX = 1.5A
VOLTAGE DROP FROM DIODE OR CIRCUIT.MANY DESIGNS MAY NOT REQUIRE A BOOST CIRCUIT.
3.3V ENABLE
LTC3533 BUCK/BOOST REGULATOR FOR 3.3V
SENSE RANGE: 1.95V-2.12V
2
1 C112
2
1 C442
1 C51
2
1R113
21J6
21R149
43
21
J8
21R155
21J5
43
21
J7
L3
2
1
C50
21
C3921
R91
R115
2
1 R112
45 31
2
U9
21
C4121
R98
2
1C36
C96
2
1
R87
2
1 R86
2
1 R93
21
C94
21C31
21R150
2
1R159
2
1 C29
21
R95
810
14
743
12
1
911
65
15
13
2
U8
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 11
0.1UF
1000PF
8.2K
6.800PF
1%
10UF
1/2W1206LF
V3P3_SUPPORT
EMPTY
EMPTY
470PF
1/2W
1%
1.0M1%
EN_3.3VNC_76
0.1UF
0.1UF
0402LF
12.10K1%
1000PF
V3P3_OR
0
340K1000PF
3.3UH
200K
V3P3_LANV3P3_POWERV3P3_OR
2.20
0
0
0.01UF
1206LF
2.20
1%
33.2K
10UF
390K
7.68K
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
21
CONN
4
21
CONN
4
TPS3803-01D
RESET_NGND
VDDSENSENC
LTC3533
PAD
PGND
_6
PVOUT
VOUT
FB
VC
BURST
PGND
_5
SGND
RT
RUN/SS
VIN
PVIN SW2
SW1
Page 12
ISO_EN
ISO_DISDISABLE FX MODE10MBPS
100MBPS ENABLE FX
BTB
BTB ENNCSI MODE EN
NCSI MODE DIS BTB DIS
ENABLE AUTONEG
FULL DUPLEX
TSR > 50 US
NC-SI PHY SUPPLIES
CONNECT NS-SI INTERFACE TO A MANAGEMENT CONTROLLERTEST INTERFACE IS NOT REQUIRED IN A NORMAL DESIGNNC-SI TEST INTERFACE
2
1 C65
2
1 C56
2
1 C2
2
1 C12
2
1 C53
2
1
C112
1
C66
2
1C59
2
1 C60
21
R126
21
R124
21
R125
21
R43
21
R16
21
R49
21
R120
21
R119
21
R31
21
R33
21
R5
21
R130
21
R118
21
R29
21
R27
21
R46
21
R45
21
R47
21
R48
21
R123
21
R1
21FB3
21FB1
4546
42313847
247
13
4140
14
16
20191817
15
3332
119
3456
10
48
37
30
12
29282726
25
34
2221
U2
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 12
NCSI_MDC_NC
NCSI_TXD_1
NCSI_RX_N
NCSI_PHY_CLKNCSI_CRS_DV
14A2 3A2 14A2 3B2
13B4 13B4
13A2 3B2 14A2
3A2 14A2
13B4 13B4
14A2 3B2
13B1 13B1
3A2 14A2
10UF
V3P3_SUPPORT
V3P3_SUPPORT
10.0K
10.0K
10.0K0.1UF
V3P3_SUPPORT
0.1UF0.1UF
NCSI_TXD_0
NCSI_RX_P
TXER
10.0K
22.60K
XI
V2P5_NCSI_PLL
10.0KEMPTY
10.0K
10UF
EMPTY
EMPTY
NCSI_RXD_1
0
EMPTY10UF
10UFEMPTY10UF
EMPTY10.0K
10.0KEMPTY
EMPTY10.0K
EMPTY10.0K
V3P3_SUPPORT
V3P3_SUPPORT
V3P3_SUPPORT
FIBER_EN
NCSI_TX_NNCSI_TX_P
NCSI_EN
10UF
1%
10.0K
600 600
10.0K
6.49K
10.0K10.0K
10.0K10.0K
10.0K
10.0K
V2P5_NCSI_C
NCSI_BTB
NCSI_TX_EN
AUTONEG_ENDUPLEX
NCSI_SPD100NCSI_LINK_ACT
NCSI_RXD_0
XO_NC
ISOLATE
V2P5_NCSI
1%
NCSI_MDIO
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
IN
OUT
OUTOUT
OUTOUT
ININ
OUTOUT
IN
ININ
TXD1TXD2
PD_N
CRS_RMII_BTBCOL_RMII
TXP
LED3_NWAYEN
LED1_SPD100_NFEFLED0_TEST
RXER_ISORXDV_CRSDV_PCS_LPBK
RXC
FXSD_FXEN
XO
TXD0TXEN
KS8721
LED2
RST_N
TXD3
MDCMDIO
XI
TXN
INT_N_PHYAD0RXD3_PHYADRXD2_PHYAD2RXD1_PHYAD3RXD0_PHYAD4RXN
VDDIO_0VDDIO_1
VDDC
VDDPLLVDDRCVVDDRXVDDTX
TXC_REFCLKTXER
REXTRXP
Page 13
TEST INTERFACE IS NOT REQUIRED IN A NORMAL DESIGNCONNECT NS-SI INTERFACE TO A MANAGEMENT CONTROLLER
CLOSE TO PHY
NC-SI TEST INTERFACE
CH-B
AS CLOSE TO THE DEVICE
AS POSIBLE
+-50 PPM CLOSE TO SOURCE
RJ45
50MHZ NC-SI CLOCK
CH-A
CLOSE TO PHY
2
1C57
2
1C54
2
1 C17
2
1 C1
21J9
21R40
21R36
4
3
2
1
DS8
21
DS9
9
8
2
3
5
4
10
11
7
1
6
12
1413
JA1
2
1C5
21R128
21
R22
2
1C15
2
1C421
R129
21R41
31
Y1
7632
8
5
U5
21
FB2
21 R2
21 R3
21
R24
21
R212
1
R15
21
R8
2012-09-281.90483190I210-AT/82574 REFERENCE SCHEMATIC 13
49.9
V3P3_SUPPORT
12B1
12B1
12B4
12B1
12B1
12B4
14A2 3B2
12B4
V2P5_NCSI
49.9
OSC
V3P3_SUPPORT
50MHZ
NCSI_SPD100
NCSI_LINK_ACT
I98G19330-001
NCSI_RX_N
NCSI_TX_P
0.1UF
V3P3_SUPPORT
0.01UF
V3P3_SUPPORT
0.01UF
10.0K
EMPTY
33
33
33
THLFCONN
0NCSI_TX_N
130
IC
NCSI_RX_P
1%
1%
0.1UF
0.1UF
GREEN
NCSI_CLK_IN
130
0.01UF
49.91%
49.91%
D14725-007
0
0.1UF
NCSI_PHY_CLK
600
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
TRP4-
TRP4+
TRP3-
TRP2+
TRP1-
TRP1+
CONN12_1840426_3
TRP3+
TRP2-
C2C1
TRCT2
TRCT4
TRD4-
TRD4+
TRD1-
TRCT3
TRD3+
TRD2-
TRD3-
TRD1+
TRCT1
TRD2+
OE OUT
OE
Q0
Q3Q2Q1ICLK
ICS553
BI
BI
BI
BI
IN
IN
21
OUT
OUT
LED_DUAL_4P
YELLOW
GREEN
Page 14
SDP 0-3 NOT USED IN 82574- NO STUFF-
82574-NVMT_PD
LED FUNCTION INTENTIONALLY INVERTED (LED OFF - NORMAL)
DEV_OFF_N
PULL_DOWN_TO
LAN_PWR
RST_RSMRST_N
NC-SI_I/0
2. GND
4. NC/+5V5. MISO
10. GND
DISABLE
3. SDA
PE_RESET LED
6. NC/+5V7. SCLK8. MOSI9. SS
1. SCLI2C/SPI TEST INTERFACEARDVARK
PLACE NEAR SPI
SDP PU-OPTIONAL
PE_WAKE LED
PLACE JUMPER
BTB HEADER
SDP3-PE-DIS OPTSDP1-DEV-OFF OPT
TEST CONNECTORS I/O
PU EMPTY WHEN NOT USED OR WHEN USED WITH GPIO
TEST INTERFACE IS NOT REQUIRED IN A NORMAL DESIGN
82547-EMPTYJTAG TEST INTERFACE.
PD-NORMTEST_EN82574
2
1 R38
987654
30
3
29282726252423222120
2
19181716151413121110
1
J4
2
1R79
98765432
10
1
J20
8 76 54 32 1
J19
8 76 54 32 1
J21
21R4
12
DS2
1
2 DS5
1
2 DS4
1
2 DS1
1
2 DS6
2
1 R134
8 76 54 32 1
J18
2
1
R172
1
R34
2
1
R39
2
1R26
21R1
121R1
0
2
1
3
Q22
1
3
Q4
21R1
2
2
1
3
Q3
21R1
4
2
1
3
Q1
98765432
10
1
J2
2
1R61
Q6
Q5
12
DS3
12
DS7
21R6
21R7
NCSI_TX_ENNCSI_TXD_1NCSI_TXD_0
NCSI_ARB_IN
SMBD
PE_RST_N
SMBDMISO
SMBCLK
SS
33K
SCLK
EMPTY
330
V3P3_PE_AUX
LAN_PWR_GOOD
SDP1
330
BLUE
CABLE_PRSNT_NNCSI_ARB_OUT
LAN_PWR_GOOD
SMLF
NONE
GREEN
ACT_BTB
NCSI_RXD_1NCSI_RXD_0NCSI_CRS_DV
V3P3_SUPPORT
330
V3P3_PE_AUX
SDP3
SDP1SDP0
SDP2
10.0
K
10.0
K
330
330
SMBCLK
MOSI
BLUEDEV_OFF_N
PE_WAKE_N
AVDD09_OUT
JTMS
NCSI_CLK_IN
YELLOW
330
RED
3B2
3A4
3A4
14A3 3A4 5B1
14A3 3A4
5B1 5B1
5B4 14A1
14B4 6B3 4B4
3B2
5B4 14B2
6B3 5B4
4B4
6B3 4B4
14A1 6B3 4B4 6B3 4B4
4B4
3A4
14A4
5B4
3A4
8A2 6B4
6B3 5B4
3B2 13A2
10.0
K
14I210-AT/82574 REFERENCE SCHEMATIC 483190 1.90 2012-09-28
V3P3_SUPPORT
12B4 12B1 3B2
14A4
10.0
K
GPIO1_NC
05B4
5B4 6B3 JTDOJTDI
JRST_N
GPIO0_NC
3A4
RED
330
AMBER
SMBALRT_N
10.0K
V3P3_SUPPORT
3A2 3B2 12B4
3A2 3A2 3B2 12B4
12B4 12B4
JTCK
0
5B1
V3P3_SUPPORT
DOCUMENT NUMBER REV DATECODE
B
SIZETITLE SHEET
5 4
A
12
A
B
C
78
B
C
DD
1345678 2
6 3
LAN ACCESS DIVISION2111 N.E. 25th AVENUEHILLSBORO, OR 97124
OUT
IN
IN
ININININ
INININININ
ININININ
CONN8
CONN8
CONN8
FET_P
S
G DFET_P
S
G DFET_P
S
G DFET_P
S
G D
CONN10
FET_P
S
G D
FET_P
S
G D
SCONN30_E95855001
IO1IO3IO5IO7IO9IO11 IO12
IO2
IO27IO23
IO15IO13IO17IO19IO21IO25 IO26
IO28IO29 IO30
IO8IO6IO4
IO10
IO24IO22IO20IO18IO16IO14
OUTOUT
ININ
OUTIN
OUTOUT
OUT
OUT
OUT
SCONN10_966926_5
OUT
IN
OUT
OUT
ININ
OUTOUT
