IEEE TRANSACTIONS ON POWER ELECTRONICS 1 Power … · 2015. 12. 14. · IEEE TRANSACTIONS ON POWER...

IEEE TRANSACTIONS ON POWER ELECTRONICS 1

Power-Extraction Circuits for Piezoelectric EnergyHarvesters in Miniature and Low-Power

ApplicationsJ. Dicken, P.D. Mitcheson, Member, IEEE, I. Stoianov, and E.M. Yeatman, Senior Member, IEEE

Abstract—When a piezoelectric energy harvester is connectedto a simple load circuit, the damping force which the piezoelectricelement is able to generate is often below the optimal valueto maximise electrical power generation. Circuits that aim toincrease the power output of a piezoelectric energy harvesterdo so by modifying the voltage onto which the piezoelectriccurrent source drives its charge. This paper presents a systematicanalysis and comparison of all the principal types of powerextraction circuit that allow this damping force to be increased,under both ideal and realistic constraints. Particular emphasisis placed on low-amplitude operation. A circuit called single-supply pre-biasing is shown to harvest more power than previousapproaches.

Most of the analysed circuits able to increase the power outputdo so by synchronously inverting or charging the piezoelectriccapacitance through an inductor. For inductor Q factors greaterthan around only 2 the single-supply pre-biasing circuit hasthe highest power density of the analysed circuits. The absenceof diodes in conduction paths, achievable with a minimumnumber of synchronous rectifiers, means that the input excitationamplitude is not required to overcome a minimum value beforepower can be extracted, making it particularly suitable for micro-scale applications or those with a wide variation in amplitude.

Index Terms—Piezoelectric, transducers, Energy conversion,vibration-to-electric energy conversion, energy harvesting

I. INTRODUCTION

INERTIAL energy harvesters turn the mechanical motionof a proof mass into electrical energy in order to powera load circuit. There are three main transduction methods forconverting the mechanical work into electrical energy: electro-magnetic, electrostatic and piezoelectric. The electromagneticapproach, as commonly used in conventional energy genera-tion schemes, has been implemented at miniature and micro-scales for energy harvesting devices by utilising finely-woundor printed coils and permanent magnets. These devices havebeen successful particularly at the cm scale and above [1], [2].The electrostatic force has been implemented using moving-plate capacitors primed with an external source such as abattery [3], or primed with an electret [4], [5]. Piezoelectricdevices include centrally loaded beams [6], and cantilevers [7].

J. Dicken is with the Department of Electrical and Electronic Engineer-ing and the Department of Civil Engineering, Imperial College London;P.D. Mitcheson and E.M. Yeatman are with the Department of Electricaland Electronic Engineering; I. Stoianov is with the Department of CivilEngineering, Imperial College London. e-mail: [email protected].

Manuscript received September, 2011; revised February 2012; acceptedMarch 2012.

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Fig. 1. Inertial energy harvester with parasitic damping and displacement-constrained travel.

For the inertial energy harvester device shown in Fig. 1 tooperate optimally (i.e. with maximum possible power density),the damping force presented by the transducer must be opti-mised [8]. As an example, when operating the generator atresonance, the electrical damping force De should be madeequal to the parasitic (mechanical) damping force Dp, or toa level which just limits the travel range of the proof massto ±Zl (the maximum displacement amplitude in which themass may travel before hitting the end stops), whichever isthe greater. Under many operating conditions and transducerdesigns, the required damping forces cannot readily be reachedusing conventional load circuits (resistors or bridge rectifiers)connected to piezoelectric transducers. This is primarily be-cause of the modest electromechanical coupling coefficientsachievable [9], [10].

If the amplitude Yo of the external displacement is smallcompared to the internal travel range of the mass, Zl, then thesystem can operate with a high Q before the end stop limits arereached. In such cases, if the parasitic damping is low, high Qoperation will maximise power output, and this will requirelow electrical damping; consequently a high piezoelectriccoupling coefficient is not required. However, these conditionsare generally found only for high-frequency applications, andit is increasingly recognised that most practical applications ofenergy harvesters provide vibration at modest frequencies, inthe range 1 - 100 Hz. Low-amplitude displacement operationalso presents a practical limitation in some circuits in that theopen-circuit voltage must be large enough to overcome thediode on-state voltage drops.

Whatever electrical damping is realised results from pro-viding real power to the electrical load connected to the

Copyright c©2012 IEEE. Personal use of this material is permitted. However, permission to use this material for any otherpurposes must be obtained from the IEEE by sending an email to [email protected].

IEEE TRANSACTIONS ON POWER ELECTRONICS AND INDUSTRIAL ELECTRONICS SPECIAL ISSUE 2012 2

transducer. If a simple resistive or rectifying load is used, themaximum damping for a piezoelectric device is small, as statedabove. However, various load circuits have been proposed anddemonstrated which can overcome this limit. All essentiallyfunction by placing additional charge on the piezoelectric ele-ment in a synchronous fashion, which acts to increase the forcethe transducer presents to the mechanical system. In this paperwe review and compare these circuits in terms of the powerdensities that can be achieved under both ideal and realisticconstraints, and identify which provide the best performanceunder specific conditions. We also discuss a circuit that has thepotential to perform best over all operating conditions calledsingle-supply pre-biasing, the purpose of which is to avoidthe need for the open-circuit voltage to overcome diode dropsby using a minimal number of synchronous rectifiers. Thisallows effective operation of an energy harvester even forlow-amplitude input vibrations. A general review of energyharvesting power conditioning circuits is given in [11].

All of the circuits are analysed here within the same analyt-ical framework to allow fair comparisons to be made betweenthem. Where circuits have previously been investigated byothers, the analysis is briefly repeated here, but with particularattention to such factors as the effect of diode drops for circuitswith low piezoelectric output voltages. All of the derivedclosed-form solutions have been verified against PSpice time-domain simulations and the results agree within a few percent.

II. MODELLING

The force presented by the piezoelectric transducer tothe mechanical system is influenced by the impedance andoperation of the electrical circuit that is connected to it. Thetransducer interface circuit can therefore be designed to allowmodification of the damping force, and different types ofcircuit are capable of modifying the electrical damping bydifferent amounts. A simple equivalent circuit model of amass-spring-damper microgenerator damped by a piezoelectricelement with a purely resistive load is shown in Fig. 2 [12].

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reduced by allocating additional volume to each constituentpart of the harvester system. As there is generally a constrainton total harvester volume, optimally choosing all of thecomponent values within the volume constraint is a complextask. Fully optimising the system in a holistic way across all ofthese variables for each candidate circuit is beyond the scopeof this paper; however, sensible component values must bechosen to allow fair comparisons between the circuits to bemade.

The power consumed by control circuitry has also not beenconsidered. This control usually involves maxima/minimadetection, gate drives and some simple timing, and so itspower consumption is similar across the range of architecturesstudied. This will affect the relative performance of circuitswith and without such a requirement, particularly at verylow output power levels, although not the comparison of thecircuits’ performance in terms of the Q factor of their inductivecurrent paths.

In the case that diode voltage drops are either negligible orare ignored, it is found that the power output of each circuitcan be normalised to a factor of Io2/ωCp and written solelyas a function of the Q factor of the current paths containinginductors. This allows a comparison between the performanceof all circuits to be made which holds regardless of excitationcharacteristics and the volume of piezoelectric material used.However, when diode drops are taken into account, suchnormalisation is not possible. For these comparisons, com-ponent values were taken from the best available off-the-shelfproducts at the time of writing for three chosen sizes of energyharvester. The configurations of harvester and componentparameters used are summarised in the Table I. The on-stateresistance of any switches is assumed negligible compared tothe series resistances of inductors, and the parasitic capacitanceis negligible compared to Cp, which is realistic for existingoff-the-shelf parts.

TABLE ICOMPONENT PARAMETERS FOR HARVESTER CONFIGURATIONS

Config. Vol. Rs L Cp VDon1 1 cm3 0.47 Ω 470 µH 65 nF 0.5 V2 3 cm3 0.141 Ω 1.41 mH 585 nF 0.4 V3 10 cm3 47 mΩ 4.7 mH 6.5 µF 0.3 V

The inductors were chosen from a range of products avail-able to maximise the Q factor of the current paths in eachgiven volume, and the diodes are Schottky diodes.

Of the various circuits analysed, some have the capabilityto push energy into a storage element such as a capacitor inorder to provide a stable DC voltage for a load, while othersprovide a time-varying voltage. This important difference infunctionality is taken into account when final comparisons ofthe circuits are made. The circuits will now be analysed.

IV. PURELY RESISTIVE LOAD

The simplest load that can extract real power from thepiezoelectric transducer is a resistive load as shown in Fig. 5.

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Fig. 5. Piezoelectric energy harvester connected to a purely resistive load.

Under excitation by a sinusoidal current source with amagnitude Io, a resistive load of magnitude RL will dissipatea power PRL , given by:

PRL =1

2

(Io

2RL

1 +RL2ω2Cp

2

)(1)

At the optimal load resistance of 1/ωCp the circuit has amaximum power output of:

PORL =1

4

(Io

2

ωCp

)(2)

This value of PORL will be used as a base case for comparisonwith the other circuits.

V. TUNED-OUT SHUNT CAPACITANCE

An obvious approach to extract the maximum power fromthe current source in Fig. 4 is to add a shunt inductor totune out the piezoelectric capacitance. However, this optionis not realistically achievable because of the very large in-ductor values required. For example, in an energy harvestingapplication with a typical vibration frequency of 100 Hz, anda piezoelectric capacitance of 100 nF, the required resonantinductor would be about 25 H. Consequently, this optioncannot be exploited in practice, and is not considered furtherhere.

VI. RECTIFIED DC LOAD

CpIo

CpIo

Guyomar with resistive load

Io

Io

CpIo S0

S1 S2

Io Cp

Io

L

Rs

CpIo Co

Iin Iout

VoutVCp

RL

RLRL

CoCp

Cp

Cp

L

RS

2mY

i1m

1k

V2V1

i2Dp

1 : n

Cp+–

2mY

i1m

1kDp

+–

Dp

k

mz(t)

m

Zl

y(t)

x(t)

VD

D1

D3

D2

D4

Co

RsL

Io CpVout

D5

So

Vout

CpIo

L

RL

RS

Parallel SSHI DC output

CpIoL

RS

D1

D3

D2

D4

CoVout

Cp Co

RS1

Io L1

L1RS2

Vout

SfSd

D5

Cp

D1LRsVout

D2

RL

DeVCC

Io

Cp

DE

DADB

D1 D3

S1 S3

S2 S4

S5

DCDD

D2

D4 Vout2mY

m1kDp

Cp

+– RL

i1/ni1

S1 S2

Vout Vout

Vout Vout

V(t)

Fig. 6. Full-bridge rectifier with output smoothing capacitor.

A more useful output circuit for piezoelectric microgener-ators is a standard bridge rectifier with a smoothing capaci-tor (Fig. 6). The circuit’s application in energy harvesting wasoriginally analysed in [15] where the diodes were assumed tobe ideal. Here we analyse the circuit as having diodes with afixed on-state voltage drop (VD). This circuit provides usefuladditional functionality over the circuit in Fig. 5 as almost allelectronic loads require a DC input. The output capacitance Cowill typically be much larger than the piezoelectric capacitanceCp, and so its voltage can be approximated as constant overa cycle. The current waveform Iout will be discontinuous,


and only non-zero when the magnitude of the voltage on thepiezoelectric capacitance VCp exceeds Vout+2VD. The voltagewaveform on the piezoelectric capacitance in relation to thepiezoelectric current source is shown in Fig. 7:

Time [arbitrary units]

C p V

olta

ge [V

]0

0In

put C

urre

nt [A

]

Vout+2VD

-(Vout+2VD)


V Cp

[V]

0

2Vpo Generation Phase

Discharging Phase


V out

[V]

0V1


V Cp

[V]

0

2Vpo-VD Generation PhaseCharge-Flipping

Phase

-VD

VD


V Cp

[V] 0

V2

Generation Phase

V1 Charge-Flipping Phase

V3


V Cp

[V]

0

V1+2Vpo

V2

Generation Phase

V1

Charge-Flipping Phase

Output Voltage Vout [V]

P/P m

ax

Vopt

Pps+Pfw(Pout)

Pfw

Pps

O.R.L Bridge Rectifier

Pre Biasing &Single-Supply Pre Biasing

Parallel SSHI S.E.

Series SSHI DC

Parallel SSHI DC

25

20

15

10

5

00 1 2 3 4 5 6 7 8 9 10

Inductor Q-factor [ L/Rs]

Pow

er g

ain

over

Rec

t. D

.C. [

P max

/PR

ECTD

C]

Sync. Ex. DC

Generation Phase


-2Vpo

V2

V3

1


V Cp

[V] 0

VPB+2Vpo

Generation phase

VPB

Discharging phase

Pre-biasing phase

0O

utpu

t Cur

rent

[A]

Fig. 7. Input current, piezoelectric voltage and output current in the presenceof a bridge rectifier with a fixed output voltage Vout.

It is useful to introduce a quantity Vpo which is the open-circuit voltage magnitude of the piezoelectric capacitance asshown in Fig. 4. This is given by:

Vpo =IoωCp

(3)

By finding the angle at which conduction into the output stagebegins, the power output of the circuit as a function of theoutput voltage Vout can be determined:

Pout =2

πIoVout

[1− Vout + 2VD

Vpo

](4)

For which the optimal output voltage is:

Voutopt =1

2(Vpo − 2VD) (5)

The maximum power is then found by substituting (5) into(4), as:

Pmax =(Io − 2VDωCp)2

2πωCp=

1

2π

(1− 2VD

Vpo

)2(Io

2

ωCp

)(6)

Unless the diodes are replaced with synchronous rectifiers, thecircuit only produces power if the change in voltage due to thecurrent source is high enough to cause current to flow to theoutput stage, that is Vpo > Vout + 2VD. Therefore to extractpower from the circuit at all if Vout → 0 we require that:

Vpo > 2VD (7)

In the ideal case that the diode drop is negligible, the poweroutput simplifies to Pmax = Io2/2πωCp, which is less thanthe optimal resistive load case (PORL) by:

PRECTDCPORL

=2

π≈ 0.64 (8)

Clearly, when the diode drops are included, this ratio is evenlower. Thus, whilst this circuit is more useful than the optimalresistive load, there is a trade-off in that less power can beconverted.

VII. SYNCHRONOUS SWITCHED EXTRACTION

A third circuit, originally proposed by Shenck [16], andreviewed in more detail in [17], is shown in Fig. 8. Instead ofa direct connection, the resistive load is connected via a switchthat closes when the voltage on the capacitor is maximal ineither polarity (i.e. at the zero crossings of the current source).At that instant, all the energy on the capacitor is transferredto the load, and the process is repeated in the negative halfcycle as shown in Fig. 9. Note that in this circuit the switchmust be capable of conducting and blocking in both directionsand therefore cannot be a single MOSFET. However, the effectcould be achieved with a pair of series MOSFETs with suitablegate drives. We assume from now on that all switches havethis capability, and hence model them as perfect switches.

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VIII. SYNCHRONOUS SWITCHED EXTRACTION WITH DCOUTPUT AND EFFICIENT ENERGY TRANSFER

As we have seen from the circuit in Fig. 8, there is anadvantage of a factor of 2.55 over the optimal resistive loadcase when extracting energy from the circuit at zero crossingsof the current source. As previously discussed, a DC output isrequired to power a typical electronic load. A new synchronousswitched circuit can therefore be proposed (Fig. 10) with arectifier and smoothing capacitor, which aims to achieve thesame energy gain of 2.55 and provide a DC output. The outputstage in this case is the output filter of a buck switch-modepower supply, which allows energy to be transferred efficientlyfrom Cp to the output capacitor Co, which again behaves asa constant-voltage source.

CpIo

CpIo


Io

Io

CpIo S0

S1 S2

Io Cp

Io

L

Rs

CpIo Co

Iin Iout

VoutVCp

RL

RLRL

CoCp

Cp

Cp

L

RS

2mY

i1m

1k

V2V1

i2Dp

1 : n

Cp+–

2mY

i1m

1kDp

+–

Dp

k

mz(t)

m

Zl

y(t)

x(t)

VD

D1

D3

D2

D4

Co

RsL

Io CpVout

D

S0

Vout

CpIo

L

RL

RS


CpIoL

RS

D1

D3

D2

D4

CoVout

Cp Co

RS1

Io L1

L1RS2

Vout

SfSe

D5

Cp

D1LRsVout

D2

RL

DeVcc

Io

Cp

DE

DADB

S1 S2

S3 S4

S5

DCDD

Vout2mY

m1kDp

Cp

+– RL

i1/ni1

S1 S2

Vout Vout

Vout Vout

V(t)

S6Vout

Fig. 10. Circuit for synchronous switched extraction with DC output.

A. Optimal energy transfer

In any circuit that transfers energy between a capacitor anda voltage source through an inductor, such as the Cp → S0 →L → Co current path of Fig. 10 (with Co being modelled asa voltage source), there can be one or two parts to the energytransfer process. The first part is the transfer of energy throughthe path between the capacitor, inductor and voltage source,and the second part is when the capacitor is fully dischargedand the inductor current then free-wheels (in this case thoughD). If the value of the voltage source (given the initial voltageon the capacitor) is carefully chosen, all the energy will havebeen removed from the capacitor at the same point as theinductor current falls to zero, meaning the free-wheeling stagedoes not occur. If the current path resistance is zero, then theinitial voltage on the capacitor, VCp(0), must be exactly twicethe value of the voltage source in order for it to fully discharge.If the voltage on the capacitor is higher than this, then free-wheeling will occur. If it is lower then a voltage will remainon the capacitor (approximately 2Vout − VCp(0)) when thecurrent has dropped to zero.

It can be shown that in the presence of losses, maximumenergy is delivered to the voltage source if the voltages aresuch that the circuit operates at the limit of the onset offree-wheeling, and this is the strategy chosen for the circuitsanalysed here. Figure 11 shows the results of a simulation ofthe normalised output power vs. Vout, and the contributions tothis power from free-wheeling and direct conduction.


C p V

olta

ge [V

]0

0In

put C

urre

nt [A

]

Vout

-VoutTime [arbitrary units]

Vol

tage

[V]

0

Vpo Generation Phase

Discharging Phase


Vol

tage

[V]

0

VPB

VPB+ VCp


V out

[V]

0

V1


Vol

tage

[V]

0


Phase

-VD

VD


Vol

tage

[V]

0

V2

Generation Phase


V3


V Cp

(arb

itrar

y un

its)

0

V1+2Vpo

V2

Generation Phase

V1



P/P m

ax

Vopt

Pps+Pfw(Pout)

Pfw

Pps



Parallel SSHI S.E.

Series SSHI DC

Parallel SSHI DC

25

20

15

10

5

00 1 2 3 4 5 6 7 8 9 10


Pow

er g

ain

over

Rec

t. D

.C. [

P max

/PR

ECTD

C]

Sync. Ex. DC

Generation Phase


Generation Phase

Discharge Phase

Pre-Bias (Charging)

Phase

-Vpo

V2

V3

1

Fig. 11. Contributions to power output from free-wheeling and directconduction, and their sum, as a function of output voltage, for the circuitof Fig. 10. At Vout = Vopt the contribution from free-wheeling is zero.

B. Detailed analysis of synchronous switched extraction

The circuit of Fig. 10 will now be analysed. At the start ofthe cycle (shown in Fig. 12), the current source drives chargeinto the capacitor with switch S0 open. As in the previoussynchronous extraction case, S0 is closed at the point whenthe voltage on Cp is at its maximum. This causes current toflow through the full-bridge rectifier and inductor to the outputcapacitor. If the circuit is operating on the limit of freewheelingoccurring, the voltage on Cp will be clamped at VD at the endof the extraction process. It is worth noting that were D notpresent, the voltage after energy extraction would instead be2VD.


Cp V

olta

ge [V

]0

0In

put C

urre

nt [A

]

Vout


V Cp

[V]

0


Discharging Phase


V out

[V]

0

V1


V Cp

[V]

0


Phase

-VD

VD


V Cp

[V] 0

V2

Generation Phase


V3


V Cp

[V]

0

V1+2Vpo

V2

Generation Phase

V1



P/P m

ax

Vopt

Pps+Pfw(Pout)

Pfw

Pps



Parallel SSHI S.E.

Series SSHI DC

Parallel SSHI DC

25

20

15

10

5

00 1 2 3 4 5 6 7 8 9 10


Pow

er g

ain

over

Rec

t. D

.C. [

P max

/PRE

CTD

C]

Sync. Ex. DC

Generation Phase


-Vpo

V2

V3

1


V Cp

[V]

0

VPB+2Vpo

Generation phase

VPB

Discharging phase

Pre-biasing phase

Fig. 12. Voltage waveform on the piezoelectric capacitance.

The inductor is modelled as having inductance L with seriesresistance Rs, and the capacitors are assumed to be free ofleakage. It is also again assumed that the output voltage isconstant and is thus modelled as a voltage source. The maincurrent path is a series RLC circuit with two diodes as shownin Fig. 13.

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giving:

Q =1

Rs

√L

Cp(12)

The damped resonant frequency of the path is:

ωn =

√1

LCp− Rs

2

4L2(13)

Given that D clamps Cp at VD at the end of the charge-flippingphase, the voltage at the end of the piezoelectric generationphase is 2Vpo − VD. The period for which the switch shouldbe closed is half a cycle of the damped natural frequencyωn (i.e π/ωn), the end of which coincides with a zero valueof inductor current. The fraction of voltage conserved on thecapacitor of an RLC oscillator with Q factor Q after one halfcycle of operation is:

γ ≈ e−π2Q (14)

Therefore the final voltage on the piezoelectric capacitance Cpwill be:

Vfinal = (Vout + 2VD)− γ [(2Vpo − VD)− (Vout + 2VD)](15)

As explained in Subsec. VIII-A, in order to remove as muchenergy as possible from the piezoelectric capacitance werequire that in a resonant half cycle, enough energy is removedfrom Cp to reduce the voltage to exactly VD. This implies that(15) puts an upper bound on the value of Vout of:

Vout ≤(2Vpo − 3VD)γ − VD

1 + γ(16)

If Vout is greater than this value, then it is impossible to extractall of the energy stored in Cp though the action of the resonantcircuit. Assuming Vout is set exactly as per the limit of theinequality in (16), then the energy output from the circuit perhalf cycle is:

E 12

= VoutCp(2Vpo − 2VD) (17)

By approximating γ as close to 1 and hence taking a truncatedseries expansion γ = 1 − π/2Q, and with Vout set to themaximum value permitted by (16), this expression multipliedby 2f gives the power output from the circuit:

Pout ≈2

π

Io2ωCp

(1 − π4Q

)− 3

VD

Vpo

(1 −

π

6Q

)+ 2

VDVpo

2 (1 − π8Q

) (18)

This expression indicates clearly the loss of power from twofactors - the finite Q of the inductor, and the diode voltagedrop. If both factors are neglected, the output power is thesame as the synchronous switched extraction into a resistiveload of Fig. 8. Without neglecting losses, to obtain any powerin the circuit of Fig. 10 we require that Vpo > VD.

IX. PIEZOELECTRIC FIXED VOLTAGE CONTROL

The circuits analysed so far achieve different performancein terms of power output ultimately because the piezoelectriccurrent source pushes charge into different average voltages.To maximize the energy generated, the circuit must therefore

maximize this voltage. We can now see that it is intuitivelyreasonable that the rectifier circuit should perform the poorest,the directly connected resistor is better and the synchronouscircuits perform the best. The rectifier circuit clamps thepeak voltage on the piezoelectric capacitance so that thecurrent source never operates into the maximum voltage, whilethe synchronous circuits maintain all of the charge on thepiezoelectric capacitance until the voltage peaks.

CpIo

CpIo


Io

Io

CpIo S0

S1 S2

Io Cp

Io

L

Rs

ALL LINES SHOULD BE IN LINE WEIGHT 3 (WHATEVER THAT IS)

CpIo Co

Iin Iout

VoutVCp

RL

RLRL

CoCp

Cp

Cp

L

RS

2mY

i1m

1k

V2V1

i2Dp

1 : n

Cp+–

2mY

i1m

1kDp

+–

Dp

k

mz(t)

m

Zl

y(t)

x(t)

VD

D1

D3

D2

D4

Co

RsL

Io CpVout

D5

So

Vout

CpIo

L

RL

RS


CpIoL

RS

D1

D3

D2

D4

CoVout

Cp Co

RS1

Io L1

L1RS2

Vout

SfSd

D5

Cp

D1LRsVout

D2

RL

DeVCC

Io

Cp

DE

DADB

D1 D3

S1 S3

S2 S4

S5

DCDD

D2

D4 Vout2mY

m1kDp

Cp

+– RL

i1/ni1

S1 S2

Vout Vout

Vout Vout

Fig. 14. Piezoelectric fixed voltage control.

Expanding this concept, various circuits have been devel-oped that increase the output voltage into which the gener-ated charge is supplied by adding charge to the device atsuitable points in the motion cycle. All these circuits requiresynchronous switching of some type, and thus have somemonitoring and control overhead. A simple example is shownin Fig. 14, which was originally introduced for applicationsin structural damping [18], where the inefficiencies due to alack of inductors in current paths are not a concern. In thiscircuit the generator is connected to one of the two outputvoltage sources continuously, by either S1 or S2, except fortwo very short periods per cycle when the current source hasa zero crossing. At that moment, the polarity of Vout is near-instantaneously switched using S1 and S2 so that the currentsource is always charging a supply.

Since the charge produced by the generator during each halfcycle is 2Io/ω, the energy supplied per cycle is 4VoutIo/ω.However, each polarity reversal at the current zero crossings(corresponding to a displacement maximum) drains 2CpVoutof charge from the supply, reducing the net energy gain percycle by 4CpVout2. The value of Vout that optimises the netpower is Io/2ωCp, giving a net average power of:

Pmax =1

π

(Io

2

ωCp

)(19)

This is worse than the optimal resistive load by a factor of2/π.

CpIo

CpIo


Io

Io

CpIo S0

S1 S2

Io Cp

Io

L

Rs

ALL LINES SHOULD BE IN LINE WEIGHT 3 (WHATEVER THAT IS)

CpIo Co

Iin Iout

VoutVCp

RL

RLRL

CoCp

Cp

Cp

L

RS

2mY

i1m

1k

V2V1

i2Dp

1 : n

Cp+–

2mY

i1m

1kDp

+–

Dp

k

mz(t)

m

Zl

y(t)

x(t)

VD

D1

D3

D2

D4

Co

RsL

Io CpVout

D5

So

Vout

CpIo

L

RL

RS


CpIoL

RS

D1

D3

D2

D4

CoVout

Cp Co

RS1

Io L1

L1RS2

Vout

SfSd

D5

Cp

D1LRsVout

D2

RL

DeVCC

Io

Cp

DE

DADB

D1 D3

S1 S3

S2 S4

S5

DCDD

D2

D4 Vout2mY

m1kDp

Cp

+– RL

i1/ni1

S1 S2

Vout Vout

Vout Vout

Fig. 15. Piezoelectric fixed voltage control (with charge cancelling).

Some improvement can be made by dividing the polar-ity reversal into two stages (Fig. 15): discharge through anadditional switch So, followed by charging to the oppositepolarity. This reduces the lost energy by half, and doubles


the net power and the optimal Vout. However, at 4/π timesbetter than the optimal resistive load case, the output poweris still low compared to the synchronous switched outputcircuits discussed above. To gain a power advantage over theseprevious synchronous circuits, it is necessary to apply the extracharge to the piezoelectric device in as lossless a manner aspossible, which is the purpose of the class of circuits describedbelow.

X. PARALLEL SSHI WITH RESISTIVE LOAD

The SSHI (Synchronous, Switched Harvesting with Induc-tor) technique reported by Guyomar et al. in [19] introducedthe key advance of using a switched inductor to flip the chargeon the capacitor twice per cycle. Since the extra charge doesnot have to be drawn from an external supply, the losses canbe minimal - limited primarily by the finite Q of the pathcontaining the inductor.

CpIo

CpIo


Io

Io

CpIo S0

S1 S2

Io Cp

Io

L

Rs

CpIo Co

Iin Iout

VoutVCp

RL

RLRL

CoCp

Cp

Cp

L

RS

2mY

i1m

1k

V2V1

i2Dp

1 : n

Cp+–

2mY

i1m

1kDp

+–

Dp

k

mz(t)

m

Zl

y(t)

x(t)

VD

D1

D3

D2

D4

Co

RsL

Io CpVout

D

So

Vout

CpIo

L

RL

RS


CpIoL

RS

D1

D3

D2

D4

CoVout

Cp Co

RS1

Io L1

L1RS2

Vout

SfSe

D5

Cp

D1LRsVout

D2

RL

DeVcc

Io

Cp

DE

DADB

D1 D3

S1 S2

S3 S4

S5

DCDD

D2

D4 Vout2mY

m1kDp

Cp

+– RL

i1/ni1

S1 S2

Vout Vout

Vout Vout

V(t)

S6

Vout

Fig. 16. SSHI with resistive load.

Figure 16 shows an SSHI circuit with a resistive load,with the inductor losses occurring in Rs. The output voltageVout is shown in Fig. 17. Gradually the energy stored in thecapacitor Cp builds, increasing the voltage, until the poweroutput increases to a point where the system reaches steadystate.


C p V

olta

ge [V

]0

0In

put C

urre

nt [A

]

Vout+2VD

-(Vout+2VD)


V Cp

[V]

0

2Vpo Generation Phase

Discharging Phase


V out

[V]

0

V1


V Cp

[V]

0


Phase

-VD

VD


V Cp

[V] 0

V2

Generation Phase


V3


V Cp

[V]

0

V1+2Vpo

V2

Generation Phase

V1



P/P m

ax

Vopt

Pps+Pfw(Pout)

Pfw

Pps



Parallel SSHI S.E.

Series SSHI DC

Parallel SSHI DC

25

20

15

10

5

00 1 2 3 4 5 6 7 8 9 10


Pow

er g

ain

over

Rec

t. D

.C. [

P max

/PR

ECTD

C]

Sync. Ex. DC

Generation Phase


-2Vpo

V2

1


V Cp

[V] 0

VPB+2Vpo

Generation phase

VPB

Discharging phase

Pre-biasing phase

0O

utpu

t Cur

rent

[A]

V3

Fig. 17. Voltage waveform of SSHI showing build-up to steady-state.

There are two phases of operation:1) The generation phase, during which the current source

charges Cp and the load resistor removes some charge.The voltage on Cp goes from V1 → V2.

2) The charge-flipping phase, where the charge stored onCp is flipped in magnitude through the inductor, and thevoltage on Cp goes from V2 → V3. This phase occursover a very short time period.

After the system is started from rest the output magnitudegradually rises until steady state is reached at V3 = −V1 asshown in Fig. 17.

A. Generation phase V1 → V2During the charging phase some energy is dissipated by the

load RL. The total charge passing through the load is:

qRL = IRLt ≈V1RL

π

ω(20)

The net charge supplied to Cp is then 2Io/ω − qRL , and thechange in voltage is simply this divided by Cp, giving:

V2 = V1

(1− π

ωRLCp

)+ 2Vpo (21)

B. Charge-flipping phase V2 → V3The charge-flipping phase will be much shorter than the

generation phase, so that the energy dissipated by the loadresistor RL during that time can be neglected. The switch isclosed for a time π/ωn (where ωn is given in (13)), i.e untilthe current in the inductor returns to zero. Using the definitionof γ in (14) the voltage after flipping from a voltage V2 is afunction of the Q factor of the RLC circuit as follows:

V3 = −V2γ (22)

C. Steady state

Solving (21) and (22) for the case where V3 = −V1 yieldsan expression for the steady-state voltage V1ss :

V1ss =2Vpo

1/γ − 1 + π/ωRLCp(23)

Approximating the output power as V1ss2/RL, the optimal

load can be derived as:

RLopt =π

ωCp (1/γ − 1)(24)

Using the approximation γ ≈ 1− π/2Q, the output power is:

Pmax =γ

π (1− γ)

(Io

2

ωCp

)≈ 2Qπ2

(Io

2

ωCp

)(25)

Compared to the optimal resistive load this is an improvementof:

PP SSHI RLPORL

=1

π

γ

1− γ≈ 8Qπ2

(26)

Thus even a modest Q provides a significant power gain. Whatis now needed is a method which realises the benefits of thiscircuit but which also gives a DC output.


XI. PARALLEL SSHI WITH DC OUTPUT

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AR

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Fig. 18. Parallel SSHI with DC output.

Fortunately, the parallel SSHI circuit can be straightfor-wardly adapted for a constant DC output with the addition ofrectification as shown in Fig. 18. This circuit was originallypresented in [20], was analysed in more detail in [21], and isanalysed here for consistency with our analytical framework.The rectifier and output capacitor clamp the output voltage ofthe piezoelectric element to ±(Vout+2VD). As in the previouscircuit, the switch is closed briefly at the zero crossings of thepiezoelectric current to reverse the polarity on Cp. The voltagewaveform on Cp is shown in Fig. 19.


Cp V

olta

ge [V

]0

0In

put C

urre

nt [A

]

Vout


V Cp

[V]

0


Discharging Phase


V out

[V]

0

V1


V Cp

[V]

0


Phase

-VD

VD


V Cp

[V] 0

V2

Generation Phase


V3


V Cp

[V]

0

V1+2Vpo

V2

Generation Phase

V1


Output Voltage Vout [V]P/

P max

Vopt

Pps+Pfw(Pout)

Pfw

Pps



Parallel SSHI S.E.

Series SSHI DC

Parallel SSHI DC

25

20

15

10

5

00 1 2 3 4 5 6 7 8 9 10


Pow

er g

ain

over

Rec

t. D

.C. [

P max

/PRE

CTD

C]

Sync. Ex. DC

Generation Phase


-Vpo

V2

V3

1


V Cp

[V]

0

VPB+2Vpo

Generation phase

VPB

Discharging phase

Pre-biasing phase

Fig. 19. Voltage waveform on the piezoelectric capacitance Cp for the circuitof Fig. 18

As can be seen, the piezoelectric voltage is clamped at amaximum of V2. After charge flipping this gives V3 = −γV2,which in steady state equals −V1 so that V1 = γV2. Tobring the voltage back to the clamped level in order to delivercharge to the output, some charge must be placed on Cp tocompensate for the inefficiency in the flipping process. Thus:

V2 − γV2 =1

Cp

τ∫0

Io sin(ωt)dt (27)

where τ is the time to reach the clamped voltage. From (27)we can obtain:

cos(ωτ) = 1− V2Vpo

(1− γ) (28)

The energy supplied to the output per half cycle is:

E 12

= IoVout

π/ω∫τ

sin(ωt)dt

= CpVpoVout

[2− (1− γ)(Vout + 2VD)

Vpo

](29)

This energy is maximised for an output voltage of:

Vout =Vpo

1− γ− VD (30)

for which the output power is given by:

Pmax ≈[1− π

2Q

VDVpo

]2(2Q

π2

)(Io

2

ωCp

)(31)

This equation shows a key advantage of the circuit, whichis that the open-circuit output voltage Vpo does not need toexceed the diode drop voltages, the minimum instead being VDtimes π/2Q. If Vpo is substantially greater than this minimum,so that the first factor in (31) can be neglected, then the outputpower is 8Q/π2 times higher than in the optimal resistiveload case. For the high-Q case, where the diode drop can beneglected and γ ≈ 1 − π/2Q, the optimum output voltageVout ≈ (2Q/π)Vpo. Since a sinusoidal current source ofamplitude Io supplies an average current (when rectified) of2Io/π, this implies an average power from the source of:

Psource ≈ Vout(2Io/π) ≈4Q

π2

(Io

2

ωCp

)(32)

Since the power supplied to the output is half this level, clearlythe optimised circuit is 50% efficient, as would be expectedfrom an impedance-matched source-load pair.

XII. SERIES SSHI WITH RESISTIVE LOAD

An alternative implementation of the synchronous switchedharvester is to place the switching inductor in series with theload, as shown in Fig. 20. This circuit was reported in [22], andanalysed again in [23] in the context of structural damping.

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&'

Fig. 20. Series SSHI with resistive load.

Again, the switch is briefly closed at the maxima of dis-placement to reverse the polarity of the voltage on Cp, butin this case power is only extracted into the load during thischarge-flipping phase. The waveform on Cp will be the sameas in Fig. 17, with a transient period until a steady state isreached. The loss of voltage due to dissipation in the chargereversal equals the voltage increase provided by the source, aswas the case in the previous charge-flipping circuits.

For this circuit, during the generation phase current is onlysupplied to Cp, not to the load, so that (using the previousnotation) V2(1 − γ′) = 2Vpo. Here γ′ is the efficiency of theRLC circuit as before, but where the Q of the charge-flipping


circuit now includes the load resistance RL, i.e γ′ = eπ/2Q′

and:

Q′ =1

Rs +RL

√L

Cp(33)

The energy dissipated in the two resistors is therefore:

Eloss =1

2CpV2

2 − 12CpV1

2 =1

2Cp(2Vpo)

2 1 + γ′

1− γ′(34)

≈ 8Q′

πCpVpo

2 (35)

This energy will divide between the two resistors in proportionto their magnitude since both conduct the same current, so theload energy per half cycle is:

E 12≈(

RLRL +Rs

)(8Q′

π

)CpVpo

2 (36)

It is straightforward to show that this is maximised for RL =Rs, for which Q′ = Q/2, giving a maximum power of:

Pmax =ω

πE 1

2=

2Q

π2

(Io

2

ωCp

)(37)

which is the same as in the parallel SSHI case of Fig. 16.

XIII. SERIES SSHI WITH DC OUTPUT

The series SSHI circuit can also be adapted for a fixed DCoutput by adding rectification, as shown in Fig. 21. In thiscircuit, proposed by Lefeuvre et al. [24], the charge flippingand energy extraction again occur simultaneously. Anothervariation presented in [25], [26] uses a transformer instead ofan inductor to decrease the effective on-state voltage drop ofthe diodes. It is also possible to modify the output voltage bythe addition of an additional flyback output stage as describedin [27]. This allows the first capacitor to remain at the optimalvoltage for operation of the SSHI technique, whilst giving achosen output voltage, and this does not modify the upperlimit on output power for this circuit. A further study of theswitching duty cycle required to maintain an optimal voltageon the storage capacitor is presented in [28].

When the switch is closed, charge flows through either D1and D4 or D2 and D3, and the output capacitor Co, being inseries with these, has charge added to it at a voltage Vout. Weassume Co is large enough so that Vout does not vary duringcharge flipping.

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XIV. PARALLEL SSHI WITH SYNCHRONOUS EXTRACTION

The previous circuit combined the advantages of chargeflipping for increased damping, synchronous charge extractionand a DC output. However, a disadvantage is that in order forit to operate, Vpo must be greater than 2VD. We now proposea circuit, called Parallel SSHI with synchronous extraction(Fig. 23), which aims to retain all the advantages of theprevious circuit and at the same time overcome the minimumrequirement on Vpo. This circuit introduces additional com-plexity in that there are now two control variables: the outputvoltage, Vout and the proportion of the stored energy on Cpto extract during each half cycle.

CpIo

CpIo


Io

Io

CpIo S0

S1 S2

Io Cp

Io

L

Rs

CpIo Co

Iin Iout

VoutVCp

RL

RLRL

CoCp

Cp

Cp

L

RS

2mY

i1m

1k

V2V1

i2Dp

1 : n

Cp+–

2mY

i1m

1kDp

+–

Dp

k

mz(t)

m

Zl

y(t)

x(t)

VD

D1

D3

D2

D4

Co

RsL

Io CpVout

D

S0

Vout

CpIo

L

RL

RS


CpIoL

RS

D1

D3

D2

D4

CoVout

Cp Co

RS1

Io L1

L2RS2

Vout

SfSe

D5

Cp

D1LRsVout

D2

RL

DeVcc

Io

Cp

DE

DADB

S1 S2

S3 S4

S5

DCDD

Vout2mY

m1kDp

Cp

+– RL

i1/ni1

S1 S2

Vout Vout

Vout Vout

VCp(t)

S6Vout

Fig. 23. Parallel SSHI circuit with synchronous extraction.

Pre-Biasing

Series

SSHI DC

Pow

er

[mW

]

Single-Supply Pre-Biasing

Parallel SSHI DC

Optimal

Resistive

Load

Open Circuit Voltage Vpo

104

10-3

10-1

10-2

10-1

10-0

0.01 1 10

Rectified

DC LoadPre-Biasing

0.1

Po

wer

[mW

]


Parallel SSHI DC

Optimal

Resistive Load


103

10-2

10-2

10-1

100

10-1

0.01 1 10

Rectified

DC Load

Parallel SSHI S.E.

0.1

10-3

10-4

10-5

Po

wer

[mW

]


Parallel SSHI DC


10-2

10-2

10-1

100

10-1

0.01 1 10

Rectified

DC Load

Parallel SSHI S.E.

Pre-

Biasing

0.1

10-3

Optimal

Resistive

Load

Parallel SSHI

S.E.

Series

SSHI DC

Series

SSHI DC


V Cp

[V]

0

V1

Generation

Phase

Parallel SSHI with synchronous extractionGeneration (to V2); discharge (to V3), flipping (to V4)

V2

V3

V4

Discharging

Phase

Charge-

Flipping Phase

Fig. 24. Steady-state operating cycle of Parallel SSHI with synchronousextraction circuit.

We define V1 as the voltage on Cp just after charge flippinghas occurred, and V2 as the voltage after generation has takenplace, as shown in Fig. 24, with V2 = V1 + 2Vpo. We now letαe be the control parameter representing the proportion of thevoltage on the capacitor Cp left after extraction through Se(taking values between 0 and 1), and V3 is the voltage on Cpafter the discharge takes place, such that V3 = αeV2. Let αfbe the proportion of the voltage magnitude left after the chargeflipping takes place, so the magnitude of the voltage after theflipping V4 = −αfV3. In steady-state operation V4 = −V1.Solving these expressions at V1 = −V4 we find that the steady-state condition of V1 is:

V1ss = 2Vpoαeαf

1− αeαf(43)

A. Charge-flipping stage

The circuit has two Q factors: Qf (of the flipping circuit)and Qe (of the extraction circuit). The value of αf in (43)is based only on the Q factor of the inductor of the flippingpath Qf , such that αf = e

− π2Qf = γ. The damped resonantfrequency of this path is:

ωnf =

√1

L1Cp− Rs1

2

4L12 (44)

Therefore Sf should be closed for a time π/ωnf .

B. Optimal discharging voltage ratio αeThe proportion of voltage left after discharging (αe) is a

control parameter, set by the discharge switch opening whenthe capacitor Cp voltage (starting from V2) has fallen to thatproportion of its initial value (i.e V3). When this happens therewill be a current in the inductor, which will free-wheel intothe output power supply Vout. To find the optimal amount ofenergy to extract each cycle we can ignore the efficiency ofthe output stage since the energy extracted is not affected.The change in energy per half cycle on the capacitor duringdischarging is:

E 12

=1

2CpV2

2 − 12CpV3

2 = (1− αe2)1

2CpV2

2 (45)

Substituting V2 for its steady-state value found from (43), anddifferentiating with respect to αe we find that this expressionis maximised when αe = αf .

C. Free-wheel energy recovery

The differential equation describing the voltages along thefree-wheel loop is:

Ldi(t)

dt+Rsi(t) + VD + Vout = 0 (46)

Solving this we find an expression for the inductor currentwith respect to time i(t):

i(t) =

(i(0) +

VD + VoutRs

)e−

RsL t − VD + Vout

Rs(47)

The energy transferred to the power supply while the currentis positive (it cannot go negative) is given by the integral:

Efw = Vout

t|i=0∫0

ifw(t)dt =L2Vout

Rs2 ifwoRs

+LVout

Rs2 (Vout + VD) ln

(Vout + VD

ifwoRs + Vout + VD

)(48)

Where ifwo is the current at the start of free-wheeling.

D. Maximising power output

The energy from the capacitor Cp into the power supplyduring the discharge conduction (non-free-wheeling) stage is:

Eout = Vout

tSe∫0

idischargedt = 2Vpo(1− αe)CpVout

1− αeαf(49)


Substituting αe = αf for maximum power extraction, andreplacing V2 with the steady-state value from (43), this givesa power output of:

Pout = IoVout

(2

π

)αf − 1αf 2 − 1

+ω

2πEfw (50)

The final voltage on the piezoelectric capacitance after dis-charging is:

Vfinal = (Vout + 2VD)− γ (V2 − (Vout + 2VD)) (51)

The power output of this circuit is maximised when Vout isset to a value such that Vfinal = αeV2 without free-wheelingoccurring, i.e the switch Se is closed for exactly one half cycle.Substituting V2 for the steady-state value found using (43), andsolving for Vout gives:

Voutopt = 4Vpoγ

(1− γ2)(1 + γ)− 2VD (52)

Substituting this into (49) gives a maximum power output of:

Pmax =8

π

γ

(1 + γ)2(1− γ2)

(Io

2

ωCp

)− 4π

VDIo1 + γ

(53)

Using the expansion γ ≈ 1− π/2Q this expression simplifiesto:

Pmax ≈[1− πVD

QVpo

]2Q

π2

(Io

2

ωCp

)(54)

i.e the same as for the previous circuit.

XV. PRE-BIASING

The pre-biasing circuit (Fig. 25), first proposed in [30], isa generalisation of a number of the techniques analysed sofar, where the setting of the piezoelectric voltage and energyextraction occur as two independent phases. Previously thecircuit was analysed as a function of the overall efficiencythat could be achieved in charging and discharging the piezo-electric capacitance. Here a detailed analysis is performed forthe first time in terms of the component values and hence Qfactor.

CpIo

CpIo


Io

Io

CpIo S0

S1 S2

Io Cp

Io

L

Rs

CpIo Co

Iin Iout

VoutVCp

RL

RLRL

CoCp

Cp

Cp

L

RS

2mY

i1m

1k

V2V1

i2Dp

1 : n

Cp+–

2mY

i1m

1kDp

+–

Dp

k

mz(t)

m

Zl

y(t)

x(t)

VD

D1

D3

D2

D4

Co

RsL

Io CpVout

D

S0

Vout

CpIo

L

RL

RS


CpIoL

RS

D1

D3

D2

D4

CoVout

Cp Co

RS1

Io L1

L2RS2

Vout

SfSe

D5

Cp

D1LRsVout

D2

RL

DeVcc

Io

Cp

DE

DADB

S1 S2

S3 S4

S5

DCDD

Vout2mY

m1kDp

Cp

+– RL

i1/ni1

S1 S2

Vout Vout

Vout Vout

VCp(t)

S6Vout

D1 D2

Fig. 25. Pre-biasing circuit diagram, showing optional circuit componentsfor non-optimal output voltage operation in grey.

The circuit is comprised of a modified H-bridge, whichallows charging of the piezoelectric capacitance in eitherdirection, and a synchronous buck output stage, which allows

the extraction of an arbitrary amount of energy from Cp. Free-wheeling paths exist to return energy to the power supply foroperating modes where the switches must open when there iscurrent in inductors. The voltage on the piezoelectric capaci-tance during operation is shown in Fig. 26. The exact voltageplaced on the piezoelectric capacitance can be controlled, ascan the exact amount of energy removed each cycle by thedischarge circuit.


Cp V

olta

ge [V

]0

0In

put C

urre

nt [A

]

Vout


V Cp

[V]

0


Discharging Phase


V out

[V]

0

V1


V Cp

[V]

0


Phase

-VD

VD


V Cp

[V] 0

V2

Generation Phase


V3


V Cp

[V]

0

V1+2Vpo

V2

Generation Phase

V1



P/P m

ax

Vopt

Pps+Pfw(Pout)

Pfw

Pps



Parallel SSHI S.E.

Series SSHI DC

Parallel SSHI DC

25

20

15

10

5

00 1 2 3 4 5 6 7 8 9 10


Pow

er g

ain

over

Rec

t. D

.C. [

P max

/PRE

CTD

C]

Sync. Ex. DC

Generation Phase


-Vpo

V2

V3

1


V Cp

[V]

0

VPB+2Vpo

Generation phase

VPB

Discharging phase

Pre-biasing phase

Fig. 26. Voltage waveform on the piezoelectric capacitance for the circuitof Fig. 25.

There are two possible modes of operation for this circuit:

1) Optimal voltage control - the power supply (Vcc) andoutput (Vout) voltages are set according to the optimaloperating condition - i.e energy transfer occurs withoutfree-wheeling occurring. Therefore the diodes D[A−E]are not used to conduct free-wheeling currents, althoughcan be retained to deal with any free-wheeling currentthat results from timing inaccuracy. Pre-bias voltages canbe in the range ≈ 0− 2Vcc.

2) Custom output voltage - a non-optimal regime thatallows an arbitrary output voltage to be set by allowingenergy transfer through free-wheeling paths. DiodesD[A−E] are therefore required to conduct free-wheelingcurrents. Pre-bias voltage is limited to Vcc because ofthe clamping of DB and DC .

For consistency with the analysis of the previous circuits wewill only consider a the optimal operating regime, i.e thatwhich we term optimal voltage control.

The circuit operates in three phases. First the pre-bias isapplied by closing either S1 and S4, or S2 and S3 untilV (Cp) = VPB . Then the switches are opened and thepiezoelectric capacitance floats, gaining more charge from thecurrent source Io, when motion occurs, until it is at a voltageVPB +2Vpo. Then the entire charge is removed by the closingof S5 and S3 or S6 and S4, after which V (Cp) = 0. Theprocess then repeats in the negative half-cycle.

A. Discharging phase

Using the previous notation, the voltage on Cp after discharg-ing is:

V2 = Vout − γ(VPB + 2Vpo − Vout) (55)


As previously discussed, this final voltage must be zero, withno free-wheeling occurring, and so we set Vout to:

Vopt =(VPB + 2Vpo)γ

1 + γ(56)

By substituting (56) into the power delivered to the powersupply, which is derived from from (17) as VoutCp(VPB +2Vpo), the energy into the output per half cycle is:

E 12

= Cp(VPB + 2Vpo)2 γ

1 + γ(57)

So the discharge efficiency ηd can be written as:

ηd = 2γ

(1 + γ)(58)

B. Charging phase

If the piezoelectric capacitance starts at 0 V (having beenperfectly discharged) then the pre-bias voltage after half aresonant cycle (lasting π/ωn) is:

VPB = (Vcc − VD)(γ + 1) (59)

Since VPB is a control parameter, the required Vcc to achievea given VPB is:

Vcc =VPBγ + 1

+ VD (60)

The energy expended by a power supply at Vcc charging acapacitor to a voltage of VPB in a half resonant cycle is:

Eps = VccVPBCp = VPBCp

(VPBγ + 1

+ VD

)(61)

Therefore we can write the charge efficiency ηc as:

ηc =12CpVPB

2

Eps≈ 1

1 + π4Q +2VDVPB

(62)

From (61) and (57), the per-cycle energy output is:

E 12

= Cp(VPB + 2Vpo)2 γ

1 + γ− CpVPB

(VPBγ + 1

+ VD

)(63)

From this expression we find the optimal pre-bias voltage tobe:

VPBopt =2γVpo − 12VD(1 + γ)

1− γ(64)

Therefore the maximum power output from this circuit is:

Pmax =ωCpπ

[γ

1− γ24Vpo

2

(1− 1 + γ

2

VDVpo

)− VD

2

4

1 + γ

1− γ

](65)

If VD is set to 0 this becomes:

Pmax|VD=0 =4

π

γ

1− γ2

(Io

2

ωCp

)≈ 4Qπ2

(1− π

4Q

)(Io

2

ωCp

)(66)

Compared to the optimal resistive load this is a significantgain of:

PPBPORL

=16

π

γ

1− γ2≈ 16Q

π2

(1− π

4Q

)(67)

This increased power output is offset by the considerable com-plexity of the circuit due to the high number of componentsrequired.

XVI. SINGLE-SUPPLY PRE-BIASING

For a given Q factor the previously analysed pre-biasingcircuit exhibits the highest power output of those presentedso far. However, the circuit requires three inductors and sixswitches, making a high Q factor harder to realise in thatcircuit than one with fewer inductors. We therefore nowanalyse an embodiment of the pre-biasing method presented in[31], called single-supply pre-biasing (Fig. 27), which reducesthe component count to four switches and one inductor. In ad-dition, the existence of diode drops in the previously proposedcircuits causes a reduction in efficiency when the generatedvoltage on the piezoelectric element is low. These diodesare either for rectification or to provide freewheeling paths.Whilst in theory the switches in any of the previously analysedcircuits could be implemented using synchronous rectifiers,the single-supply pre-biasing circuit is particularly suitable forsynchronous rectification due to the low component count, andthe fact that the switches are always operated in synchronouspairs.

The circuit performs the same function as that presented in[32] except that it is implemented in a more efficient way,using a single voltage source, and requiring no diodes. Thecircuit of [33] is functionally similar, except that like the SSHIcircuits all the energy is flipped through the output stage, andthe circuit uses diodes instead of switches in the conductionpaths, increasing the loss.

This circuit has a single voltage source from which thepre-charge is taken and into which the generated energy isreturned. There exists a value of this voltage source that elim-inates free-wheeling currents entirely for both pre-chargingand extraction, whilst allowing the piezoelectric capacitanceto return to 0 V at the end of each half-cycle.

Pow

er [m

W]

Diode-Free Pre-Biasing

Pre-Biasing

Parallel SSHI DC

Optimal Resistive

Load

Charge Voltage V [V]

103

102

101

100

10-1

10-2

10-3

10-41 10 100

IoCp L

Pow

er [m

W]


103

102

101

100

10-1

10-2

10-3

10-41 10 100

SimulationModel Prediction

0.1

CoVout

Pow

er [m

W]


4

3

2

1

010 2 3 7654 8 9

Pre-BiasingDiode-Free Pre-Biasing

Vcc

Io

Cp

S1 S2

S4LRs

S3

-

+

+

-

Fig. 27. Single-supply pre-biasing.

The basic principle of operation for a half cycle of motionof the piezoelectric beam is as follows: S1 and S4 are closedfor exactly one half period of the resonant cycle of the inductorL and the piezoelectric capacitance Cp, allowing the voltageon Cp to rise. The proof mass then moves, thus increasingthe voltage in the same polarity. At the voltage maximum,the same switch pair is then closed again to discharge thepiezoelectric to 0 V. The other pair of switches (S2 and S3)is used for the other half cycle.

The operational cycle is similar to the the pre-biasing circuitof Fig. 26 in terms of the effect on the piezoelectric element,except that the same current path is used in charging anddischarging with the advantage that fewer components are


required. Since there are no free-wheel paths, the switchesmust open only when the current in the inductor is zero, aftera time π/ωn. The voltage after charging, VPB , is given as afunction of the loss coefficient γ and the power supply voltage:

VPB = Vcc(γ + 1) (68)

The voltage remaining after discharging, Vrem, is given by:

Vrem = Vcc − (VPB + 2Vpo − Vcc)γ (69)

The principle of operation of the circuit for maximum effi-ciency is that for a given harvester amplitude Vpo, there existsa value of Vcc such that the voltage on Cp after discharging isexactly 0 and the switches therefore open under zero current,with no freewheeling path in operation. Solving Vrem = 0 forVcc:

Vcc = 2Vpoγ

1− γ2(70)

From this, in charging Cp an energy CpVcc2(γ+1) is borrowedfrom the power supply, and in discharging VccCp(Vcc(γ+1)+2Vpo) is returned. The power from the circuit is thereforethe difference between these, multiplied by 2f , with Vccsubstituted with the value found in (70):

Pout = 4fCpVpo2 γ

1− γ2=

4

π

γ

1− γ2

(Io

2

ωCp

)≈ 4Qπ2

(Io

2

ωCp

)(71)

This circuit therefore has the same limiting power output asthe pre-biasing circuit, but it can be seen that whereas the pre-biasing circuit cannot produce net power below 2Vpo = VD,the single-supply circuit both operates and produces morepower over the entire range, with the two expressions con-verging at sufficiently high values of Vpo. Figure 28 showsthe performance of the proposed circuit compared to the pre-biasing circuit over a low-voltage operating range.P

ower

[mW

]

Diode-Free Pre-Biasing

Pre-Biasing

Parallel SSHI DC

Optimal Resistive

Load


103

102

101

100

10-1

10-2

10-3

10-41 10 100

IoCp L

Pow

er [m

W]


103

102

101

100

10-1

10-2

10-3

10-41 10 100

SimulationModel Prediction

0.1

CoVout

Pow

er [m

W]

Open-circuit piezoelectric voltage Vpo [V]

4

3

2

1

010 2 3 7654 8 9

Pre-BiasingSingle-Supply Pre-Biasing

Vcc

Io

Cp

S1 S2

S4LRs

S3

-

+

+

-

Fig. 28. Comparison between the pre-biasing techniques in terms of outputpower for Cp=100 nF, L=100 µH, VD=0.7 V, f=100 Hz, Q=10.

A. Experimental Results

In order to validate the theoretical results, the circuit was con-structed on breadboard and connected to a Kingsgate KPSG-100 piezoelectric loudspeaker. The piezoelectric voltage andcurrent waveforms are shown in Fig. 29. The top part showsthe piezoelectric waveform for just over one cycle, and the

bottom part shows a detailed view of the piezoelectric currentand voltage for one discharge/charge cycle.

0 1 2 3 4 5x 10−3

−20

−10

0

10

20

Time [s]

Piez

oele

ctric

Vol

tage

[V]

2.4 2.45 2.5 2.55 2.6x 10−3

−20

−10

0

10

20

Piez

oele

ctric

Vol

tage

[V]

Time [s]

2.4 2.45 2.5 2.55 2.6x 10−3

−0.03

0

0.03

0.06

Indu

ctor

Cur

rent

[A]

Piezoelectric VoltageInductor Current

Fig. 29. Experimentally measured waveforms showing piezoelectric voltageover 2 cycles (top), and an expanded view of this voltage and of the inductorcurrent during a transition (bottom).

As can be seen, the resonant discharge pulse causes thepiezoelectric voltage to return to zero. Once this has occurred,the charging pulse then pre-biases the piezo ready for the nexthalf-cycle of motion. The discharge pulse has a greater currentmagnitude than the charge pulse due to the mechanical toelectrical energy conversion process.

The power output predicted by (71), given the measuredcomponent values (Cp=48.4 nF, L=7.486 mH, total Rs=317 Ω,ω=1998 rads/sec), is 10.33 mW. The actual net power as mea-sured by a Yokogawa WT210 power analyser was 10.1 mW,a deviation of about 2.3%. The small error is attributed todifficulty in measuring the exact series resistance of the piezo-electric element, and un-accounted-for parasitic capacitance ofthe inductor.

XVII. COMPARISONS

In the previous sections, closed-form solutions for theoptimised power output of each proposed circuit topology havebeen derived in terms of a common factor that now enablesclear comparison between the circuits. Table II shows therelative performance of the circuits that operate into a resistiveload, normalised to the simple optimal resistive load case ofFig. 5. Table III compares the circuits with a DC load againstthe O.R.L. and bridge rectifier, assuming a zero on-state devicevoltage drop. For convenience we define:

Pref =

(Io

2

ωCp

)(72)

The comparison was performed in terms of an inductor Qfactor independent of the volume of the device. The Se-ries SSHI technique is clearly superior in this comparison,out-performing the O.R.L. by a factor of 16.24 for Q = 10.Figure 30 shows the power gain over the rectified DC loadcircuit of Fig. 6 if the diode on-state voltage drops areneglected, and the inductor Q factor is equal to 10. From this itis clear that there are two distinct classes of circuit, those that


TABLE IISUMMARY OF POWER OUTPUT OF CIRCUITS WITH RESISTIVE LOAD.

Circuit PmaxPref

PmaxPorl

@Q = 10, VD = 0

ORL 1/4 1Sync Extraction 2/π 2.55

P SSHI R.L. 1π(1/γ−1) 7.5

S SSHI R.L. 1π

1+γ1−γ 16.24

TABLE IIISUMMARY OF NON-VOLUME-CONSTRAINED POWER OUTPUT FOR

CIRCUITS WITH DC LOAD FOR VD = 0.

Circuit PmaxPref

PmaxPORL

Pmax

PRECTDCRectified DC Load 1/2π 2/π ≈ 0.64 1

S.S.E. DC 4π

γ1+γ

2.34 4Fixed-V Control 1/2π 2/π ≈ 0.64 1

Fixed-V Control CC 1/π 4/π ≈ 1.27 2Parallel SSHI DC 1

π(1−γ) 8.76 4Q/π

Series SSHI DC 12π

1+γ1−γ 8.12 4Q/π

Parallel SSHI S.E. 8π

γ(1−γ)(1+γ)3 9.39 4Q/π

Pre-Biasing 4π

γ1−γ2 16.14 8Q/π

S-S Pre-Biasing 4π

γ1−γ2 16.14 8Q/π

do not depend on Q, and those that have a linear dependence.The first class have a constant power output that dependsonly on the excitation condition Io2/ωCp. The second class ofcircuits has a linear dependence on Q, and for these the powergain over a simple bridge rectifier tends to 4Q/π for moderatevalues of Q (around 10 or more). The pre-biasing circuits toohave a linear dependence, and have a higher power gain overthe rectifier of 8Q/π. When the piezoelectric fixed voltagecontrol circuit (which performed worse than the O.R.L.) wasfitted with a charge-cancelling switch that operated beforethe main charging path, the power output was doubled. Thissimilarly is the cause of the increased power output of thepre-biasing circuit, which can achieve the same bias voltageas the SSHI with synchronous extraction but only half theenergy has to travel through the inductive paths as the entirecharge is never flipped. A further comparison for those circuits


C p V

olta

ge [V

]0

0In

put C

urre

nt [A

]

Vout


Vol

tage

[V]

0


Discharging Phase


Vol

tage

[V]

0

VPB

VPB+ VCp


V out

[V]

0

V1


Vol

tage

[V]

0


Phase

-VD

VD


Vol

tage

[V]

0

V2

Generation Phase


V3


V Cp

(arb

itrar

y un

its)

0

V1+2Vpo

V2

Generation Phase

V1



P/P m

ax

Vopt

Pps+Pfw(Pout)

Pfw

Pps



Parallel SSHI S.E.

Series SSHI DC

Parallel SSHI DC

25

20

15

10

5

00 1 2 3 4 5 6 7 8 9 10


Pow

er g

ain

over

Rec

t. D

.C. [

P max

/PR

ECTD

C]

Sync. Ex. DC

Generation Phase


Generation Phase

Discharge Phase

Pre-Bias (Charging)

Phase

-Vpo

V2

V3

Fig. 30. Comparison of circuit power output against Q for VD = 0.

with a DC output can be performed in terms of the voltagethat must be supported if the circuit is operated at its optimalvoltage so that free-wheeling currents do not occur. Table IVshows these voltages as a function of the excitation voltageVpo for each circuit, sorted in order of maximum value of any

of the voltages the circuit is required to support. In the case oflow input excitation, a low output voltage (particularly wherethis is less than 1 V) may mean that the harvester requiresfurther DC/DC power converter stages before a load can beconnected.

TABLE IVSUMMARY OF NON-VOLUME-CONSTRAINED OPTIMAL POWER SUPPLY

VOLTAGES FOR Q=10, VD=0.5.

Circuit Voltage normalised to VpoRectified DC Load Vout = 0.48

Series SSHI DC Vout = 0.5S.S.E. DC Vout = 0.9

Single-Supply Pre-Biasing Vcc = 6.3Parallel SSHI S.E. V1ss = 5.4, Vout = 6.8Parallel SSHI DC Vout = 6.9

Pre-Biasing VPB = 11.8, Vout = 81, Vcc = 6.4

In order to perform a fair comparison between the circuitswith a fixed volume, the Q factor of the inductor must bereduced by a factor of 3 in the pre-biasing circuit, as it has 3inductors which must share the fixed volume. Figure 31 showsa comparison of the power output against the piezoelectricopen-circuit voltage Vpo for the devices with a DC output(plus the optimal resistive load for reference). It can be seenthat of these the single-supply pre-biasing circuit of Fig. 27performs best over the entire range.

Pre-Biasing

Series

SSHI DC

Po

wer

[mW

]


Parallel SSHI DC

Optimal

Resistive

Load


104

10-3

10-1

10-2

10-1

10-0

0.01 1 10

Rectified

DC LoadPre-Biasing

0.1

Po

wer

[mW

]


Parallel SSHI DC

Optimal

Resistive Load


103

10-2

10-2

10-1

100

10-1

0.01 1 10

Rectified

DC Load

Parallel SSHI S.E.

0.1

10-3

10-4

10-5

Po

wer

[mW

]


Parallel SSHI DC


10-2

10-2

10-1

100

10-1

0.01 1 10

Rectified

DC Load

Parallel SSHI S.E.

Pre-

Biasing

0.1

10-3

Optimal

Resistive

Load

Parallel SSHI

S.E.

Series

SSHI DC

Series

SSHI DC

Fig. 31. Comparison of circuits with DC output for harvester config. 1.

It should be noted that the better performing circuits at lowvalues of Vpo all require overhead power for the associatedcontrol circuitry, which means their gross output power mustbe greater than the minimum required for this function. Ifthe control can be achieved within 1 µW, then taking asan example the SSPB circuit operating at 100 Hz, with aninductor Q of 10 and a Cpo of 100 nF, the total power canonly exceed 1 µW for Vpo above about 0.16 V.

XVIII. CONCLUSION

In this paper, all the principal circuit choices for interfacingto piezoelectric energy harvesters have been analysed andcompared in a unified analytical framework. The circuitshave different levels of functionality, in that some are onlyable to dissipate energy in a resistive load and some areable to store the generated energy in a battery or capacitorand are hence significantly more useful in the majority of


applications. Under many realistic operating conditions forenergy harvesting devices, the damping force achievable fromthe piezoelectric element due to extraction of electrical energyis below that required for the harvester to operate at maxi-mum power density, and in such cases, the challenge froma power processing perspective is to extract the maximumpower possible from a current source with a shunt capacitancewhich is inherent in the piezoelectric element. The circuitsanalysed in this paper which can extract more energy fromthe piezoelectric than can be extracted using a simple bridgerectifier do so because they actively modify the voltage onthe piezoelectric capacitance, meaning the charge from thecurrent source is forced into a higher voltage, correspondingto increased work being done and correspondingly, an increasein the electrical damping and output power.

Accurate expressions for the power output of each circuitwere obtained which include non-idealities in the components,particularly diode on-state voltage drops and series resistancein inductors. It was shown that, if diode drops are neglected,the output power from each circuit can be normalised toIo

2/ωCp, which allows the performance of each circuit to becompared purely as a function of the Q factor of any pathscontaining an inductor. The circuits that flip the polarity of thecharge on the piezoelectric element at the extremities of devicemotion, termed SSH, behave with approximately the sameperformance - the power gain over a simple passive bridgerectifier arrangement tends to 4Q/π for moderate values of Q(around 10 or more).

A circuit technique termed pre-biasing separately pre-charges and discharges the piezoelectric capacitance and hasa power gain over the simple bridge rectifier case of 8Q/π.While the pre-biasing and single-supply pre-biasing variantshave the same theoretical power, the single-supply pre-biasingcircuit requires 2 fewer switches and 2 fewer inductors(Fig. 27). In theory any of the diodes in these circuits couldbe implemented with synchronous, bi-directionally blockingswitches, although as seen in Table III, the pre-biasing circuitretains advantages in terms of higher performance and lowercomplexity.

XIX. ACKNOWLEDGEMENTS

This work was supported in part by the Engineering andPhysical Sciences Research Council (EPSRC) under grantnumber EP/G070180/1, “Next Generation Energy-HarvestingElectronics: Holistic Approach” (website: www.holistic.ecs.soton.ac.uk) and by EPSRC project EP/E003192/1, “Deliv-ering sustainable water systems by optimising existing infras-tructure via improved knowledge, understanding and technol-ogy - project NEPTUNE”. The authors would like to thankAlwyn Elliott for his helpful contribution to the experimentalresults.

REFERENCES

[1] S. P. Beeby, R. N. Torah, M. J. Tudor, P. Glynne-Jones, T. O’Donnell,C. R. Saha, and S. Roy, “A micro electromagnetic generator for vibrationenergy harvesting,” Journal of Micromechanics and Microengineering,vol. 17, no. 7, p. 1257, 2007.

[2] H. A. Sodano, D. J. Inman, and G. Park, “A review of power harvestingfrom vibration using piezoelectric materials,” The Shock and VibrationDigest, vol. 36, no. 3, pp. 197–205, 2004.

[3] P. D. Mitcheson, T. Sterken, C. He, M. Kiziroglou, E. M. Yeatman, andR. Puers, “Electrostatic microgenerators,” Measurement and Control UK,vol. 41, no. 4, pp. 114–119, 2008.

[4] Y. Suzuki, D. Miki, M. Edamoto, and M. Honzumi, “A mems elec-tret generator with electrostatic levitation for vibration-driven energy-harvesting applications,” Journal of Micromechanics and Microengineer-ing, vol. 20, no. 10, p. 104002, 2010.

[5] T. Sterken, P. Fiorini, K. Baert, G. Borghs, and R. Puers, “Novel designand fabrication of a mems electrostatic vibration scavenger,” The 4thInt. Workshop on Micro and Nanotechnology for Power Generation andEnergy Conversion Applications, 2004.

[6] E. S. Leland and P. K. Wright, “Resonance tuning of piezoelectric vi-bration energy scavenging generators using compressive axial preload,”Smart Materials and Structures, vol. 15, no. 5, p. 1413, 2006.

[7] L. Blystad and E. Halvorsen, “A piezoelectric energy harvester with amechanical end stop on one side,” Design Test Integration and Packagingof MEMS/MOEMS (DTIP), 2010 Symposium on, vol. 17, no. 4, pp. 505–511, Apr 2011.

[8] P. D. Mitcheson, T. C. Green, E. M. Yeatman, and A. S. Holmes,“Architectures for vibration-driven micropower generators,” Microelec-tromechanical Systems, Journal of, vol. 13, no. 3, pp. 429–440, 2004.

[9] M. Al Ahmad and H. N. Alshareef, “Modeling the power output ofpiezoelectric energy harvesters,” Journal of Electronic Materials, vol. 40,no. 7, pp. 1477–1484, Jul 2011.

[10] J. Liang and W. Liao, “Energy flow in piezoelectric energy harvestingsystems,” Smart Materials & Structures, vol. 20, no. 1, Jan 2011.

[11] G. Szarka, B. Stark, and S. Burrow, “Review of power conditioning forkinetic energy harvesting systems,” Power Electronics, IEEE Transac-tions on, vol. PP, no. 99, p. 1, 2011.

[12] P. D. Mitcheson and T. T. Toh, Energy Harvesting for AutonomousSystems. Artech House Puiblishing, 2010, ch. Power ManagementElectronics, pp. 159–209.

[13] S. D. Senturia, Microsystem Design, 2nd ed. Springer Science+BusinessMedia, 2001.

[14] R. D’hulst, T. Sterken, R. Puers, G. Deconinck, and J. Driesen, “Powerprocessing circuits for piezoelectric vibration-based energy harvesters,”Industrial Electronics, IEEE Transactions on, vol. 57, no. 12, pp. 4170–4177, Dec 2010.

[15] G. Ottman, H. Hofmann, A. Bhatt, and G. Lesieutre, “Adaptive piezo-electric energy harvesting circuit for wireless remote power supply,”Power Electronics, IEEE Transactions on, vol. 17, no. 5, pp. 669 – 676,Sep 2002.

[16] N. S. Shenck, “A demonstration of useful electric energy generationfrom piezoceramics in a shoe,” 1999.

[17] E. Lefeuvre, A. Badel, C. Richard, and D. Guyomar, “Piezoelectricenergy harvesting device optimization by synchronous electric chargeextraction,” Journal of Intelligent Material Systems and Structures,vol. 16, no. 10, pp. 865–876, 2005.

[18] E. Lefeuvre, A. Badel, L. Petit, C. Richard, and D. Guyomar, “Semi-passive piezoelectric structural damping by synchronized switching onvoltage sources,” Journal of Intelligent Material Systems and Structures,vol. 17, no. 8-9, pp. 653–660, 2006.

[19] D. Guyomar, C. Magnet, E. Lefeuvre, and C. Richard, “Nonlinearprocessing of the output voltage of a piezoelectric transformer,” IEEETransactions on Ultrasonics, Ferroelectrics and Frequency Control,vol. 53, no. 7, pp. 1362–1375, 2006.

[20] N. Krihely and S. Ben-Yaakov, “Self-contained resonant rectifier forpiezoelectric sources under variable mechanical excitation,” Power Elec-tronics, IEEE Transactions on, vol. 26, no. 2, pp. 612 –621, Feb 2011.

[21] Y. C. Shu, I. C. Lien, and W. J. Wu, “An improved analysis ofthe sshi interface in piezoelectric energy harvesting,” Smart Materialsand Structures, vol. 16, no. 6, p. 2253, 2007. [Online]. Available:http://stacks.iop.org/0964-1726/16/i=6/a=028

[22] D. Guyomar, A. Badel, E. Lefeuvre, and C. Richard, “Toward energyharvesting using active materials and conversion improvement by non-linear processing,” Ultrasonics, Ferroelectrics and Frequency

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