IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007 871

Mixed Mode Excitation and Low CostControl IC for Electronic Ballast

Hee-Seok Han, Student Member, IEEE, Tae-Ha Ryu, and Gyu-Hyeong Cho, Member, IEEE

Abstract—This paper introduces a gate-driven mixed modeexcitation that is applicable to dimmable electronic ballasts. Theproposed approach combines the characteristics of self-oscillatingmode and external excitation. In the mixed mode excitation, themetal oxide semiconductor field effect transistors in an electronicballast are turned on by the resonant current and turned off by thegate driver, which is triggered by a low voltage control integratedcircuit (IC). By adjusting this triggering point, the low voltagecontrol IC controls the switching frequency of the electronic bal-last. In the electronic ballast with mixed mode excitation, filamentpreheating, dimming, and protection are all implemented by thelow voltage control IC, which is fabricated in a 3.3-V standardCMOS process. The proposed approach allows for the realizationof a low cost and high performance electronic ballast.

Index Terms—Dimmable electronic ballast, fluorescent lamp,gate driver, low voltage control integrated circuit (IC), mixedmode excitation.

I. INTRODUCTION

CURRENTLY, electronic ballasts for fluorescent lampsare widely used because electronic ballasts have some

advantages like high efficiency, light weight, and absenceof flicker and audible noise as compared to electromagneticballasts [1]. Among the various electronic ballasts drivingfluorescent lamps, self-oscillating electronic ballast is one ofthe simplest and most cost effective [2]. With the growingneed for the dimming capability in electronic ballasts so asto reduce electric energy consumption, research on self-oscil-lating electronic ballasts with dimming capability has recentlybeen reported in the literature [1]–[3]. In [1], the magnetizingcurrent is changed by adjusting the voltage across the currenttransformer in conventional self-oscillating electronic ballastto adjust the switching frequency. In [2], a parallel currentpath formed by elegant passive elements is added across thegate driver for adjusting the switching frequency [3]. In [3],the saturable transformers are used for each gate driver andthe operating point of the saturable transformer is changed byadjusting dc current flowing through the saturable transformers

Manuscript received February 6, 2006; revised April 26, 2006. This paperwas presented in part at the Power Electronics Specialists Conference, Aachen,Germany, June 20, 2004. Recommended for publication by Associate Editor R.Hui.

The authors are with the Department of Electrical Engineering and ComputerScience, Korea Advanced Institute of Science and Technology (KAIST), Dae-jeon 305-701, Korea (e-mail: stonehan@eeinfo.kaist.ac.kr; thryoo@dmbtech.com; ghcho@ee.kaist.ac.kr).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2007.896515

to adjust the switching frequency. These approaches for imple-menting dimmable self-oscillating electronic ballast are basedon integrated circuit (IC)-less electronic ballast. However, theattributes demanded in a dimmable electronic ballast includewide dimming range, soft-start, a simple user-interface fordimming, lamp brightness regulation against the line voltagevariation, and protective functions such as end-of-life detec-tion and over-current detection. The need for these functionsnecessitates the use of an IC.

The high voltage integrated circuit (HVIC), which is capableof operating from a nearly 600-V bus, is the representative ex-ample to implement external excitation. A dimmable electronicballast with the aforementioned functions could be implementedthrough the use of the HVIC [4]. However the HVIC typicallycosts more than the gate coupling transformers it was designedto replace and much of the die area is taken up by the highvoltage interface [5]. Hence, silicon-integrated ballast solutionsare not widely used for the largest market segment of electronicballasts, i.e., the low cost fluorescent lamp market sector [6].

A low voltage integrated circuit (LVIC) that is fabricated instandard CMOS process is a potential alternative solution for alow cost integrated circuit instead of the HVIC. Many manufac-turers offer the foundry service of the standard CMOS processsuch as the 3.3-V 0.35- m CMOS process and the high integra-tion density of the CMOS process enables implementation ofthe many demanded functions for the electronic ballast using asmall die area. However, there should be a scheme to solve thehigh voltage interface problem because the LVIC alone cannotdrive the gates of metal oxide semiconductor field effect tran-sistors (MOSFETs) in the electronic ballast by itself due to itslow operating voltage.

This paper proposes a new gate driving method termed mixedmode excitation that solves the high voltage interface problemwhen a LVIC is used as the control IC for the electronic bal-last. For an application example of the LVIC, we implementa control IC that performs filament preheating, dimming, andover-current protection in a 3.3-V 0.35- m CMOS process. Theoperations of the electronic ballast with mixed mode excitationand the designed LVIC are tested and verified through experi-ments. In addition, pulse frequency modulation to improve thecrest factor in an electronic ballast with passive power factorcorrection (PFC) circuits is implemented using this LVIC.

II. MIXED MODE EXCITED ELECTRONIC BALLAST

The schematic of a typical self-oscillating electronic ballastfor fluorescent lamps and its operating waveforms are shown inFig. 1. In this scheme, the resonant current flowing through theinductor is fed back into the gates via a current transformerand converted into a voltage suitable for driving the MOSFETs

0885-8993/$25.00 © 2007 IEEE

872 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007

Fig. 1. (a) Self-oscillating electronic ballast. (b) Operating waveforms.

into saturation. The zener diodes not only clamp the gate voltageto ensure that the gates are not over-stressed, but also, togetherwith the magnetizing inductance of the current transformer, pro-vide the required phase shift to maintain the oscillation. Fig. 1(b)shows the relationship between the zener current , the reso-nant current , the voltage of the mid-point and the mag-netizing current .

Fig. 2(a) shows the schematic of a mixed mode excitedelectronic ballast for fluorescent lamps. It is modified fromthe self-oscillating electronic ballast shown Fig. 1 as has anadditional secondary winding ( ) to the current transformerand extra gate drivers corresponding to the secondary wind-ings . In the mixed mode excitation, the schemedriving the gates of MOSFETs is divided into two modes. Atthe instant of turning on the MOSFETs, the resonant currentis fed back to the gate via a current transformer, D1 (or D2)and R1 (or R5), similar to a self-oscillating electronic ballast.However, at the instant of turning off the MOSFETs, the gatedriver, which is composed of low power active components,Q1(or Q3) and Q2(or Q4), and low power passive componentsR2(or R6), R3(or R7), and R4(or R8), discharges the chargeof the corresponding gate capacitance and sinks the currentsourced by the current transformer. The LVIC triggers thegate drivers to start turning off the MOSFETs by momentarilyshortening the secondary winding ( ). By adjusting thistriggering point, the LVIC changes the switching frequencyof the electronic ballast. In Fig. 2(b), the triggering point is

. The gate driver sinks the differential current between theresonant current and the magnetizing current during thetime between and . If the triggering point is after the timewhen the resonant current meets the magnetizing current

, the switching frequency is the same as the self-oscillatingfrequency. Therefore, the minimum switching frequency of the

Fig. 2. (a) Proposed mixed mode excited electronic ballast. (b) Operatingwaveforms.

mixed mode excited electronic ballast is set to the same valueas that of a self-oscillating electronic ballast.

Fig. 3 shows the mode diagram of the gate driver and theoperating waveforms of the proposed mixed mode excitation.The operation modes of the gate driver are described as follows.

A. MODE1

Before M1 is turned-off, the resonant current is flowedthrough M1. During this time, the differential current betweenthe resonant current and the magnetizing current of thecurrent transformer flows through the secondary windingsand . The current sourced from the flows throughD1, R1, and Z1 and makes the voltage difference over .This voltage also crosses the secondary winding with op-posite polarity and the current sourced from the flowsthrough Z2, R7, and R6. However the magnitude of this currentis the trivial value because the value of R6 and R7 is large.

B. MODE2

If the secondary winding ( ) is shortened ( 0), thegate of M1 is discharged through R2 and R3 and, at this instant,Q1 is triggered by the voltage over R3. The pnpn structure com-posed of Q1 and Q2 becomes fully saturated and sinks the gatecharge of M1 rapidly by positive feedback action. (The emitterof Q1 sinks the gate charge of M1. This emitter current flowsthrough the base of Q2. The collector of Q2 sinks the base cur-rent of Q1 by the amount of the Q2’s amplified base current bya factor of the current gain of Q2. This base current of Q1 isrepeatedly amplified by a factor of the current gain of Q1 andflows through the base of Q2. The emitter current of Q1 increas-ingly grows.) After M1 stops conducting the resonant current

HAN et al.: MIXED MODE EXCITATION AND LOW COST CONTROL IC 873

Fig. 3. (a) Mode diagram of gate driver. (b) Operating waveforms.

[the drain current of M1, , is shown in Fig. 3(b)], the reso-nant current flows through the parasitic capacitors of M1 andM2, and then flows through the body diode of M2.

C. MODE3

If the secondary winding ( ) is opened, and flowagain from the secondary windings and respectively.At this instant, since Q1 and Q2 are fully saturated, flowsthough D1, R1, Q1, and Q2. Hence, M1 remains off-state. M2also remains off-state because flows through Z2, R7, andR6. Until this instant, flows through the body-diode of M2.

D. MODE4

Because the magnetizing current is larger than the res-onant current , changes direction and turns off Q1 andQ2, and flows through Z1, R3, and R2; therefore, M1 remainsoff-state. The gate capacitor of M2 is charged by flowingthrough D2 and R5. If the gate voltage of M2 rises above the

threshold voltage, M2 is turned on. The resonant currentchanges direction and flows through M2 while the body diodeof M2 is turned off at this instant.

In the above operations, this gate driver has three importantfeatures for dimming operation. First, a secondary winding( ) short time of below 1 s is sufficient to trigger thepnpn structure of the gate driver in mode 2, which minimizesthe burden for the driver IC. Secondly, the turn-off switchingloss is reduced quite small during mode 2 owing to the fastswitching operation. Especially in heavy dimming conditionwhere the MOSFETs should be turned off at high current level,the positive feedback operation of the pnpn structure enablesthe gate driver to turn off the MOSFETs quickly regardless ofthe high resonant current. Thirdly, the pnpn structure holds thethe MOSFETs off state in mode 3 during the remaining periodof the positive terminal voltage at the secondary transformer. Inthis way, the mixed-mode electronic ballast has the capabilityof wide dimming range with negligible switching loss. And, theswitching frequency can be varied by adjusting the triggeringpoint .

III. DESIGN PROCEDURE AND EXAMPLE

The design procedure of the mixed mode excited electronicballast can be divided into two stages. In the first stage, we de-sign the self-oscillating electronic ballast, which includes thedesign of the resonant network such as a series-resonant series-parallel-loaded (SRSPL) filter and the design of the magnetizinginductance of the current transformer for determining a self-os-cillating frequency. In the second stage, we select values of thegate-driver components and add another secondary winding tothe current transformer and design the low voltage control IC.The above design procedure is developed in the following foursteps.

Step 1) Design of the resonant network parameters: TheSRSPL filter, also known as an LCC filter, is com-posed of a series-resonant series-loaded filter andan additional capacitor , which is parallel to thelamp in Fig. 2(a). The functions of are to pro-vide sufficiently high voltage across the lamp duringstarting transient, and then a proper filament currentat steady state [7]. In addition to these functions,reduces current harmonics through the lamp and im-proves the crest factor of the lamp current [7]. How-ever, an overly large increases the resonant cur-rent, and reduces the efficiency of the electronic bal-last. As such, optimization of the resonant networkparameters is an important issue in designing theelectronic ballast.Several design methodologies have been proposedto optimize the resonant network parameters of theSRSPL filter. However, the existence of makes itdifficult to optimize these parameters. Recently, animproved design methodology for the determinationof these parameters has been presented in the liter-ature [8]. The detailed procedure to determine theseparameters is omitted here and instead the designedparameters from that study [8] are given as an ex-ample.

874 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007

Step 2) Determination of the magnetizing inductance :In mixed mode excitation, the lowest switchingfrequency is determined by the self-oscillating op-eration, in which there is no triggering by the LVIC.If the lamp power at the lowest switching frequencyis above the rated lamp power, the lamp power isadjusted to be the same as or below the rated lamppower by the trigger operation of the LVIC. Assuch, the self-oscillating frequency can be chosenfreely. For a given self-oscillating frequency and theresonant network, determination of the magnetizinginductance is not straightforward. The concreteanalysis of the self-oscillating electronic ballastspresented in the literature [9] is too intricate to beused to design the magnetizing inductance .On other hand, the simple determination methodoutlined in the literature [1] gives the closed-formof the relation between the magnetizing inductance

and the self-oscillating frequency and the reso-nant network parameters. Even though this simplemethod is not sufficient to guarantee the self-os-cillation, it can give an approximate value of themagnetizing inductance

(1)

where 1 , 1 1 ,1 , VDC 2 V ,

, is the number of turns of the primary side,and is the number of the turns of the secondaryside of the current transformer. whose value is13 V is the summation of the zener voltage (12 V) ofZ1 and the forward voltage drop of D1 and voltagedrop of R1 in Fig. 2(a). For 2 T, 13 T, andthe given parameters in Table I, the estimated valueof is 988 H. After a Pspice simulation of theself-oscillating operation, is tuned to 845 H.

Step 3) Selection of the values of the gate driver compo-nents: The selection of the resistors is essential inthe design of the gate driver. R1 (or R5) prevents thedriving waveform at the gate of the M1 (or M2) fromringing. The main function of R2 (or R6) and R3 (orR7) is to trigger Q1 (or Q3) at the instant of turningoff M1 (or M2). The summation of the values of R2and R3 should be large enough that the forward cur-rent of Z1 is trivial at the instant of turn-on of M2.The value of R4 (or R8) determines the triggeringthreshold level of Q2 (or Q4). These values are se-lected by several experiments and are summarizedin Table II.

Step 4) Design of the interface with LVIC: The operatingsupply voltage of the LVIC is 3.3 V. The turn ratiobetween the additional secondary winding ( )connected with the LVIC and the primary winding( ) is determined by this operating voltage. Themaximum voltage over the primary winding is 2 V,

TABLE IINPUT DATA AND RESONANT NETWORK PARAMETERS

TABLE IIGATE DRIVER PARAMETERS

because the maximum voltage over the secondarywinding ( or ) is limited to approximately13 V by the zener diode. Therefore, the turns ofshould be designed to 3 T for safe operation of theLVIC.

The above designed mixed mode excitation is verified by aPspice simulation. A switch in the LVIC in Fig. 2(a) is modeledby the switch S1 in Fig. 4. The on-resistance of S1 should beas small as 1 so that S1 sufficiently shortens the secondarywinding (CT4). The switch S2 in Fig. 4 provides CT4 of thecurrent transformer with current for a short time, approximately5 s, for the start-up of the electronic ballast. This switch, whichshould have an on-resistance below 10 , is also embedded inthe LVIC.

From the simulation waveforms in Fig. 5, the self-oscillatingfrequency is determined to be 43 kHz before the stimulation ofthe control signal for switch S1. The control signal for switchS1 is generated for each half-period of the switching frequencyof the electronic ballast, 62.5 kHz in Fig. 5.

IV. LOW VOLTAGE CONTROL IC

Fig. 6 shows a block diagram of the control IC applicable tothe proposed mixed-mode excitation. The control IC performsfilament preheating and dimming by adjusting the switching fre-quency, including under voltage lock out (UVLO) and over cur-rent protection. The control IC shortens the secondary winding( ), in Fig. 2(a), for a short time by the half period of theswitching frequency. For this operation, there is a pulse gener-ator in the control IC. The voltage of , which is a saw-tooth

HAN et al.: MIXED MODE EXCITATION AND LOW COST CONTROL IC 875

Fig. 4. Simulated schematic for mixed-mode excitation.

Fig. 5. Simulation results.

wave, is reset by the edge of the drain voltage of M2 in Fig. 2(a).The drain voltage is scaled down and inputted to the CK node inthe control IC, thereby synchronizing the outputs of the controlIC to the edge of the drain voltage of M2.

Fig. 7 shows a schematic of the pulse generator in the controlIC. Control signals C1 and C2 from the operating mode selectorin the control IC switch the current charging . The voltageof is compared with an internal reference voltage ( ).Thus, the relationship between the current ( ) chargingand the switching frequency of the electronic ballast is

(2)

Furthermore, although the SRSPL resonant inverter has ahigh-resonant frequency before the ionization and drops toa relatively low-resonant frequency after the ionization, theswitching frequency is always higher than the resonant fre-quency for zero voltage switching (ZVS) operation, becausethe self-oscillating characteristic of the mixed-mode excitationguarantees ZVS operation. Two different switching frequen-cies for filament preheating and dimming are set by currentsthrough and , respectively. The duration of filamentpreheating is set by , which is connected to the CT node inthe control IC. The pulse generator in the IC is fed with current

876 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007

Fig. 6. Block diagram of the control IC.

Fig. 7. Schematic of the pulse generator.

Fig. 8. Operating mode and switching frequency.

through the in the preheating mode. In the ionizationmode, it is fed with no current, which means that the electronicballast operates as a self-oscillating electronic ballast, and inthe dimming mode it is fed with current through the .Therefore, there are three operating modes in the control IC.Fig. 8 shows the relationships between the operating mode andswitching frequency.

The structure of the driver in the control IC is designed to di-rectly connect the control IC with the transformer. The one nodevoltage of the secondary winding ( ) of the current trans-former has a positive value and a negative value for another node

Fig. 9. Schematic of driver and operating waveform.

Fig. 10. Trigger operation.

of by each half period. However, the operating voltage ofthe control IC has only a positive value. Hence, the negative

HAN et al.: MIXED MODE EXCITATION AND LOW COST CONTROL IC 877

Fig. 11. Experimental schematic of the mixed mode excited electronic ballast.

Fig. 12. Photograph of the designed LVIC.

Fig. 13. Experimental waveform of an operation of the initial trigger operation.

voltage of the transformer damages the control IC. The struc-ture of the driver in Fig. 9 solves this problem using a CK signalto connect the lower voltage node of the transformer with theground for each half period. The on-resistance of MOSFET S1is 0.36 and the size of this switch is calculated by

(3)

where 63 A V , gate-source voltage 3.3 V,and the threshold voltage 0.7 V.

Fig. 14. Experimental waveforms in the start-up. Ch 3: Mid-point voltage ofMOSFETS (100 V/div) Ch 4: lamp current [10 mA/div for (a), 20 mA/div for(b)].

Fig. 15. Experimental waveforms of an operation of the mixed mode excitationoperation.

Fig. 16. (a) Dimming range. (b) Dimming efficiency.

The width/length ( ) ratio of S1 is 6000 m/0.35 m. Thestructure of the driver enables the control IC to trigger the elec-tronic ballast by itself, and thus there is no need for an extra trig-gering circuit composed of a diac, diode, resistor, and capacitorin Fig. 1(a). The operation of the initial trigger is illustrated inFig. 10. At the triggering instant, only MOSFETs S2 and S3 inthe driver circuit are conducted for roughly 5 s, which is equalto approximately the half period of the switching frequency in

878 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007

Fig. 17. Passive PFC electronic ballast with PFM function.

Fig. 18. Experimental waveforms of PFM operation.

the preheating mode. During this time, pulse current measuringabout 300 mA flows into the secondary winding . The on-re-sistances of S2 and S3 are 1.5 and 1.4 , respectively.

V. EXPERIMENTAL RESULTS

An experimental prototype of the electronic ballast for a40-W fluorescent lamp has been built in order to verify the

TABLE IIIMEASURED POWER FACTOR AND CREST FACTOR

operation of the switching frequency variation in the proposedmixed mode excitation. In Fig. 11, and supply qui-escent current to the control IC during under-voltage lock out(UVLO), and supplies sufficient current to the IC duringthe normal operating mode. There is no zener diode for theLVIC power supply. The leakage current of the 3.3 V zenerdiode is about 6 mA, which is much larger than the steadystate current of the LVIC (350 A). Because the zener diodeis inefficient, it is replaced with an internal regulator, which isReg. block shown in Fig. 6 and maintains a VDD node voltageof LVIC, or 3.3 V.

Fig. 12 shows a photograph of the control IC designed usinga Hynix 0.35 m CMOS process for a 3.3 V application. Its coresize is 0.45 mm 0.45 mm.

Fig. 13 shows the experimental waveform at the instant of theinitial trigger. The figure shows that the duration of the triggerpulse is about 5 s.

Fig. 14 shows the experimental waveforms in the start-up.Employing switching frequency control ( 62 kHz), the fil-ament is preheated until the lamp is ionized, after 700 ms ormore. The filament temperature is increased as the filament pre-heats. The lamp current is about 10 mArms before ionization.The ionization voltage is as low as roughly 300 V due to fil-ament preheating. This reduced voltage serves to lengthen thelamp life.

Fig. 15 shows the experimental waveforms during operationof the mixed mode excitation dimmed down from maximumpower to minimum power. Because the switching frequency is

HAN et al.: MIXED MODE EXCITATION AND LOW COST CONTROL IC 879

Fig. 19. Photograph of the implemented mixed-mode electronic ballast.

always higher than the resonant frequency in the ZVS opera-tion, as the switching frequency is increased the output powerdecreases accordingly. In this experiment, by adjusting theswitching frequency from 42 to 75 kHz, the output power isdimmed from 40 W to 1 W, which is about 2.5% of the ratedlamp power.

The efficiency of the electronic ballast with mixed-mode ex-citation in dimming operation is shown in Fig. 16(b). In compar-ison with the results presented in the literature [8], where the pa-rameters of the resonant network and the rated power of the lampare the same as those in the experiment, the decreased slope ofefficiency in the present work is smoother [8]. This can appar-ently be attributed to the low switching loss by the fast switchinggate driver, with which the turn-off time of each switch is below50 ns, even for heavy dimming operation.

As an application example of the electronic ballast withmixed-mode excitation, the electronic ballast employing apassive high power-factor correction (PFC) circuit [10] isimplemented and tested. In addition, to improve the crest factorin the electronic ballast with passive PFC, pulse frequencymodulation (PFM) [11] is implemented using the designedLVIC and tested (see Fig. 17). The sensed dc bus voltage by

and is inputted to the DM node in the LVIC through. Thus, as the dc bus voltage increases, the switching

frequency of the electronic ballast becomes higher. In Fig. 18,experimental waveforms for the passive PFC without PFM andthe passive PFC with PFM are compared while varying the acsupply voltage by 10% of its nominal voltage (220 Vrms)(see Fig. 19). The measured power factor and crest factor aresummarized in Table III.

VI. DISCUSSION

The characteristics of the mixed mode excitation using LVICare summarized below and compared with the external excita-tion using a HVIC.

A. Small Chip Area and Low Cost Control IC

The chip area of the LVIC is as small as a few-tenths of theHVIC, as it has no high voltage interface and no internal gatedriver having the capability driving large current. As such, it iscost effective. Also, the current consumption of the LVIC is one-thirtieth part of that of the HVIC (as compared with IR21592).Because a low voltage process has higher integration densitythan a high voltage process, the LVIC is adequate for imple-mentation of a control IC with a novel control scheme such asa digital control [12].

B. Absence of Need of Phase Control

For ZVS operation, the switching frequency of an electronicballast should always be higher than the resonant frequency ofthe resonant network. In external excitation, the phase controlis used to guarantee this condition by monitoring the resonantcurrent. This complicates the design of the control IC. In mixedmode excitation, the minimum switching frequency is set by theself-oscillating operation, which guarantees the ZVS operation.Hence, there is no need to implement a phase control block inthe control IC.

C. Inherent no Lamp Protection

If there are fault conditions such as failure of a lamp to strikeor no lamp, the operation of the electronic ballast should bestopped by the control IC in external excitation. However, inmixed mode excitation, if these fault conditions occur, the oper-ation of the electronic ballast is automatically stopped becausethe MOSFETs are turned on by the resonant current [13]–[18].

VII. CONCLUSION

A mixed mode excitation with a mixed structure havingadvantages of both self-excitation and external excitation hasbeen proposed for controlling switching frequency. A controlIC applicable to this method has also been designed, using a0.35- m CMOS process for 3.3-V application. The operation ofthe control IC has been verified by experiments. The electronicballast with mixed mode excitation displayed a wide dimmingrange from 100% to 2.5%. A PFM was also implementedand tested using the designed control IC and only a fewpassive elements. From the characteristics of a mixed modeexcitation, it has important advantages in comparison withexternal excitation, although the cost of the current transformermust be considered.

REFERENCES

[1] A. R. Seidel, F. E. Bisogno, H. Pinheiro, and R. N. do Prado, “Self-oscillating dimmable electronic ballast,” IEEE Trans. Ind. Electron.,vol. 50, no. 6, pp. 1267–1274, Dec. 2003.

[2] F. Tao, Q. Zhao, F. C. Lee, and N. Onishi, “Self-oscillating electronicballast with dimming control,” in Proc. Power Electron. Spec. Conf.,2001, vol. 4, pp. 1818–1823.

[3] S. S. M. Chan, H. S. H. Chung, and S. Y. (Ron) Hui, “Design and anal-ysis of an IC-less self-oscillating series resonant inverter for dimmableelectronic ballasts,” IEEE Trans. Power Electron., vol. 20, no. 6, pp.1450–1458, Nov. 2005.

[4] J. Adams, T. J. Ribarich, and J. J. Ribarich, “A new control IC fordimmable high-frequency electronic ballasts,” in Proc. Appl. PowerElectron. Conf., 1999, vol. 2, pp. 713–719.

880 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 22, NO. 3, MAY 2007

[5] L. R. Nerone, “A complementary class D converter,” in Proc. Ind. Appl.Conf., 1998, vol. 3, pp. 2052–2059.

[6] M. Radecker and F. Dawson, “Ballast-on-a-chip: Realistic expectationor technical delusion?,” IEEE Ind. Appl. Mag., vol. 10, no. 1, pp. 48–58,Jan./Feb. 2004.

[7] C. S. Moo, H. L. Cheng, H. N. Chen, and H. C. Yen, “Designingdimmable electronic ballast with frequency control,” in Proc. Appl.Power Electron. Conf., 1999, vol. 2, pp. 727–733.

[8] F. T. Wakabayashi and C. A. Canesin, “An improved design procedurefor LCC resonant filter of dimmable electronic ballasts for fluorescentlamps, based on lamp model,” IEEE Trans. Power Electron., vol. 20,no. 5, pp. 1186–1196, Sep. 2005.

[9] C. Chang, J. Chang, and G. W. Bruning, “Analysis of the self-oscil-lating series resonant inverter for electronic ballasts,” IEEE Trans.Power Electron., vol. 14, no. 3, pp. 533–540, May 1999.

[10] G. Chae, Y. S. Youn, and G. H. Cho, “High power factor correctioncircuit for low-cost electronic ballasts,” Electron. Lett., vol. 33, no. 11,pp. 921–922, May 1997.

[11] J. Song, J.-H. Song, I. Choy, and J.-Y. Choi, “Improving crest factorof electronic ballast-fed fluorescent lamp current using pulse frequencymodulation,” IEEE Trans. Ind. Electron., vol. 48, no. 5, pp. 1015–1024,Oct. 2001.

[12] Y. Yin, M. Shirazi, and R. Zane, “Fully integrated ballast controllerwith digital phase control,” in Proc. Appl. Power Electron. Conf. Expo,2005, vol. 2, pp. 1065–1071.

[13] Y.-S. Youn, T.-H. Ryoo, and G.-H. Cho, “Fast switching gate driverfor self-resonant inverters applicable to electronic ballasts,” Electron.Lett., vol. 34, no. 9, pp. 826–828, Apr. 1998.

[14] L. R. Nerone, “A mathematical model of the class D converter for com-pact fluorescent ballasts,” IEEE Trans. Power Electron., vol. 10, no. 6,pp. 708–715, Nov. 1995.

[15] T. J. Ribarich and J. J. Ribarich, “A new control method for dimmablehigh-frequency electronic ballasts,” in Proc. Ind. Appl. Conf., 1998,vol. 3, pp. 2038–2043.

[16] L. R. Nerone, “A novel MOSFET gate driver for the complementaryclass D converter,” in Proc. Appl. Power Electron. Conf., 1999, vol. 2,pp. 760–763.

[17] H.-S. Han, T.-H. Ryu, and G.-H. Cho, “A control IC for electronicballast with mixed mode excitation,” in Proc. Power Electron. Spec.Conf., 2004, vol. 3, pp. 1768–1771.

[18] R.-L. Lin and Y.-T. Chen, “Phase-locked-loop-control-based elec-tronic ballast for fluorescent lamps,” in Proc. Elect. Power Appl., 2005,pp. 669–676.

Hee-Seok Han (S’04) received the B.S. and M.S.degrees in electrical engineering from the KoreaAdvanced Institute of Science and Technology(KAIST), Daejeon, in 2000 and 2002, respectively,where he is currently pursuing the Ph.D. degree.

His research interests are in the areas of powerelectronics and integrated circuits (ICs) includingcontrol, analysis, and design of electronic ballast andits control IC.

Tae-Ha Ryoo received the M.S. degree in electricalengineering from the Korea Advanced Institute ofScience and Technology (KAIST), Daejeon, in 1997,where he is currently pursuing the Ph.D. degree.

He founded DMB Technology Co., Ltd. in 2002.This company serves power management IC solu-tions. His research interests are in the areas of mobileand display power management IC design.

Gyu-Hyeong Cho (S’76–M’80) received the Ph.D.degree in electrical engineering from the KoreaAdvanced Institute of Science and Technology(KAIST), Daejeon, in 1981.

He is now with the Department of Electrical Engi-neering, KAIST, as a Professor. From 1982 to 1983,he was with the Electronic Technology Division,Westinghouse R&D Center, Pittsburgh, PA, where heworked on high power UFCs and Inverters. He wasa Visiting Professor at the University of Wisconsin,Madison, in 1989. He joined the Department of

Electrical Engineering, KAIST in 1984 as an Assistant Professor. His pastresearch interests were in the area of Power Electronics such as static powerconverters, inverters, and resonant converters until 1994. His recent researchinterests are in the area of analog integrated circuits, especially, smart powercircuits merging power devices, and control circuits in one chip such as singlechip dc–dc converters. He is also interested in the display drivers for LCD andOLED using CMOS technology.