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1 Development, Design, and Implementation of an Audio FX Processor using the TMS320C6713 DSP Michael Jones, Student Member, A.E.S, Abstract—This paper describes the development, design, and implementation of a simple, multi-channel, audio effects proces- sor. Simplicity of design is emphasized, and achieved by using a single TM320C6713B digital signal processor (DSP). The DSP manages both user interface, and audio processing functions. Therefore, this design avoids the high complexity, component count, and cost that is typical of designs using micro- controllers as system hosts. A block diagram of the single- DSP system, and descriptions for each of it’s main hardware components are given. Six audio effects are implemented on the system. A block diagram and description for each is given. In addition, C-code is given to implement four of the audio effects. Index Terms—Digital Signal Processing, Digital Signal Proces- sor, Audio I. I NTRODUCTION A UDIO effect processors are used to alter properties such as volume, dynamics, or frequency content of an audio signal. They are also used to create noticeably audible changes, such as the reverberation, or distortion of an audio signal. Sometimes the audible changes are referred to as effects (FX), or digital audio FX (DAFX). Most stand-alone hardware based DAFX processors on the market today use digital signal processors (DSPs) to implement multiple FX. Many of these systems use a micro- controller, or other processor, to manage the user interface. This results in a reduced load on the DSP’s CPU. The reduced load allows the DSP to perform complex audio signal process- ing algorithms; while still meeting real time requirements. However, a host processor may not be needed if the effect algorithms being implemented are computationally simple; FX such as echo, and flanging are an example. Despite their simplicity, some of these FX are standard tools for musicians and studio engineers. There may be cases where DAFX processors are only used to implement these simple, but standard algorithms. In this case, a simpler system could be used. Therefore, this paper proposes a design for a simple, low-complexity, low cost, DAFX processor with the following specifications: • One Processor System (no host processor) • Two-Independent Channels with 6 FX each • Large LCD Visual Interface • Simple 3 Encoder, 2 Button User Interface M. Jones is a student in the Electrical Engineering Technology pro- gram, Oregon Institute of Technology, Portland, OR, 99722 USA e-mail: [email protected]. II. DAFX PROCESSOR DESCRIPTION This section provides a functional description of the digital audio FX processor. A block diagram of the system is given in Figure1, and explained, component by component. Peripherals of the DSP chip are explored as well. A. ADC The analog to digital converter (ADC) is used to convert both left and right analog signals into a single, time division multiplexed (TDM), 32-bit stream. Each channel sample is composed of 16 bits. Samples are interleaved, with alternating left and right samples within the TDM bit stream. The input sampling rate is chosen to be 48kHz. The ADC is implemented with the TLV320AIC23B CODEC [5]. The CODEC communicates with one of two Multi-Channeled Buffered Serial Port (McBSP) peripherals on the TMS230C6713B DSP [6]. The CODEC runs off of its own clock; therefore, the McBSP is asynchronously notified when there is data available. Once the McBSP receives the TDM stream, it hands this stream off to the Enhanced Direct Memory Access (EDMA) peripheral of the DSP. The EDMA manages the channel splitting of the data, and its movement to buffers in memory. These buffers are processed by the chosen effect algorithm. B. DAC The digital to analog converter (DAC) is used to convert the samples processed by the DSP, into an analog audio signal. The processed samples are reconstructed into an audio signal at the system’s sampling rate of 48kHz. This analog audio signal is the output of the DAFX processor. The DAC is implemented with the TLV320AIC23B CODEC. The EDMA, and McBSP of the DSP also manage the movement of output data to the DAC in the following way. When data has been processed, and is ready to be sent out, the EDMA sends the processed data to the McBSP. The McBSP notifies the CODEC that there is data available for transmission. The CODEC’s DAC converts this digital information into analog. C. Memory The block diagram in Figure1 shows external memory attached to the DSP. The DSP has a 192kB of internal random access memory (IRAM). However, more memory for large data buffers is needed. The external memory block is comprised of two types of memory; synchronous dynamic random access memory
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