1

Introduction of Lab & Research Subjects

Keiji Yoshida Prof. , Dr. Eng.

Graduate School of Information Science

and Electrical Engineering ( ISEE )

Kyushu University

2010.7.26@E-JUST

2

Clustering of JSUC by Programs

Electronics, Communications

& Computer Eng. Dept.

Energy &Environmental

Eng. Dept.

Electronics & Communications Eng.

Computer Science and Engineering

Materials Science and Engineering

Industrial Eng.& Management Systems

Mechatronics and Micro-Electromechanical Systems

Chemical & Petrochemicals Eng.

Energy Resources & Environmental Eng.

Tohoku （Prof. Tsuchiya）

Waseda (D Prof.Hashimoto)

Tokyo （Prof. Maekawa）

Keio (TBD)　

Tokyo Tech （Prof.Miki）

Nagoya （VD Prof. Tanaka）

Kyoto （D Prof. Komori)

KIT （Prof. Kunugi）

Ritsumei (VP Prof. Cassim)

Osaka (Prof. Kawasaki)

Kyushu (VP Prof.Yasuura)

Hokkaido （D Prof. Baba）

JSUC

[ Osaka] Kawasaki

Innovative Design

Eng. Dept.

Kyoto Nishimoto(Oshima) 2011 Fall

Kyushu　YoshidaVictor, Jia

Main Program Supporting Univ.

Faculty of Eng.

[Advisor(s)To Pres.]

[Tsunoda PA]

[Adachi PC]

[Okano PC]

[Okumoto PC]

[Matsushita]

Kyoto Tabata 2011 Fall

Tokyo TechＩｉｊｉｍａ (TBD)

　　　　　 = 3 Graduate Programs started from Feb. 2010.

[Kyoto]　Ono

Waseda YamakawaIwata, Others

Tokyo Tech SuzukiOkawara, Oliver

[TokyoTech] Ichimura

Waseda

Kyoto

Kyushu

Chair Univ.

※Japanese Supporting University Consortium (JSUC)

Waseda UedaWada, Others

2010 Fall

3

JICA Project : Dep. of Electronics & Commun. Eng. (E-JUST)During 2010-2013 (first stage) ( -2018 second stage)Director from Kyushu Univ.：Prof. Yoshida

E-JUST-Local Teachers

Kyudai’s two associate professors for E-JUSTHongting Jia Victor Goulart

Prof. Yasuura & Murakami’s group

Prof

. Yos

hida

’s g

roup Department of Electronics and

Communication　Engineering E-JUST

Prof. Furukawa’s group

(RF and Analog LSI)

Multi-core processor

Wireless network

4

MEXT Project ( Kyushu University : During 2010-2014 )Directors：Profs. Yoshida & Murakami

Ｍｉｓｓｉｏｎｓ Feasibility-Study, Development and 　　　　　　　　　 Ｉmplementation of :• Student Exchange Program• Int. Collaboration between Universities & Industries• Cultural Exchange Program between Egypt, Middle-East & Japan• Support to E-JUST Administration ( Via VP Prof. Yasuura )• Double Degree Program ( Master Program )

日本エジプト科学技術連携センターCenter for Japan‐Egypt Cooperation 

in Science and Technology E‐JUST Center2010.8.1‐2014  (Opening Ceremony 9.15 @Kyushu U.)

5

・ Analog Integrated CircuitsResearch RF-CMOS front-end (LNA, PA, Mixer, VCO, AD/DA), Miniaturized

antenna (UHF, 3G, .11a, b & g, UWB)Co-Ad. Profs. Yoshida , Kanaya, Pokharel, Jia, Yoshitomi Access http://yossvr0.ed.kyushu-u.ac.jp/

• Digital Signal Processing Research Hardware/Software Co-Design, Ultra Low Power Design,

Parallel computing/processing, Architecture/Hardware ModelingCo-Ad. Profs. Murakami, Victor, Inoue, Ishihara, Farhad

( VP Prof. Yasuura )Access http://www.slrc.kyushu-u.ac.jp/ & http://www.i.kyushu-u.ac.jp/

• Digital and Data Communications Research Wireless Mesh Network, MIMO-MESH, Wireless Multihop

　 Co-Ad. Profs. Furukawa, MutaAccess http://mobcom.is.kyushu-u.ac.jp/~furuhiro/index.html

Co- Advisors from Kyushu University in Core Fields@Dep. of Electronics & Communication Eng.

6

Yoshida Lab. Web Page

7

Yasuura Lab. Web Page

8

Murakami Lab. Web Page

9

Furukawa Lab. Web Page

10

Yoshida Lab Members

http://yossvr0.ed.kyushu-u.ac.jp/english/ehp2.html

in portal site :

http://yossvr0.ed.kyushu-u.ac.jp

11

Block diagram of RF front-end for Wireless Communications

digital

proc.

PHY

Receiving part

Transmitting part

VCO, PLL

Mixer

Mixer

ＬＮＡ

ＰＡ

A/D

D/A

VGA

Buff LPF

LPF

Research fields & subjects covered by Yoshida lab

～～～

～～～

BPF

Antenna

⇒　Development of RF front-end LSI Mixed Signal Chip with Planar Antennas for mobile wireless terminals

12

Research groups ( 2010 Yoshida lab@Kyushu univ. )

Antenna + Filter RF-LSI

D3Galal (UWB LNA, Low power)Abdelghany (MX, Low power)Murad (UWB PA)

D2 Dong (UWB Pulse)

D1Rohana (UWB PA)

M2

Kato(2.4G Widband oneside)Nagata (Dual band QTN)Koku (3D bottom chip）Liu(Onchip MMW BPF)

Koirala(UWB notch LNA)Yano (LNA +MX)Hamada(Ring DCO)Lingala (Ring DCO)

M1

Kuwamoto (UWB BPF +LNA/PA)Hirabaru (Antenna+ Tag)Hayakawa (Dual band QTN)Ijiguchi (UWB Ant+BEF)

Ishihara (Series LC DCO)

B4(Liu's BPF) Ishida, Hirabe(UHF antenna) Kusuhara

(Ring DCO) Hashimura(MEMS DCO) Yamashita(MX) Masumoto

Oshima (Ternary DAC)Kubokawa(F. Series DAC)

Hokazono (Ternary DAC)

(Ternary　DAC) Oshiro

Mixed Signal　LSITomar (F.Series, DAC, OSC)

Ghazal (ADC)Nugroho (PLL)Anand (ADC)

13

Doctor Course Students (Yoshida Laboratory)

Publication List

1. “Linearization technique using bipolar transistor at 5 GHz low noise amplifier,” AEU - International Journal of Electronics and Communications.

2. “An excellent gain flatness 3.0-7.0 GHz CMOS PA for UWB applications,” IEEE Microwave and component letter.

3. “1-5GHz Wideband Low Noise Amplifier using Active Inductor Load,” IEEE International conference of Ultra-wideband (ICUWB) 2010.

4. “Ultra-wideband low noise amplifier with shunt resistive feedback in 0.18µm CMOS process,” Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF), 2010 , New Orleans, LA, USA, pp. 33-36.

5. “Integrated design of UWB LNA with filter,” 2008 th IEEJ Kyushu-Branch Conference.6. “Comparison between bipolar and NMOS transistors in linearization technique at 5 GHz low noise amplifier,”

APMC, Asia Pacific Microwave International Conference, Hong Kong, Dec.16-19, 2008. 7. “Design of flat gain and low noise figure LNA for 3.1-10.2 GHz band UWB applications in 0.18um CMOS

process,” 2008 IEEJ International Workshop on AVLSI, Istanbul, Turkey, July 30-August 1, 2008.8. “Development of low noise RF front-end for ultra-wideband (UWB) systems on 0.18µm CMOS technology,”

EJISST 2008 Egypt-Japan International Symposium on Science and Technology, Tokyo, Japan, June 8-10, 2008.

9. A low flicker noise direct conversion receiver for the IEEE 802.11a wireless LAN standard,” APMC2009, Asia Pacific Microwave International Conference, Singapore, 2009.

Ahmed Ibrahim Ahmed Galal, EgyptDoctor course: D3Research subject : Development of low power, low noise RF front end for Ultra-wideband systems.

14

1. M. A. Abdelghany, R. K. Pokharel, H. Kanaya, and K. Yoshida, “A Low Flicker-Noise High Conversion Gain RF-CMOS Mixer with Differential Active Inductor,” Proc. 2009 Korea-Japan Micro Wave Conference, pp. 141-144, April 2009.

2. M. A. Abdelghany, A.I.A. Galal, R. K. Pokharel, H. Kanaya, and K. Yoshida, "A Low Flicker Noise Direct Conversion Receiver for the IEEE 802.11a Wireless LAN Standard," Asia-Pacific Microwave Conference Proceedings, pp. 1568-1571, December 2009.

3. H. Kanaya, N. Koga, M. A. Abdelghany, R. K. Pokharel, K. Yoshida, “Low Flicker-Noise and Low Leakage Direct Conversion CMOS Mixer for 5GHz Application,” Asia-Pacific Microwave Conference Proceedings, pp 1515-1518, December 2009.

4. N. Koga, M. Abdelghany, R. K. Pokharel, H. Kanaya, and K. Yoshida, “ Discussion on Improvement of Linearity and Flicker Noise of a Down-Conversion Mixer for 5.2GHz Band Direct Conversion Receiver,” IEICE Technical Report, Vol. MW2009-137, pp 53-56, November 2009.

Publication

Mahmoud Ahmed Abdelghany Khalil, EgyptDoctor Course: D3Research subject: Low flicker noise RF mixer, Low power front-end, Active Inductors, and Meta-materials

2.00

E-0

8

4.00

E-0

8

6.00

E-0

8

8.00

E-0

8

1.00

E-0

7

1.20

E-0

7

1.40

E-0

7

1.60

E-0

7

1.80

E-0

7

2.00

E-0

7 0

5

10

15

20

25

30

4 4.2 4.4 4.6 4.8 5 5.2 5.4 5.6 5.8 6

Frequency, GHz

Vol

tage

Gai

n, d

B

0

5

10

15

20

25

30

0 25 50 75 100 125 150Frequency, MHz

Volta

ge G

ain,

dB

-80

-70

-60

-50

-40

-30

-20

-10

0

10

20

-40 -30 -20 -10 0 10Pin, dBm

Pout

, dBm

Front-end Chip Measurements Results Mixer with Active Inductor Chip

Active InductorChip

Doctor Course Students (Yoshida Laboratory)

15

Doctor Course Students (Yoshida Laboratory)

Ghazal A. Fahmy, EgyptDoctor course: D1Research subject : Spectrum-Sensing, Reconfigurable Σ∆ ADC For Multiple Standards Receivers

Latched Comparator

Folded cascode Amplifier

Folded cascodeamplifier

•DC gain 83dB

•UGB 183MHz

Latched Comparator

•Fmax 1GHz

•Offset voltage 1mV

16

Doctor Course Students (Yoshida Laboratory)

Publications1.“Design of 1.1 GHz Highly Linear Digitally-Controlled Ring Oscillator with Wide Tuning range,” IEEE RFIT

2007,Singapore, pp. 82- 85　　2. “Design of Highly Linear, 1GHz 8-bit Digitally Controlled Ring Oscillator with Wide Tuning Range in 0.18 um CMOS

Process,”IEEE CJMC 2008,Nanjing, China, pp. 623 – 626 3. 3. “Design of digitally controlled LC oscillator with wide tuning range in 0.18um TSMC CMOS technology,” IEEE APMC

2008, Hongkong, China, pp. 1- 4 4. “Low phase noise 10 bit 5 GHz DCO using on-chip CPW resonator in 0.18 µm CMOS technology,” IEEE AH-ICI 2009,

Kathmandu, Nepal, pp. 1–45. “10 bit 2/5GHz dual band digitally-controlled LC-oscillator in 0.18 um CMOS,”IEEE APMC 2009, Singapore, pp. 2284 -

2287 6. “Low phase noise 18 kHz frequency tuning step 5 GHz DCO using tiny capacitors based on transmission lines,”Silicon

Monolithic Integrated Circuits in RF Systems (SiRF), 2010 , New Orleans, LA, USA, pp. 8-11.7. “Low phase noise, 18 kHz frequency tuning step, 5 GHz, 15 bit digitally controlled oscillator in 0.18 um CMOS

technology,” IEICE Trans. on Electronics, Vol. E93-C, No. 7, pp. 1007-1013. 8. “Digitally Controlled Ring Oscillator for Multi-Standard GHz Applications,” International Conference on Solid State

Devices and Materials (SSDM2010),Tokyo,Japan.(Accepted)9. “A Wide Tuning Range -163 FOM CMOS Quadrature Ring Oscillator for Inductorless Reconfigurable PLL,” IEEE ISSE,

2010, Nanjing, China. (Nominated for Student best paper award competition) (Accepted)10. “Modeling of Non-Linearity in Digitally Controlled Oscillator on 0.18 um CMOS Technology,” IEICE Trans. on

Electronics. (Accepted)

Abhishek Tomar, IndiaDoctor course: D3Research subject : Development of Digitally　Controlled　CMOS Oscillators for Next Generation Wireless Systems

17

Doctor Course Students (Yoshida Laboratory)

Publication List1. “An excellent gain flatness 3.0-7.0 GHz CMOS PA for UWB applications,” IEEE Microwave and Wireless components

letters. 2. “A 2.4-GHz 0.18-µm CMOS Class E single-ended switching power amplifier with a self-biased cascode,” AEU -

International Journal of Electronics and Communications, Vol. 64, pp. 813-118, Sept. 2010.3. “A 2.4 GHz 0.18-µm CMOS Class E single-ended power amplifier without spiral inductors”, IEEE 2010 10th Topical

Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SIRF 2010), 11-13 Jan, 2010, Page(s): 25 – 28.4. “A 3.0–7.5 GHz CMOS UWB PA for group 1~3 MB-OFDM application using current-reused and shunt-shunt

feedback”, International Conference on Wireless Communications & Signal Processing, 2009. WCSP 2009, 13-15 Nov. 2009 Page(s):1 – 4

5. “A 3.1 - 4.8 GHz CMOS UWB Power Amplifier Using Current Reused Technique”, 5th International Conference on Wireless Communications, Networking and Mobile Computing, 2009, WiCom '09. 24-26 Sept. 2009 Page(s):1 – 4.

Sohiful Anuar Bin Zainol Murad, MalaysiaDoctor course: D3Research subject : Development of CMOS power amplifier for wireless and UWB applications.

2.4 GHz CMOS Class E PA 3-5 GHz CMOS UWB PA 3-7 GHz CMOS UWB PA

18

Doctor Course Students (Yoshida Laboratory)

Publication List

1. “An UWB Bandpass Filter with Large Notch Suppression” APMC2009, Asia Pacific Microwave International Conference, Singapore, 2009.

Ruibing Dong, ChinaDoctor course: D2Research subject : Ultra-Wideband Impulse Generator ( UWB TX )

19

Doctor Course Students (Yoshida Laboratory)

Thesis Summary

Injection Locking is a new techniques to achieve high performance circuits in some applications, such as Frequency Divider, Quadrature Output Generation and Finer Phase Separation Oscillator. This Thesis will study the advantages of injection locking in Ring Oscillator Topology in designing High Performance Frequency Divider and Quadrature Output Oscillator for PLL application in CMOS Wireless Communication based on TMSC 0.18 micron technology.Wide locking range 2.5 GHz Injection Locked Ring Oscillator Frequency Divider using Direct Injection Techniques is designed at the beginning, continued by designing High performanceQuadrature Output Injection Locked Ring Oscillator that is injected by wide tuning differential LC Oscillator. Next, other Injection techniques and topologies will be studied and designed.

Prapto NUGROHO, IndonesiaDoctor course: D1Research subject : Injection Locked Frequency Divider and Quadrature Ring Oscillator

20

Doctor Course Students (Yoshida Laboratory)

Thesis Summary

Rohana Binti Sapawi , Malaysia Doctor course: D1Research subject : Design of Full-band Power Amplifier for UWB Applications

Ever since the FCC allocated 7.5Ghz (from 3.1Ghz to 10.6Ghz) for UWB technology, interest has been renewed in both academic and industrial circles to exploit this vast spectrum for short range, high data rate wireless applications. The great potential of UWB lies in the fact that it can co-exist with already licensed spectrum users and can still pave the way for wide range of application. The radio frequency (RF) power amplifier (PA) is an important component of any wireless transmitter. Their function is to amplify the signal and generate the required RF power that allows transmissions of the signal over the appropriate range. In all of the RF front end components, the integration of CMOS power amplifier remains a difficult challenge. Because of the breakdown voltage, low transconductance capacity and poor passive devices in CMOS process, it is challenging to design a fully integrated CMOS PA with high output power, efficiency, broadband input matching, high power gain and linearity at such high frequencies and wide bandwidth. Even though expensive technologies like SiGe or GaAs have been used for transceiver realization, the ultimate goal is to have a single chip, low cost solution which can only be achieved by using CMOS technology. Therefore, I have a great interest to solve these problems in my Doctorate research by designing CMOS power amplifier for full-band UWB applications. This design will be implemented, fabricated in TSMC 0.18µm and tested on deep-submicron CMOS process.

21

Lab Introduction

Key Words of Our Research

Miniaturization & Low Power⇒ ① SoC (System on Chip)⇒ ② Antenna

Tr. Amp. Digital Ckt.

Receiving RF Ckt

Receiving IF Ckt

Intersil 2.4GHz PCMCIA Card (PRISM 2.5)

Antennas

22

Research (CMOS)

•Power Amp. (IEEE .11a, IEEE .11b, UWB)•LNA (IEEE .11a, IEEE .11b, UWB)•VCO & DCO (IEEE .11a, 10GHz)•Down converter (IEEE .11b)•Ring Oscillator (UWB)•DAC/ADC•On chip bandpass filter (60GHz)

23

Research (Antenna & Filter )

•One-sided directional antenna300MHz, UHF, 2.4GHz (.11b), MIMO (.11a), UWB

•Electrically small antenna with matching circuitUHF, 2.4GHz, 5GHz•Dual band antennaPDC + 3G (800MHz + 2GHz)•UWB off chip bandpass filter

24

Previous Design

TSMC 0.18um tech.5mm x 5mm12th TEG

25

Previous Design (Chip name)

front_end_FULL _frontEndEmergencySvcox30 vcoX0

dcoXstd dcoXstd52

stdar RING_DCO_11

uwbpa_lowerband1

uwbpa_lowerband

uwbpa_fullband

Mix_DAI UWBLNA

Mixer_Ds_layout

inductors_test12p2comparator_final_7Series_6bitDAC stdar_kibou

P5DCO12ALNA_Mixer_layout

LNA_Active_inductor

vcoX15P1DAC10

12th_DCO_15bit3

_DACcr2A3

diff_AI_layout

26

Previous Design (Chip photo)

27

PCB designcircuit

PCB layout

VDD, GND,SMA connector,Pass condensor,Digital input pin,50W strip line,Same line length

28

PCB fabrication and bonding

29

Final PCB

Digital pin DC, Bias & GND RF (SMA connector)

30

Experimental Results

31

VCO (Voltage controlled Osc.) with TML

4.8

5

5.2

5.4

5.6

5.8

6

6.2

6.4

0 0.4 0.8 1.2 1.6Fr

eque

ncy

(GH

z)

DC Control Voltage (V)

TML VCO

LC VCO

100µm

TML VCO= -112dBc/Hz @1MHzLC VCO= -110dBc/Hz @1MHz

TSMC0.18µm CMOS process

32

LC-DCO (Digitally controlled OSC)

4.5

4.6

4.7

4.8

4.9

5

5.1

0 200 400 600 800 1000Fr

eque

ncy

(GH

z)

control word (10bit)

Ｖ１

Ｖ２

Ｖ３

Ｖ４

Ｖ７

Ｖ５

Ｖ６

C C ２C２C４C ４C

８C ８C

Cvar Cvar

Cvar Cvar

CvarCvar

Cvar

Cvar

Cvar

Cvar

CvarCvar

CvarCvar

Ｖ８

Ｖ９

Ｖ１０

３２C １６C１６C ６４C６４C ３２C

TML Capacitor

TSMC0.18µm CMOS process

On-Off

LC VCO= -119dBc/Hz @1MHz

33

LNACPWMatching circuit

（50Ω）

Down conversion mixer

VCOLayout (LNA + Mixer)

Matching circuit

Size

480μm×250μm

TML

600μm×300μm

Lumped element

（約14.0nH @2.45GHz ）

RF_IN

Chip Size3.3mm×2.0mm

LO

LO

LNA + Mixer (Down converter)

CPWMatching circuit

34

LNA + Mixer (Down converter)

Mixer LNA

K-inverters andCPW lines

Input-matching circuit

Matching circuit between LNA and mixer

Mixer LNAInput-matching circuit

Matching circuit between LNA and mixer

-80

-60

-40

-20

0

20

40

60

80

1 2 3 4

Inpu

t Im

peda

nce

[ O

hm]

Frequency [ GHz ]

SimulationMeasured

Real parts

Imaginary parts

Input Impedance

Output by Oscilloscope(Base band freq.=10MHz)

35

Ring-Oscillator

WLAN(.11a,.11b), WCDMA, GPS, PHS, GSM, IMT2000 …

●Reconfigureable RF circuit.●Multi-standard systems in one terminal.

MobileTerminal　　　　　

Tel.

WLAN

Bluetooth

TV

RFID

UWB

GPSFM

DTV

Demand of Wideband Systems

⇒Wide band oscillator

36

I1

I3 I4

I2Q270

Q90

Q180

Q0Vdd

VssW180

Q90Q180

Q270

M4

M3

M1

M2

Additional transition-assistance pair

pMOS

nMOS

Proposed Quadrature Ring OscillatorChip photo

TSMC 0.18um CMOS Process

Size:0.30 mm2 with bonding pads.Size: 0.01 mm2 without bonding pads.

37

Measurement results

Time-Domain Tuning Range

Tuning Sensitivity = 2.9 MHz/mVTuning range = 1.7 GHz ～5.5 GHzFOM= -162.2 dBc/Hz

Figure of Merit: ⎟⎠⎞

⎜⎝⎛++⎟

⎟⎠

⎞⎜⎜⎝

⎛−=

001.0log10log20 diss

off

osc PPNFFFOM

38

DAC

xi0xi1xi2xi3xi4xE

xi5xi6xi7xi8xi9

setV

ddV

ssV

db2

VdgVd

Vdg２Vｓ

VoutVoutｂ

INL:±0.065[LSB]DNL: :±0.075[LSB]SFDR:63.5[dBc@1MHz]

INL:±1.22[LSB]DNL: :±0.74[LSB]SFDR:60.0[dBc@1MHz]Power:14.94[uW]

2:Measured data (DNL)

1:Designed parameter

3:Measured summary

Bandpass filter@60GHz Liu

Designed parameter

Center frequency: 60GHzInsertion loss: 2.9dBReturn loss: 25dB

Measured data

Measured summary

Center frequency: 59.7GHzInsertion loss: 3.3dBReturn loss: 22dB

gnd

gnd

40

Research (Antenna & Filter )

•One-sided directional antenna300MHz, UHF, 2.4GHz (.11b), MIMO (.11a), UWB

•Electrically small antenna with matching circuitUHF, 2.4GHz, 5GHz•Dual band antennaPDC + 3G (800MHz + 2GHz)•UWB off chip bandpass filter

41

Antenna fabrication

PCB

Printed board making equipmentHigh-frequency Milling Cutter

42

Photograph of measurement system

Tx. Ant..

Turn table

Rx. antRx. ant.

Tx. ant.

Proposed ant.

Anechoic Chamber

Yoshitomi Lab. in Kyusyu Univ.

43

-50

-40

-30

-20

-10

0

2 2.2 2.4 2.6 2.8 3

Ret

urn

Loss

[dB]

Frequency [GHz]

Measured

EM Sim.

Band widthJ-Inverter

(Inter digital gap)

Photographs of the antenna19.3mm

Experimental results of the one-sided directional ESA with CPW matching circuit

44

Antenna

PC

Reader-Writer

RF-ID Card @2.45GHz (IMS band)

Experimental results of the one-sided directional ESA with CPW matching circuit

@ Toppan printing Co.

45

Patch antenna #245mm□×t1.6mm

ESA39×19×t0.8mm

Patch antenna #175mm□×t5mm

Comparison of the sizes of the one-sided directional antenna

46

Patch #2 ESAPatch #10

50

100

150

200

250

300

350

FrontBack

Com

mun

icat

ion

dist

ance

(mm

)

102

103

104

105

Antenna size [m

m3]

81% reduced !

GtGrWtd

Wr ⎟⎠⎞

⎜⎝⎛=πλ

4

2

TX RX

dGt Gr

Power received by the RX antenna

Friis' Transmission Formula

Measured communication distance and antenna size of the patch antenna and ESA

47

UWB High Band one-sided directional antenna

y

-35

-30

-25

-20

-15

-10

-5

0

6.5 7 7.5 8 8.5 9 9.5 10 10.5

Ret

urn

Loss

[dB

]

Frequency [GHz]

Exp.

Sim.

Three resonance—broad band

7.25GHz 8.25GHz 9.25GHz

θφ =0°

φ =90°

48

Photo of the UWB High Band receiver

Router

Client

Proposed UWB antenna

49

UHF visiting-card size one-sided directional antenna

-30

-25

-20

-15

-10

-5

0

800 850 900 950 1000

|S11

| (dB

)

Frequency (MHz)

-50

-25

0

25

50

75

800 850 900 950 1000

Re [Zin]Im [Zin]

Inpu

t Im

peda

nce

(Ω)

Frequency (MHz)

ｘ－ｚ面

ｙ－ｚ面 F/B：8dB

y

(Sim.)

Human body or metal surface like auto mobile.

50

ESA1

9mm

Sensor & CPU

@ NEC Microsystems Co.

2.4GHz sensor node

51

UHF 2GHz44mm

FOMA (NTT docomo) data module@ Kyushu Ten Co.

UHF & 2GHz dual band antenna

52

Back bone network

Wire lineBase

Wireless access

PC

Internet phone

Wireless access

MESH point

MESH node

Multi hop

Knowledge Cluster Initiative implemented by Ministry of Education, Culture, Sports, Science and Technology (MEXT)Prof. Furukawa @ Kyushu Univ.

New national project; MESH Network project

53

Fix

Large

Small

Portability

・Ｂ・Ｔ ・Ｓ

★ＭＩＭＯ－ＭＥＳＨ

・Sensor node

★Ｐｉｃｏ－ＭＥＳＨ

Conventional MESH Device

MESH Network system

MESH Point

One-sided directional planar antennas

MIMO-MESH, Pico-MESH

More than 10kgLimitation= 2~3 hubs

RF front end + IP Core

54

New Antenna22mm×28mm5dBi （One-sided directional）

MESH Antenna @5GHz

X

Z

Y

Z

XY

ConventionalH:15.7mm×D:1.1mm5dBi

F/B：10 dB

55

Node A Node B

点線上でノード B の位置を変化

100m

42m

Ath0 ： 192.168.0.＊/24

Ath1 ： 192.168.1.＊/24

Ath0 ： 192.168.0.2

Ath1 ： 192.168.1.2

Ath0 ： 192.168.0.1

Ath1 ： 192.168.1.1

Node A Node B

Node PhotoNode

Field: Building

※Speed：36Mbps, Frequency：52ch(5.26GHz), Amp. output：17dBm(50mW)

W2,8F

←Scan→　　

Measurement system of communication distance

1st. version: lunch box

56

0

5

10

15

20

25

0 50 100 150 200 250

スル

ープ

ット[M

bps]

ノード間の距離[m]

金谷研アンテナ put

金谷研アンテナ get

黒アンテナ put

黒アンテナ get

Our antenna: putOur antenna: get

Conventional: getConventional: put

communication distance ＞ 200m

Measured communication distance

Thro

ugh

put [

Mbp

s]

Node distance [m]

57

9.4cm

5.8cm

A1 A2 A4A3

A5 A6 A7 A8

Antenna plate (8 antenna)

58

2nd version: Shell

200mm

@ prof. Furukawa

Antenna plate

RF module

Ant

8cm

5.5cm

48 antennas !!

59

Publications download

RFIC Japan

http://yossvr0.ed.kyushu-u.ac.jp/english/idxe.html

60

Thank you for your attention !

Any Questions or comments ?