8/11/2019 Lecture10 Power Consumption

1/14

8/11/2019 Lecture10 Power Consumption

2/14

Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Where Does Power Go in CMOS?

Dynamic Power Consumption

Short Circuit Currents

Leakage

Charging and Discharging Capacitors

Short Circuit Path between Supply Rails during Switching

Leaking diodes and transistors

8/11/2019 Lecture10 Power Consumption

3/14

Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Dynamic Power Dissipation

2

000

)( VddCdvCdtdt

dvCVdddtVddtiE

L

Vdd

outL

out

LVddVdd

Vin Vout

CL

Vdd

2)(

2

000

VddCdvvCdtv

dt

dvCdtvtiE

L

Vdd

outoutLout

out

LoutVddC

8/11/2019 Lecture10 Power Consumption

4/14

Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Dynamic Power Dissipation

Energy/transition = CL

* Vdd

2

Power = Energy/transition * f = C

L

* V

dd2

* f

Need to reduce CL

, Vdd

, and fto reduce power.

Vin Vout

CL

Vdd

Not a function of transistor sizes!

Dependence with supply voltage is quadratic !!!

8/11/2019 Lecture10 Power Consumption

5/14

Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Node Transition Activity and Power

Consider switching a CMOS gate for Nclock cycles

EN

CL

Vdd

2 n N =

n(N): the nu mber of 0->1 transition in Nclock cycles

EN

: the energy consumed for Nclock cycles

Pa vg N

limEN

N-------- f

clk= n N

N------------

N lim

CL

Vdd 2

fclk=

0 1

n N N

------------

N

lim=

Pav g

= 0 1 C L

Vdd

2 fclk

8/11/2019 Lecture10 Power Consumption

6/14

Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Vi n Vout

CL

Vdd

I VDD

(m

A)

0.15

0.10

0.05

Vin(V)5.04.03.02.01.00.0

Short Circuit Currents

I peak is a function of

transistor sizes.

It is also a strong

function of the input andoutput slopes

8/11/2019 Lecture10 Power Consumption

7/14Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Short Circuit Currents

If the output is too slow, then the P transistor is off and theres

no direct current

Vin

Vout

CL

Vdd

8/11/2019 Lecture10 Power Consumption

8/14Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Short Circuit Current

If the output is too fast, then the P transistor goes quickly to

saturation (Vds = Vcc) and power consumption is maximum

Vin

Vout

CL

Vdd

8/11/2019 Lecture10 Power Consumption

9/14Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Short Circuit Current

Graph of direct current versus

output capacitance

8/11/2019 Lecture10 Power Consumption

10/14Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Leakage

Vout

Vdd

Sub-Threshold

Current

Drain JunctionLeakage

Sub-threshold current one of most compelling issuesin low-energy circuit design!

8/11/2019 Lecture10 Power Consumption

11/14Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Reverse-Biased Diode Leakage

Np+ p

+

Reverse Leakage Current

+

-Vdd

GATE

IDL= JSA

JS = 10-100 pA/m2 at 25 deg C for 0.25m CMOS

JS doubles for every 9 deg C!

8/11/2019 Lecture10 Power Consumption

12/14Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Subthreshold Leakage Component

8/11/2019 Lecture10 Power Consumption

13/14Modified From "Digital Integrated Circuits", by J. Rabaey, A. Chandrakasan and B. Nikolic

Static Power Consumption

Vin

=5V

Vo ut

CL

Vdd

Istat

Pstat= P(In=1).Vdd. Istat

Wasted energy

Should be avoided in almost all cases,

but could help reducing energy in others (e.g. sense amps)

8/11/2019 Lecture10 Power Consumption

14/14Modified From "Digital Integrated Circuits" by J Rabaey A Chandrakasan and B Nikolic

Principles for Power Reduction

Prime choice: Reduce voltage! Recent years have seen an acceleration in supply voltage reduction

Design at very low voltages still open question (0.6 0.9 V by

2010!)

Reduce switching activity Reduce physical capacitance