MEMORY

Combinatorial Logic vs. Sequential Logic

A circuit is said to be “combinatorial” if its output is determined solely by its inputs

Such a circuit can be realized in terms of logical gates (ANDs, ORs and NOTs)

A circuit is said to be “sequential” if its output is in part determined by its history

History dependence here means bits (high or low states) that were previously stored by the circuit

If the sole purpose of the circuit is to store values, it is called memory

Reading and WritingThe action of placing a value in a memory circuit (a.k.a. a cell) is called writing

Putting a high value into a cell is referred to as “setting”Putting a low value into a cell is referred to as “resetting”

Accessing the value in a memory cell without affecting it is called readingThe CPU is the subject; the memory is the object

The CPU writes to memoryThe CPU reads from memory

ROM

Read Only Memoryas the name suggests the user only reads this type of memory; the writing is typically done by the manufacturer ROM is nonvolatile, that is, a supply of energy is not required to keep the data intact

ROM is not lost when the computer is turned off.

Using ROM

Most personal computers contain a small amount of ROM that stores critical programs such as the program that boots the computer. In addition, ROMs are used extensively in calculators and peripheral devices such as laser printers, whose fonts are often stored in ROMs.

Types of ROM

ROM: data is written by manufacturer

PROM: programmable read-only memory, data is written by user

PROMs are manufactured as blank chips on which data can be written with a special device called a PROM programmer (a.k.a. burner)

“Burning a CD”

Types of PROM

PROM usually implies “write once”

EPROM erasable programmable read only memory data can be erased and rewritten

Some use ultraviolet (UV) light, requires removing it from the computer

EEPROM, electrically erasable programmable read-only memory, is erased by electronic means

Does not have to be removed from comuter

Uses Of ROMMicrocode portion of CPU

The lowest-level instructions that directly control a microprocessor. The “plus” instruction will be stored in a program in RAM; the code that tells the hardware what to do with a plus is in ROM

Basic Input/Output System. Code burned into motherboard’s ROM; it handles interfacing between the operating system and peripherals (IO)

RAMRAM Random Access MemoryData can be accessed (read)

Sequentially: you start at the beginning and go through the sequence of locations

• Like a cassette or video tape

Randomly: you can jump to any location without proceeding through all previous locations

• Like a CD or DVD (no need for fast-forwarding, rewinding, etc.)

ROM is random access, but the term RAM refers to volatile memory, memory requiring an energy source

Types of RAM

SRAM: Static RAMThe objective of memory is to hold a value, so being static is good. The value is held without the need for “refreshing” Fast but expensive

DRAM: Dynamic RAMThe value must be “refreshed” or it will become lost or corruptedSlow but cheap

Types of DRAMSynchronous DRAM actually synchronizes itself with the CPU's bus

Deals with data in “bursts” so it doesn’t have to go through the addressing process of successive data locations

EDO (extended data out)VRAM (video) a special form of memory that allows simultaneous reads and writes.

It provides a serial read interface and a parallel write interface. The advantage of using VRAM is that it’s much faster and doesn’t require as much detection code on the part of the application or device driver

Types of DRAM (cont.)

WRAM (windows)

FPM (fast paging mode)

Rambus DRAM A type of memory that uses fast-and-thin bus interface to provide bandwidth that is double that of SDRAM.

Cache A generic term used to describe guessing what data will be used next and placing it where it can be accessed more quickly

A cache hit is a correct guessA cache miss is an incorrect guess

Memory Cache uses SRAM which is faster than DRAML1: SRAM that is right on the microprocessor chipL2: not on the chip

Cache

When writing to cache, there are different scenarios

Write back: updates cache first and memory later (faster)

Write through: updates cache and memory together (slower but maintains consistency)

Error Detection Parity

Odd parity: add an extra bit to a word and insist that the total number of 1’s be odd

Even parity, ditto but number of 1’s even

Example of odd parity

0 0 0 0 0 0 0 0 1

0 0 0 0 0 0 0 1 0

0 0 0 0 0 0 1 0 0

0 0 0 0 0 0 1 1 1

Vertical parity

0 0 0 0 0 0 0 0 1

0 1 0 1 0 0 0 1 0

0 0 0 0 0 1 1 0 1

0 1 0 1 0 0 1 1 1

0 0 1 0 0 1 0 0 1

0 0 0 0 0 1 0 1 1

0 0 0 0 0 1 1 0 1

0 0 0 0 1 1 0 1 0

1 1 0 1 0 0 0 1 1

Error Correction Code

If a parity check reveals a parity error, one can request data be resent

Error Correction Code: in addition to detecting a mistake can help fix it

Hamming code

CRC (cyclic redundancy check)

checksum

Virtual memoryWhat if there’s not enough memory for a program?The operating system has a book-keeping scheme called virtual memoryIt assigns the program virtual addressesAt any given time, only a part of the program is really in memoryThe operating system keeps track of the correspondence between virtual addresses and real addresses

Virtual memory (cont.)

As program runs different parts of the program need to be in the real memoryThe operating systems breaks the code into pieces called pagesPutting the new part of the code into real memory is called swapping or pagingSwapping is slow; it’s why adding memory might improve speed

Shadowing

Putting parts of the ROM BIOS which can be slow into RAM which can improve speed

Memory PackagingSIPP: single inline chip packages

Little circuit board with memory chipHas pins, hard to install

SIMM single inline memory module Like SIPP but no pins, easier to installa 32-bit path to the memory

DIMM dual in-line memory module, a 64-bit path

Because Pentium requires a 64-bit path to memory, you install SIMMs two at a time, but DIMMs one at a time.

Bank

The block of system memory that can be read by the CPU in a single clock cycle. The data width of a bank of memory must match that of the motherboard bus. For example, on a 64-bit Pentium motherboard, two 32-bit SIMMs compose a single bank