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Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ......

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QUIZ Name all the 4 parts of the “fetch-execute” cycle. 1
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Page 1: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

QUIZName all the 4 parts of the “fetch-execute” cycle.

1

Page 2: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Solution

Name all the 4 parts of the “fetch-execute” cycle.

2

Page 3: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Name two fundamental differences between magnetic drives and optical drives:••

3

QUIZ

Page 4: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Name two fundamental differences between magnetic drives and optical drives:• Data is stored using magnetic properties vs.

optical properties.• In a HDD, the speed of rotation is constant,

but in an optical drive rotation is faster on the inner tracks, resulting in Constant Linear Velocity (CLV)

4

Solution

Page 5: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Define Embedded Systems

5

QUIZ

Page 6: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

6

QUIZWhat are two ways to create a non-vN architecture?What are the 3 parallel architectures we covered?

Page 7: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

What are two ways to create a non-vN architecture? A: By using more than one MM, or by using more than one CPU.What are the 3 parallel architectures we covered?

7

Solution

Pipelined CPUs

Synchronous CPUs

Parallel (non-synchronous) CPUs

Page 8: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

QUIZ Pipelining

A computer pipeline has 4 processors, as shown above. Each processor takes 15 µs to execute, and each instruction must go sequentially through all 4 processors.A program has 10 instructions. Calculate how long it takes to run it:• without pipelining• with pipelining

8

Page 9: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

9

Extra-credit QUIZ

Page 10: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Low-level softwareComponents

Circuits

Gates

Transistors

Page 11: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Abstractions and more abstractions …

11You are here

Page 12: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

6.1 Computer OperationsComputer = programmable electronic device

that can store, retrieve, and process dataVon Neumann architecture:• Data and instructions to manipulate the data are

represented in the same way (binary) and are stored in the same place (memory)

• For processing, both data and

instructions have to be brought

into the CPU (fetch-execute cycle)

12

Page 13: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

6.2 Machine LanguageMachine language = The language made up of

binary coded instructions built into the hardware of a particular computer and used directly by the computer

Why would anyone use machine language?(Hint: they had no choice. Why?)

13Image source: http://www.alpcentauri.info/chapter_18.html

Page 14: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Remember: The Fetch-Execute Cycle

14

According to the CPU’s machine language

Page 15: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Characteristics of machine language:– Every processor type has its own set of specific

machine instructions– The relationship between the processor and the

instructions it can carry out is completely integrated

– Each machine-language instruction does only one very low-level task

15

Page 16: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Pep/8 Virtual Computer

Virtual computerA hypothetical machine designed to contain the

important features of a real machine

Pep/8A virtual computer designed by Stanley Warford

that has 39 machine-language instructions(We’re going to cover only a few of them!)

16

Page 17: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Extra-credit

17

Page 18: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Pep/8 Registers– The program counter (PC) (contains the address

of the next instruction to be executed)– The instruction register (IR)

(contains a copy of the instruction being executed)– The accumulator (register A)

The memory unit is made up of 65,636 Bytes of storage

18

Can you figure out how long the Pep/8 address is?

Page 19: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

QUIZ

The previous version of Pep, Pep/7, could use only 12 bits for memory addresses.

How many memory cells could Pep/7 address?

19

Page 20: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

20

Explain the address format!

16 bits

24bits

Page 21: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

21

Explain the address format!

Can you show whatinstructions look like

in memory?

Page 22: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Instruction Format

22

Page 23: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Instruction Format

Operation code, a.k.a. opcodeSpecifies which instruction is to be carried outRegister specifierSpecifies which register is to be used (only use A in

this chapter)Addressing-mode specifierSays how to interpret the operand part of the

instruction:• Direct• Immediate

23

Say that again?!?

Page 24: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Instruction Format

Addressing-mode specifierSays how to interpret the operand part of the

instruction:• Direct• Immediate

2 + 3 ImmediateA + B Direct

24

??

Page 25: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

25

Immediate and direct addressing modes

Page 26: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

QUIZ: Immediate vs. direct addressing

26

We have this Pep instruction:

SUB 30 from accumulator A

What exactly will Pep subtract?

Page 27: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

27

Solution

A: It depends on the addressing mode!• If immediate (000), then the

integer 30 goes in A.• If direct (001), then the

content of the memory address 30 goes in A.

We have this Pep instruction:

SUB 30 from accumulator A

What exactly will Pep subtract?

Page 28: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

PEP/8 machine instructions

28

Page 29: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

29

What does this instruction mean, what isits hex code, and what exactly does it do?

EOL 1

Page 30: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

QUIZ

• Name all the 4 parts of the “fetch-execute” cycle.

• What do IR, A, and PC stand for in the computer’s architecture?

• Name and explain the 2 addressing modes we’ve covered.

30

Page 31: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

31

We have this Pep instruction:

LOAD 20 (decimal) into accumulator A

What exactly will Pep load?

QUIZ: Immediate vs. direct addressing

Page 32: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

32

What does this instruction mean, what isits hex code, and what exactly does it do?

Page 33: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

33

What does this instruction mean, what isits hex code, and what exactly does it do?

Page 34: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

34

What do these instructions mean, what aretheir hex codes, and what exactly do they do?

Page 35: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Wait a second ...

35

Page 36: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

ConclusionsIt is useless to write operands into IR. IR is written only in the FETCH stage of the

Fetch-Execute cycle, when the 3 bytes of the instruction are brought from memory.

Operands can be written only to:• Accumulator• MemorySome instructions cannot have the immediate addressing mode

36

Page 37: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

37

What do these instructions mean, what aretheir hex codes, and what exactly do they do?

Page 38: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Why is there only one on this page?

What does this instruction mean, what isits hex code, and what exactly does it do?

Page 39: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

39

What do these instructions mean, what aretheir hex codes, and what exactly do they do?

Page 40: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Problem 17 / 190

40

The PEP/8 memory has the following contents:0001 A20002 110003 000004 FF

What are the contents of reg. A after this instructionis executed:

C1 00 02

The first step is …

Page 41: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Problem 17 / 190

41

The PEP/8 memory has the following contents:0001 A20002 110003 000004 FF

What are the contents of reg. A after this instructionis executed:

C1 00 02

1100 0001 0000 0000 0000 0010

Page 42: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Problem 16 / 189

42

The PEP/8 memory has the following contents:0001 A20002 110003 000004 FF

What are the contents of reg. A after this instructionis executed:

C1 00 01

Page 43: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

43

0001 A20002 110003 000004 FF

Instructionexecuted:

C1 00 01

Page 44: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

6.3 Program to write "Hello"

44

Every program ends with this!

Page 45: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Your turn!What does this program do?

1111

0000

1111

1 0000

Page 46: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

46

Steps for executing a machine-language

program

Loader

Program in

memoryExecute

Machine code

program in a file on disk

Page 47: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

SKIP Pep/8 Simulator

47

Page 48: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Fact: Writing programs in machine language sucks!

(i.e. it is time-consuming, boring, error-prone, unintuitive, etc.)

48

Page 49: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

… that’s why we invented assembly language

49

Page 50: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

6.4 Assembly Language

Assembly languageA language that uses mnemonic codes to represent machine-language instructions

AssemblerA program that reads each of the instructions in mnemonic form and translates it into the machine-language equivalent

50

Page 51: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

51

Steps for executing anassembly-language program

Loader

Program in

memoryExecute

Page 52: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Pep/8 Assembly Language

52

Opcode is 31

Opcode is 38

Opcode is 39

Opcode is 04

Page 53: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

“Hello” program in assembly

CHARO 0x0048, i ;Outputs character 'H'CHARO 0x0065, iCHARO 0x006C, iCHARO 0x006C, iCHARO 0x006F, i STOP.END

53

mnemonic operand addressing mode

comments

What in the world is this?!

Page 54: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

A New Program

54

Problem: Read and sum three values and print the sum

How would you do it by hand?

Page 55: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Declaring variables in assembly:We simply reserve space in memory for them!

55

Labels – they are just placeholders for memory addresses

Page 56: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Assembler directives, a.k.a. pseudo-ops

56

What is the difference between operations and pseudo operations?

Page 57: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Completed Program

57

sum: .WORD 0x0000num1: .BLOCK 2num2: .BLOCK 2num3: .BLOCK 2main: LDA sum,d

DECI num1,d ADDA num1,d DECI num2,d ADDA num2,d DECI num3,d ADDA num3,d STA sum,dDECO sum,dSTOP .END

Page 58: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

We have covered the beginning of section 6.4. We stopped before the sub-section A Program with Branching.

• Read the text carefully and make sure you can explain in your own words what each instruction accomplishes.

• Quick work (do in notebook for next time):16, 17, 19, 21-26

58

EoHW 2

Page 59: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Problem 33 / 191

59

The PEP/8 memory has the following program in memory (in hex):

0001 490002 000003 080004 510005 000006 080007 00

Convert the program to binary andexplain in your own words what it does.

Page 60: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Completed Program

60

sum: .WORD 0x0000num1: .BLOCK 2num2: .BLOCK 2Num3: .BLOCK 2main: LDA sum,d

DECI num1,d ADDA num1,d DECI num2,d ADDA num2,d DECI num3,d ADDA num3,d STA sum,dDECO sum,dSTOP .END

Houston, we have a problem!

How does the CPU know that the program starts here?

Page 61: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Solution: “Branch” instruction

61

BR main sum: .WORD 0x0000num1: .BLOCK 2num2: .BLOCK 2num3: .BLOCK 2main: LDA sum,d

DECI num1,d ADDA num1,d DECI num2,d ADDA num2,d DECI num3,d ADDA num3,d STA sum,d DECO sum,d STOP .END

See comments on next slide

Page 62: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

62

Completed ProgramUnconditional branch!

Page 63: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

63

Your turn! Change the program so it adds only two numbers: always 7 + 42

Page 64: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Decision-making instructions

64

BR Set PC to operand unconditionally

BRLTi Set PC to operand if A < 0

BREQi Set PC to operand if A = 0

Page 65: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Decision-making problem: Same as previous “sum” program, but print the sum only if positive or zero; if negative, print an error message

65

negMsg: CHARO 0x0045,i BR finish

main: LDA sum,d…BRLT negMsgSTA sum,dDECO sum,d

finish: STOP

What ASCII code is this?

Read and add the

numbers, as before

Page 66: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Decision making problem: Same as before, but print the sum only if positive or zero; if negative, print ‘E’ (Error)negMsg: CHARO 0x0045,i

BR finishmain: LDA sum,d

…BRLT negMsgSTA sum,dDECO sum,d

finish: STOP

How many ways are there to reach finish?

ASCII code for 'E'

Page 67: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

QUIZ: What does this program do?

67

BR maina: .BLOCK 2main: DECI a, d

LDA a, dSUBA 0x002A, iSTA a, dDECO a, dSTOP.END

Page 68: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

A: It subtracts 42 from the number entered, and displays the result.

68

BR maina: .BLOCK 2main: DECI a, d

LDA a, dSUBA 0x002A, iSTA a, dDECO a, dSTOP.END

Solution

Page 69: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

QUIZ: Write an assembly program to subtract 2010 from 4210 and put the result in memory

69

BR main sum: .WORD 0x0000num1: .BLOCK 2num2: .BLOCK 2num3: .BLOCK 2main: LDA sum,d

DECI num1,d ADDA num1,d DECI num2,d ADDA num2,d DECI num3,d ADDA num3,d STA sum,dDECO sum,dSTOP .END

Take inspiration from this previous

program:

Page 70: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Three problems for more studyWrite a PEP assembly program that adds the number 3 to a number entered by the user, and prints :• the result if equal to zero, otherwise it prints

nothing. • the result if less than zero, otherwise it prints

nothing.• the result if greater than zero, otherwise it

prints nothing.

70

Page 71: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

71

A Program with a Loop (p.174-5)

CPA must always be followed by a conditional branch!

Page 72: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

High-level software (Ch.9)

Algorithms (and data structures)

Low-level softwareComponents

Circuits

Gates

Transistors

Page 73: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

6.5 Algorithms and Pseudocode

Algorithm = A sequence of steps for solving a problem

Muḥammad ibn Mūsā al-Khwārizmī (780-850A.D.)

73

Page 74: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Remember: Decision-making instructions

74

BR Set PC to operand unconditionally

BRLTi Set PC to operand if A < 0

BREQi Set PC to operand if A = 0

Page 75: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

How to describe an algorithm in an intuitive way?

75

Flowcharts!

Not in text

We use decision-making instructions to build:• branches• loops

Page 76: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Problems with flowcharts:• They’re hard to follow when they get complex

76

Not in text

Page 77: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Problems with flowcharts:• They’re hard to follow when they get complex• They’re hard to draw in electronic documents

77

Not in text

Page 78: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

Problems with flowcharts:• They’re hard to follow when they get complex• They’re hard to draw in electronic documents

78

Not in text

Our text uses only pseudocode

Page 79: Name all the 4 parts of the “fetch-execute” cycle. · Operation code, a.k.a. opcode. ... Specifies which register is to be used (only use A in this chapter) Addressing-mode specifier.

6.5 Algorithms and PseudocodePseudocode = A mixture of English and

formatting rules to make the steps in an algorithm explicit

There are no syntax rules in pseudocode!Pseudocode is not case sensitive!

Example: Repeated-division algorithm (convert base-10 number to other bases):

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While ( the quotient is not zero )Divide the decimal number by the new baseMake the remainder the next digit to the left in the answerReplace the original decimal number with the quotient

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Pseudocode functionality

Pseudocode has all of the concepts encountered in any high-level programming language, only the syntax is informal:– Variables– Assignment– I/O– Selection / decision– Repetition / loop– Boolean expressions

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We can follow a pseudocode algorithm w/pencil & paper, a.k.a. “desk checking”

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What is 93 in base 8?93/8 gives 11 remainder 511/8 gives 1 remainder 31/ 8 gives 0 remainder 1

answer 1 3 5

While ( the quotient is not zero )Divide the decimal number by the new baseMake the remainder the next digit to the left in the answerReplace the original decimal number with

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Organizing the solution in a computer-like way gives us better idea of what is required for the computer to execute it, e.g. two numbers need to be entered, etc.

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SKIP 6.6 Testing

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Read and take notes in notebook:Bio: Konrad ZuseEthics: Software Piracy and Copyrighting

Have you every "borrowed" softwarefrom a friend?

Have you ever "lent" software to a friend?

Did you know that about 100,000 jobs arelost in the US every year due to such"borrowing" and "lending?"

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Homework - Due Thursday, Nov.1

End of chapter exercises:

• 10, 11, 12, 13, 14, 15, 18, 20– Correction in 20: use E1 instead of E0

• 27, 34– Hint for 34: machine code 31 means decimal input, DECI

• 41 - Hint: On how many bits are integers represented in Pep/8?

• 44, 45– Hint for 45: Very similar to the text program!

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All PEP instructions, with machine codes00 Stop STOP 04 Branch unconditional BR08 Branch if Less Than BRLT0A Branch if equal BREQ31 Decimal Input Direct DECI38 Decimal Output Immediate DECO39 Decimal Output Direct DECO49 Char. Input Direct CHARI 50 Char. Output Immediate CHARO51 Char. Output Direct CHARO70 Add to A Immediate ADDA71 Add to A Direct ADDA80 Subtract from A Immediate SUBA 81 Subtract from A Direct SUBAC0 Load into A Immediate LDAC1 Load into A Direct LDAE1 Store A Direct STA

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Chapter Review Questions

• List the operations that a computer can perform

• Describe the important features of the Pep/8 virtual machine

• Distinguish between immediate addressingmode and direct addressing mode

• Write a simple machine-language program• Distinguish between machine language and

assembly language

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Chapter Review Questions

• Describe the steps in creating and running an assembly-language program

• Write a simple program in assembly program• Distinguish between instructions to the

assembler (a.k.a. directives) and instructions to be translated into machine code (a.k.a. executable instructions)

• Distinguish between following an algorithm and developing one

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Chapter Review Questions

• Describe the pseudocode constructs used in expressing an algorithm

• Use pseudocode to express and algorithm• Distinguish between black-box and clear-box

testing

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