APPLICATION NOTE

U-136A

PHASE SHIFTED, ZERO VOLTAGE TRANSITIONDESIGN CONSIDERATIONS and the

UC3875 PWM CONTROLLER

BILL ANDREYCAK

ABSTRACT

This Application Note will highlight the design considerations incurred in a high frequency power supply us-ing the Phase Shifted Resonant PWM control technique. An overview of this switching technique includingcomparisons to existing fixed frequency non-resonant and variable frequency Zero Voltage Switching is in-cluded. Numerous design equations and associated voltage, current and timing waveforms supporting thistechnique will be highlighted. A general purpose Phase Shifted converter design guide and procedure willbe introduced to assist in weighing the various design tradeoffs. An experimental 500 Watt, 48 volt at 10.5amp power supply design operating from a preregulated 400 volt DC input will be presented as an exam-ple. Considerations will be given to the details of the magnetic, power switching and control circuitry areas.A summary of comparative advantages, differences and tradeoffs to other conversion alternatives is in-cluded.

UC3875 CONTROL CIRCUIT SCHEMATIC

Figure 1

SLUA107 - May 1997

INTRODUCTION

The merits of lossless transitions using Zero Volt-age Switching techniques have already been es-tablished in power management applications. [1-5]Effects of the parasitic circuit elements are usedadvantageously to facilitate the resonant transitionsas opposed to being dissipatively snubbed. Thisresonant tank functions to position zero voltageacross the switching device prior to turn-on, elimi-nating any power loss due to the simultaneousoverlap of switch current and voltage at each tran-sition. High frequency converters operating fromhigh voltage input sources stand to gain significantimprovements in efficiency with this technique. Thefull bridge topology as shown in figure 2. will be thespecific focus of this presentation, with an empha-sis placed on the fixed frequency, phase shiftedmode of operation.

SWITCH DRIVE COMMANDS

The diagonal bridge switches are driven together ina conventional full bridge converter which alter-nately places the transformer primary across theinput supply, Vin, for some period of time, t(on) asshown in figure 3.

Power is only transferred to the output section dur-ing the ON times of the switches which corre-sponds to a specific duty cycle when operated atfixed frequency. Additionally, the complete range ofrequired duty cycles is unique to the application,and can be estimated from the power supply inputand output voltage specifications.

Rather than driving both of the diagonal full bridgeswitches together, a deliberate delay will be intro-duced between their turn-on commands with thePhase Shifted approach. This delay will be ad-justed by the voltage loop of the control circuitry,and essentially results as a phase shift betweenthe two drive signals. The effective duty cycle iscontrolled by varying the phase shift between theswitch drive commands as shown in figure 4.

Unique to this Phase Shifted technique, two of theswitches in series with the transformer can be ON,yet the applied voltage to the transformer is zero.These are not diagonal switches of the full bridgeconverter, but either the two upper or two lowerswitches. In this mode the transformer primary isessentially short circuited and clamped to the re-spective input rail. Primary current is maintained atits previous state since there is no voltage availablefor reset to take place. This deadband fills the voidbetween the resonant transitions and power trans-fer portion of the conversion cycle. Switches can beheld in this state for a certain period of time whichcorresponds to the required off time for that par-ticular switching cycle.

When the correct one of these switches is laterturned off, the primary current flows into the switchoutput capacitance (Coss) causing the switch drainvoltage to resonate to the opposite input rail. Thisaligns the opposite switch of the particular bridge“leg” with zero voltage across it enabling Zero Volt-age Switching upon its turn ON.

Full Bridge Topology - General Circuit

Figure 2

Figure 3

Conventional Full Bridge PWM Waveforms

APPLICATION NOTE U-136A

2

ZVS FUNDAMENTALS

An intentional dead-time can be introduced in thepower conversion cycle whereby the switch re-mains off and is clamped at zero voltage by theresonant tank. Rather then turn the switch on in-stantly when zero voltage is attained, the switch isheld off while the primary current circulates into theshorted primary through the body diode and theopposite leg switch, which is still on. This off time isused to fill in the voids between the point wherezero voltage has been reached where the switchneeds to turned on to achieve fixed frequency op-eration.

Fixed frequency operation is obtainable over anidentified range of input voltages and output cur-rents. For reference purposes, the variable fre-quency ZVS technique has similar limitations forproper operation which occur at minimum outputload and maximum input line as shown in figure 5.

Phase Shifted PWM Control Waveforms

Figure 4

Figure 5

APPLICATION NOTE U-136A

3

PHASE SHIFTED FUNDAMENTALS

Switches within the Phase Shifted full bridge con-verter will be utilized differently than those of itsnonresonant counterpart. Instrumental to this tech-nique is the use of the parasitic elements of theMOSFET switch’s constructuin. The internal bodydiode and output capacitance (Coss) of each de-vice (in conjunction with the primary current) be-come the principal components used to accomplishand commutate the resonant transitions.

CIRCUIT SCHEMATIC AND DESCRIPTION

Detailed operation of the Phase Shifted Converteroperation will begin following a description of thecircuit elements. The circuit schematic of this tech-nique is shown in figure 7. including voltage andcurrent designations.

The basic circuit is comprised of four switches la-beled QA through QD and is divided up into two“legs”, the right and left hand legs. Each switch isshown shunted by its body diode (DA through DD)and parasitic output capacitance, (CA through CD).These have been identified separately to clarify theexact elements and current paths during the con-version interval.

A detailed model of the transformer primary sectionis presented which separately indicates the leak-

age and magnetizing inductances and currents ofthe primary. The reflected secondary contributorsto primary current are also shown for complete-ness, and divided into two components. The DCprimary current (IP) is the secondary DC outputcurrent divided by the transformer turns ratio (N).The secondary AC current should also accountedfor by multiplying the output inductance by theturns ratio squared (N^2), or dividing the secon-dary AC ripple current Isec(ac) by the turns ratio(N) as shown in figure 8.

ZVS Limitations

Figure 6

Figure 7

Phase Shifted PWM Switch Orientation

Primary Magnetic Components

Figure 8

APPLICATION NOTE U-136A

4

INITIAL CONDITIONS : t = t(0)

The description of the Phase Shifted operation willbegin with the conclusion of one power transfer cy-cle. This occurs when the transformer had beendelivering power to the load and two of diagonalswitches of the converter were conducting. The in-itial current flowing in the primary can be desig-nated as Ip(t(0)).

RIGHT LEG RESONANT TRANSITION : INTER-VAL: t(0) <t <t(1)

The primary current flowing at time t(0) is equal toIp(t(0)) and was being conducted through the di-agonal set of transistors QA in the upper left handcorner of the bridge and transistor QD in the lowerright. Instantly, at time t(0) switch QD is turned offby the control circuitry which begins the resonanttransition of the right hand leg of the converter.

The primary current flowing is maintained nearlyconstant at Ip(t(0)) by the resonant inductance(Lp(res)) of the primary circuit, often referred to asthe transformers leakage inductance. Since an ex-ternal series inductance can be added to alter the

effective leakage inductance value, this presenta-tion will refer to the lumped sum of these inductorsas the resonant inductance, Lr. In a practical appli-cation it may be difficult to accurately control thetransformers leakage inductance within an accept-able ZVS range, necessitating an external “shim”inductor to control the accuracy. It’s also possiblethat the transformer leakage inductance can be toolow to provide the desired transition times for theapplication so an external inductor can be intro-duced to modify the resonant inductance.

With switch QD turned off, the primary current con-tinues to flow using the switch output capacitance,Coss to provide the path. This charges the switchcapacitance of QD from essentially zero volts tothe upper voltage rail, Vin+. Simultaneously, thetransformer capacitance (Cxfmr) and the outputcapacitance of switch QC is discharged as itssource voltage rises from the lower to the upperrail voltage. This resonant transition positionsswitch QC with no drain to source voltage prior toturn-on and facilitates lossless, zero voltageswitching.

Figure 9

Figure 10

APPLICATION NOTE U-136A

5

The primary current causing this right leg transitioncan be approximated by the full load primary cur-rent of IP(t(0)). The small change due to the barelyresonant circuit contribution is assumed to be neg-ligible in comparison to the magnitude of the fullload current.

During this right leg transition the voltage acrossthe transformers primary has decreased fom Vin tozero. At some point in the transition the primaryvoltage drops below the reflected secondary volt-age, Vout*N. When this occurs the primary is nolonger supplying full power to the secondary andthe output inductor voltage changes polarity. Simul-taneously, energy stored in the output choke be-gins supplementing the decaying primary poweruntil the primary contribution finally reaches zero.

Once the right leg transition has been completedthere is no voltage across the transformer primary.Likewise, there is no voltage across the transform-ers secondary winding and no power transferred,assuming ideal conditions. Note that the resonanttransition not only defines the rate of change in pri-mary and secondary voltages dV/dt, but also therate of change in current in the output filter net-work, dI/dt.

CLAMPED FREEWHEELING INTERVALTime t(1) <t <t(2)

Once the right leg transition is complete the pri-mary current free wheels through transistor QAand the body diode of switch QC. The currentwould remain constant until the next transition oc-curs assuming that the components were ideal.Switch QC can be turned on at this time whichshunts the body diode with the FET Rds(on) switchimpedance thus lowering conduction losses. Al-though current is flowing opposite to the normalconvention (source to drain) the channel of QC willconduct and divide the current between the switchand body diode.

LEFT LEG TRANSITION :Time t(2) <t <t(3)

At time t(2) a residual current was flowing in theprimary of the transformer which is slightly lessthan IP(t(0)) due to losses. Switch QC has been

previously turned ON and switch QA will now beturned OFF. The primary current will continue to

flow but the path has changed to the output capaci-tance (Coss) of switch QA instead of its channel.The direction of current flowing causes the drain tosource voltage of switch QA to increase and lowersits source from the upper to lower rail voltage. Justthe opposite conditions have occurred to switch QBwhich previously had the full input across its termi-nals. The resonant transition now aligns switch QBwith zero voltage across it, enabling losslessswitching to occur.

Primary current continues to flow and is clampedby the body diode of switch QB, which is still OFF.This clamping into a short circuit is a necessarycondition for fixed frequency, zero voltage switch-ing. Once switch QB is turned ON, the transformerprimary is placed across the input supply railssince switch QC is already ON and will begin totransfer power. Although zero voltage switching hasalready been established, turning ON switch QBthe instant it reaches zero voltage will cause vari-able frequency operation.

Figure 11

APPLICATION NOTE U-136A

6

Note that this left leg transition will require moretime to complete than the right leg transition. Con-duction losses in the primary switches, transformerwinding and interconnections result in a net DCvoltage drop due to the flowing primary current. En-ergy stored in the series resonant inductor andmagnetizing inductance is no longer ideallyclamped to zero voltage. This loss, in addition tothe losses incurred during the previous transition,reduce the primary current below its initial (IP(t(0))value, thus causing a longer left leg transition timethan the right leg.

Unlike conventional power conversion, one transis-tor in the diagonal pair of the phase shifted fullbridge converter is ON just before power is trans-ferred which simplifies the gate drive. An additionalbenefit is realized by designating these commutat-ing switches as the high side switches of the con-verter, usually far more difficult to drive than theirlower side counterparts.

POWER TRANSFER INTERVALTime t(3) <t <t(4)

This interval of the phase shifted cycle is basicallyidentical to that of conventional square wave powerconvesion. Two diagonal switches are ON whichapplies the full input voltage across the transformerprimary. Current rises at a rate determined by Vinand the series primary inductance, however startsat a negative value as opposed to zero. The currentwill increase to a DC level equal to the output cur-rent divided by the turns ratio, Iout/N. The two timevariant contributors to primary current are the mag-netizing current (Imag) and the output inductormagnetizing contribution reflected to the primary,Lout/N^2. The exact switch ON time is a function ofVin, Vout and N the transformer turns ratio, just aswith conventional converters.

Figure 12

Figure 13

APPLICATION NOTE U-136A

7

SWITCH TURN OFF;TIME t(4)

One switching cycle is concluded at time t(4) whenQC the upper right hand corner switch is turnedOFF. Current stops flowing in QC’s semiconductorchannel but continues through the parasitic outputcapacitance, Coss. This increases the drain-to-source voltage from essentially zero to the full inputsupply voltage, Vin. The output capacitance of thelower switch in the left hand leg (QD) is simultane-ously discharged via the primary current. TransistorQD is then optimally positioned for zero voltageswitching with no drain-to-source voltage.

The current during this interval is assumed to beconstant, simplifying the analysis. In actuality, it isslightly resonant as mentioned in the right leg tran-sition, but the amplitude is negligible in comparisonto the full load current. The power conversion inter-val is concluded at this point and an identicalanalysis occurs as for the opposite diagonal switchset which has thoroughly been described for theswitch set QA and QD.

OPERATIONAL WAVE FORMS

RESONANT TANK CONSIDERATIONS

The design of the resonant tank begins with the se-lection of an acceptable switching frequency; oneselected to meet the required power density. Sec-ond, the maximum transition time must also be es-tablished based on achievable duty cycles under alloperating conditions. Experience may provide thebest insight for acceptable results.

The maximum transition time will occur duringthe converters left leg transition operating atthe minimum output load current.

RESONANT CIRCUIT LIMITATIONS

Two conditions must be met by the resonant circuitat light load, and both relate to the energy stored inthe resonant inductor. One, there must be enoughinductive energy stored to drive the resonant ca-pacitors to the opposite supply rail. Two, this transi-tion must be accomplished within the allocatedtransition time. Lossy, non-zero voltage switchingwill result if either, or both are violated. The firstcondition will always be met when the latter is usedas the resonant circuit limitation.

Designers can argue that some switching loss maybe of little consequence in a practical application atvery light loads - especially considering that thereis a significant benefit at heavy loads. While thismay be a pragmatic approach in many applica-tions, and a valid concern, this presentation willcontinue using the fully lossless mode as the ulti-mate design goal.

The stored inductive energy requirement andspecified maximum transition time have also de-fined the resonant frequency (Wr) of the tank cir-cuit. Elements of this tank are the the resonantinductor (Lr) and capacitor (Cr), formed by the twoswitch output capacitors, also in parallel with thetransformer primary capacitance Cxfmr. The maxi-mum transition time cannot exceed one-fourth ofthe self resonant period, (four times the self reso-nant frequency) to satisfy the zero voltage switch-ing condition.

The resonant tank frequency, Wr :

Wr = 1

( Lr × Cr ) ^ 0.5

t(max) transition = π

2 × Wr

Coss, the specified MOSFET switch output capaci-tance will be multiplied by a 4/3 factor to accommo-date the increase caused by high voltageoperation. During each transition, two switch ca-pacitances are driven in parallel, doubling the totalcapacitance to 8/3 * Coss. Transformer capacitance(Cxfmr) must also be added as it is NOT negligiblein many high frequency applications.

Figure 14

APPLICATION NOTE U-136A

8

The resonant capacitance, Cr :

Cr = [ ( 83

Coss)+ Cxfmr ]

The capacitive energy required to complete thetransition , W(Cr) is:

W ( Cr ) = 12

× Cr × VPri^2

This energy can also be expressed as:

W ( Cr ) = [ ( 43

× Coss ) + Cxfmr ] × Vin^2

STORED INDUCTIVE ENERGY

The energy stored in the resonant inductance mustbe greater than the energy required to charge anddischarge the FET output and transformer capaci-tances of the leg in transition within the maximumtransition time.

Inside the transformer, all of the energy is stored inthe leakage inductance since the secondary cur-rent has clamped the transformers primary voltageto essentially zero. This causes high circulating pri-mary current (as shown in figure 8) in the physicalwinding but has no effect on the stored energyused to perform the ZVS transition. More detailabout the tradeoffs and design optimization is pre-sented in the Design Procedure.

The energy stored in the resonant inductor, Lr:

W(Lr) = 12

x Lr x Ipri ^2

RESONANT CIRCUIT SUMMARY

There are several ways to arrive at the solutions forthe resonant inductor value and minimum primarycurrent required for any application. Each of theseis based upon the following fundamental relation-ships.

The resonant tank frequency must be at least fourtimes higher than the transition time to fully reso-nate within the maximum transition time t(max) atlight load.

Tres = 4 × t ( max )

Fres = 1

T ( res ) or

where Wr = 2 × π × Fres

Wr = 2 × π

T ( res )

Reorganizing and combining these relationships;

Wr =

( 2 × π )( 4 × t ( max ) )

Wr = π( 2 × t ( max ) )

The resonant radian frequency (Wr) is related tothe resonant components by the equation:

Wr = 1

( Lr × Cr ) ^2

Both sides of this can be squared to simplify thecalculations and reorganized to solve for the exactresonant inductor value.

Lr = 1

( Wr^2 × Cr )

Previously outlined relationships for Wr and Cr canbe introduced to result in the following specificequation.

Lr = 1

π(2 × t ( max )

^2 ×

( 8

3 × Coss)+Cxfmr

Note that this figure indicates the exact resonantinductor value required to satisfy only the task ofresonant transitions. This resonant inductor is inseries with the transformer primary hence also de-fines the maximum primary current slew rate, dI/dtas a function of input voltage.

d IPridt

= VinLr

If the resonant inductor value is too large it maytake too long to reach the necessary load currentwithin the conversion cycle. The calculated inductorvalue satisfies the light load condition, however fullload operation must also be evaluated. Details ofpossible solutions to this are highlighted in thePractical Applications section of this paper.

STORED ENERGY REQUIREMENTS

As detailed, the energy stored in the resonant in-ductor must be greater than the capacitive energyrequired for the transition to occur within the allo-cated transition time. The governing equations aresummarized below.

12

× Lr × IPri ( min ) ^2 > 12

× Cr × Vin ( max ) ^2, or

Lr × IPri (min) ^ 2 > Cr × Vin ( max ) ^ 2

Since Cr and Vin are known or can be estimatedfor a given application, this term becomes a con-stant and Lr has been quantified.

APPLICATION NOTE U-136A

9

MINIMUM PRIMARY CURRENT

The minimum primary current required for thephase shifted application can now be determinedby reorganizing the previous equation.

IPri ( min ) =

( Cr × Vin^2 )Lr

^0.5

This value can be supported by the calculating theaverage current required to slew the resonant ca-pacitor to the full rail voltage. Although this figurewill be lower that IP(min) it can be used as a confir-mation of the mathematics.

IR ( average ) = Cr × Vin

t ( max )

Obtaining the necessary amount of primary currentcan be done in several ways. The most direct ap-proach is to simply limit the minimum load currentto the appropriate level. One alternative, however,is to design the transformer magnetizing induc-tance accordingly. Also assisting the magnetizingcurrent is the reflected secondary inductor currentcontribution which is modeled in parallel. Any dutycycle variations modifying the peak charging cur-rent must also be taken into account.

Generally the magnetizing current alone is insuffi-cient in many off-line high frequency converters.The transformer is usually cores loss limited whichmeans numerous primary turns and a high mag-

netizing inductance. Shunting the transformer pri-mary with an external inductor to develop the rightamount of primary current is one possibility. Incor-porating the output filter inductor magnetizing cur-rent to assist resonance on the primary side is alsoan alternative.

PHASE SHIFTED PWM CONTROL CIRCUITRY

Probably the most critical control aspect in thephase shifted PWM technique is the ability to spanthe full 0 to 180 degree phase shift range. Fallingshort of performance on either end of the spectrumcan place unnecessary burdens on the fault pro-tection circuitry or primary switches. Loss of controlat either extreme will result in catastrophic conse-quences by simultaneously turning on both transis-tors in a given “leg” of the converter. The UC3875Phase Shifted controller features the required cir-cuitry to deliver both zero and effectively full dutycycle - effortlessly. Additionally, the UC3875 con-troller is utilized to perform the necessary control,decoding, protection and drive functions for this ap-plication. Peak current mode control is imple-mented for this example although the IC is equallysuited for conventional voltage mode control, withor without input voltage feed forward. When used incurrent mode, the IC accepts a zero to 2.7 volt am-plitude maximum current senses input and makesadding slope compensation a simple function.

UC3875 Block Diagram

Figure 16

APPLICATION NOTE U-136A

10

UNITRODE UC3875 PHASE SHIFTED PWMCONTROL IC - BLOCK DIAGRAM

A synchronizable oscillator is programmed by a re-sistor capacitor network from the frequency set pinto ground. Synchronization is performed by drivingthe SYNC pin from another UC3875 or external cir-cuitry. The precision 5.0 volt bandgap reference isavailable to program the noninverting input of theerror amplifier as well as optional external func-tions. Output regulation is achieved using the 7MHz gain-band width on-board error amplifierwhich feeds the high speed PWM circuitry. Softstarting is accomplished with a capacitor to groundwhich gradually increases the error amplifier out-put, corresponding to pulse width, phase shift orpeak current, depending on the exact implementa-tion. This signal is compared to the Ramp input ofthe IC having a usable input range from zero to 2.7volts.

Delays between the output drive commands to fa-cilitate Zero Voltage Switching are programmed atthe Delay Set inputs. One unique feature of theUC3875 is the ability to separately program the A-B output delays differently from the C-D outputs.This capability accommodates the different primarycurrents during one switching cycle which causeand result in different resonant transition times be-tween the leading and falling edges. Inability to pro-gram each of these durations will generally resultin lossy, non-zero voltage switching of the fullbridge converters switches under some operatingconditions.

The four UC3875 output totem poles can each de-liver a two amp peak gate drive current, more thanadequate in a high frequency transformer coupledgate drive application. To minimize noise transmit-ted back to the analog circuitry, the output sectionfeatures its own collector power supply (Vc) andground (PGND) connections. Local decoupling ca-pacitors and series impedance to the auxiliary sup-ply further enhances performance.

Fault protection is established by the programma-ble current limit circuitry. Full cycle restart corre-sponding to the time programmed by the soft startinterval minimizes power dissipation in a short cir-cuited output.

TYPICAL APPLICATION CIRCUIT SCHEMATICSUMMARY

The fixed frequency phase shifted control tech-nique of the full bridge converter offers numerousperformance advantages over the conventional ap-proach. switching losses due to the simultaneousoverlapof voltage and current disappear along withthe dissipative discharge of the FET output capaci-tance. EMI/RFI is significantly lower, also due tothe "soft" switching characteristics which incorpo-rate parasitic elements of the power stage acvanta-geously. For most applications, there is little reasonto consider the traditional square wave counterpartof theis phase shifted PWM technique for futuredesigns.

Very high frequency operation of this technique,beyond 500 KHz, is probable above the optimal op-erating point. Transition times quickly erode the us-able duty cycle to a point where the transformerturns ratio has been compromised. This could re-sult in unreasonably high primary currents and re-power loss in the switches. Any incremental gainsin cost or power density by reducting the size ofthe output filter are probably nullified by the needsfor larger MOSFETs and heatsinks. This phaseshifted PWM technique does excel in the overallmajority of mid to high power, off-line applications.Peak efficiency will be obtained in applications withmoderate load ranges, however excellent resultscan also be obtained in most designs with loadranges of ten-to one. A subgroup of applicationsmay exist where non ZVS operation extremely lightloads is acceptable, especially when the advan-tages under all other operating conditions are con-sidered. Additionally, the Unitrode UC3875 PhaseShifted Controlller IC has been introduced to sim-plify the control circuit design challenge. Featuresof the UC3875 include 2 MHz operation and four 2amp peak totem-pole output drivers for high fre-quency applications. Separate programming of thedifferent AD and BC leg transition intervals hasmade available to optimize converter performance.

Finally, the flexible control logic permits currentmode or voltage mode control, with or without inputvoltage feed forward. The complexity of control,drive and protection of the fixed frequency phaseshifted converter has been fully addressed in a sin-gle integrated solution.

APPLICATION NOTE U-136A

11

Figure 17

Figure 18

UC 3875 Phase Shifted PWM ConverterControl and Drive Circuit Schematic

UC3875 Phase Shifted PWM ConverterControl and Output Circuit Schematic

APPLICATION NOTE U-136A

12

UC3875 F.B.P.S. CONVERTER

LIST OF MATERIALS

CAPACITORS

All are 20 VDC Ceramic Monolithic or Mul-tilayer UNLESS "*" indicated.

C1= 1 µFC2= 47 µF/25V ELECTROLYTICC3= 1 µFC4= 1 µFC5= 75 pF/16V POLYSTYRENEC6= 0.001 µFC7, 8= 0.01 µFC9= 470 pFC10= 0.1 µFC11= 1 µF/450VDC POLYC12= 47µ/450VDC ELECTROLYTICC13= 1.2µF/450 VDC POLYC14= 1µF/100VDCC15, 16= 220µF/63VDC ELECTROLITICC17= TBDC18= 1µFC19= 22 µF/25VDC ELECTROLITICC20= 1 µFC21= 2.7 nF/200V POLY/low ESL&ESR

DIODESD1-8= 1N5820 3A/20V SCHOTTKYD9-12= 1N4148D13= 12V 3W ZENERD14, 15= 15A/200V FAST RECOVERY

INDUCTORSL1= 47µH/3AL2= 100µH/15A

MOSFET TRANSISTORSQA-D=IRF840 NMOS

Bill Andreycak / UICC2/24/93

RESISTORS

All are 1/2 Watt, 1%, Metal Film UNLESS"*" indicated

R1= 75KR2= 2KR3= 3KR4= 470 OhmR5= 3KR6= 100 OhmR7, 8= 6.8KR9= 43KR10= 150KR11, 12= 10 OhmR13= 20 OhmR14-17= 10KR18= 3.6K, 1WATTR19= 36KR20= 1KR21= TBDR22= TBDR23= 110 Ohms/5W Carbon

TRANSFORMERT1= 1 SENSET2, 3= GATE DRIVERST4= MAIN XFMR

INTEGRATED CIRCUITSU1= UC3875 PMWU2= OPTOU3= UC19432

APPLICATION NOTE U-136A

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REFERENCES

1. STEIGERWALD, R. and NGO, K; “Full BridgeLossless Switching Converter”; United States Pat-ent #4,864,479

2. DALAL, D.; “A 500 KHz Multi-Output Converterrogrammed by theft start interval minimizes powerdissipation in twith Zero Voltage Switching”; IEEE1990

3. FISHER, NGO and KUO; “A 500 KHz, 250 WDC-DC Converter with Multiple Outputs COntrolledby Phase SHifted PWM and Magnetic Amplifiers ”HFPC 1988"; HFPC 1988

4. ANDREYCAK, W. “Zero Voltage Switching Reso-nant Power Conversion”; UNITRODE Power Sup-ply Design Seminar SEM-700, 1990

5. MWEENE, WRIGHT and SCHLECHT, “A 1 KW,500 KHz Front-End Converter for a DistributedPower Supply System”; IEEE 1989

6. ANDREYCAK, W. “Controlling Zero VoltageSwitched Power Supplies”; HFPC Proceedings1990

7. SABATE′, VLATKOVIC′, RIDLEY, LEE and CHO;“Design Considerations for High Voltage, HighPower, Full Bridge, Zero Voltage Switched PWMConverter; IEEE APEC 1990

8. LOFTI, SABATE′, and LEE; “Design Optimizationof the Zero VOltage Switched PWM Converter”;VPEC Seminar 1990

9. CHEN, LOFTI and LEE; “Design Tradeoffs in 5VOutput Off-line ZVS PWM Converters”; Proceed-ings of the International Telecommunications En-ergy Conference; Kyoto, Japan 1991

ACKNOWLEDGMENTS

This Application Note is an edited version of a pa-per presented at the 1992 High Frequency PowerConference sponsored by Intertec Communica-tions and was first published in the ConferenceProceedings.

The author acknowledges and appreciates the as-sistance of John A. O’Connor during the course ofthis project.

The works of the individuals listed in the referencesincluding Dr. Fred Lee from Virginia Power Elec-tronics Center at Virginia Tech. are applauded.

Figure 19

Figure 20

Figure 21

VA 100V/Div

IPRI2A/Div

VB

100V/Div

One Switching Cycle

IDOUT10A/Div

∆VOUT100mV/Div

VSEC50V/Div

VA100V/Div

IPRI2A/Div

VB100V/Div

Primary Waveforms

Secondary Waveforms

APPLICATION NOTE U-136A

UNITRODE CORPORATION7 CONTINENTAL BLVD. • MERRIMACK, NH 03054TEL. (603) 424-2410 • FAX (603) 424-3460

14

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