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Arya college of engg.& res. Center a seminar on
case study of altera stratix
BY:- Submitted to:- Tejpal singh Sushma mamVedika sharma ( assist. Prof. electronics )Surbhi narula acerc,kukasTarun kaushikSwaraj singh gour
04/07/2023
10:24 PM
man
-tan
04/07/2023 10:24 PM man-tan
Altera corporation of America is producing wide range of FPGAs to meet different requirements.
The stratix series of FPGAs started in 2002 with the intro. Of stratix family.
Here we discuss about stratix-II family of FPGAs.
04/07/2023 10:24 PM man-tan
The main building blocks in stratix devices are following:-
1) Logic array blocks(LABs)2) Memory blocks3) Digital signal processing(DSP)
blocks4) Input/output elements(IOEs)5) interconnects
04/07/2023 10:24 PM man-tan
1) Logic array block(LAB)
Each LAB contains eight adaptive logic modules(ALMs).
• An ALM is the basic building block of logic for efficient implementation of user logic function.
LABs are grouped into rows and columns across the device.
• Multiple LABs are linked together via the global row and columns interconnects.
man-tan
04/07/2023 10:24 PM man-tan
Logic array block
man-tan
04/07/2023 10:24 PM man-tan
Adaptive logic modules(ALMs)
Each ALM contains a Varity of look-up table(LUT) based
resources that can be divided between two adaptive LUTs
ALUTs.
In addition to the two ALUTs ,each ALM contains two programmable register two dedicated full adder, a carry chain, a shared arithmetic
chain and a register chain.
Each ALM has two sets of
outputs(combinational and registered)
that drives the global and local
routing resources.
The two sets of output are
independent.man-tan
04/07/2023 10:24 PM man-tan
Adaptive logic modules
04/07/2023 10:24 PM man-tan
Operating modes of ALM:-
Normal mode
Extended LUT mode
Arithmetic mode
Shared arithmetic
mode
04/07/2023 10:24 PM man-tan
Normal mode:-
• Eight data inputs from the LAB local interconnect are inputs to the combinational logic.
Extended LUT mode:-
• To implement a specific set of seven-input functions.•The set must be a 2-to-1 multiplexer fed by two arbitrary 5-inputs functions sharing 4- inputs.
Arithmetic mode:-• Arithmetic mode is ideal for implementing adder, counter, accumulators, wide parity functions, comparators.
• It uses two full adder.
Shared arithmetic mode:-
•In this mode, ALM is configured with 4-inputs LUTs.•Each LUT either computes the sum of 3 inputs or the carry of three inputs.•The o/p of carry computation is fed to next adder using a dedicated connection called the shared arithmetic chain.
04/07/2023 10:24 PM man-tan
2) Memory blocks
Types of memory blocks:- M512 RAM,M4k RAM and M-
RAM(mega RAM) blocks.
A single M-RAM can be configured as a maximum 144-bit wide dedicated dual port, simple dual or single port memory which can operate at 269 MHz
04/07/2023 10:24 PM man-tan
3).DSP Blocks
Those are dedicated stratix resources which
are vertically arranged into two columns in each
device.
It can be configured into either eight
9*9 bit multiplier, four 18*18 bit
multiplier or one full 36*36 multiplier.
DDP blocks also contains
18U18 bit shift register.
04/07/2023 10:24 PM man-tan
4). Input/output Elements
Large number of IOEs can be
located at the end of LAB row or
column around the periphery of a stratix device.
Each stratix input/output in is fed
by input/output element and support several single-ended
and differential input/output standards.
04/07/2023 10:24 PM man-tan
5). Interconnects
A single LE can drive 30 other Les through locally available fast
and direct link interconnects.
A direct link is also used by
adjacent LABs, memory and DSP block to
drive LABs local interconnects.
The availability of direct links
helps in reducing row and column
interconnects resulting on
higher performance and flexibility.
man-tan
Thank
you04/07/2023 10:24 PM man-tan