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Field Programmable Gate Array
The Field-Programmable Gate Arrays(FPGAs) provide the benefits of customCMOS VLSI, while avoiding the initial cost,
time delay. FPGA consists of basically an array of logic
blocks and routing channels.
The FPGA has three major configurableelements: configurable logic blocks (CLBs),input/output blocks, and interconnects.
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Field Programmable Gate Array
ASIC gives high performance at cost of inflexibility.
Processor is very flexible but not tuned to the application.
Reconfigurable hardware is a nice compromise
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Meaning of Field Programmable
Field Programmable means that the FPGA's function is defined by auser's program rather than by the manufacturer of the device.
A typical integrated circuit performs a particular function defined atthe time of manufacture.
In contrast, the FPGA's function is defined by a program written bysomeone other than the device manufacturer.
Depending on the particular device, the program is either 'burned'
in permanently or semi-permanently as part of a board assemblyprocess, or is loaded from an external memory each time thedevice is powered up.
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How are FPGA programs created?
Individually defining the many switch connections and cell logic functionswould be a daunting task.
Fortunately, this task is handled by special software.
The software translates a user's schematic diagrams or textual hardwaredescription language code then places and routes the translated design.
Most of the software packages have hooks to allow the user to influenceimplementation, placement and routing to obtain better performance andutilization of the device.
Libraries of more complex function macros (eg. adders) further simplifythe design process by providing common circuits that are alreadyoptimized for speed or area.
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FPGA Basics
The FPGAs are customized by loading
configuration data into the internal memory
cells.
Based on placement of logic blocks FPGAsare
classified into 4 categories viz. symmetrical
array, row-based, hierarchical PLD, and sea-of-
gates
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FPGA Architecture
Input/
Output
Blocks
IOBs
ConfigureLogic Blocks
(CLB)
Interconnects
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Interconnects
Whenever a vertical and a horizontal channel intersect, there is a switch box.
The pattern, or topology, of switches used in this architecture is the planar or
domain-based switch box topology. In this switch box topology, a wire in track
number one connects only to wires in track number one in adjacent channel
segments, wires in track number 2 connect only to other wires in track number 2
and so on.
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Interconnects
More detailed View
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Detailed ViewInterconnects
More detailed View
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FPGA Technology
Based on the technology used for the routing
of the logic blocks FPGA are divided into 4
classes.
They are viz. Static RAM based, Antifuse
based, EPROM based and FLASH based.
Re-programmability, Speed, Density, Costdepends on the technology used in the FPGA.
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Application of FPGA
FPGAs have gained rapid acceptance and growth over the past decade
because they can be applied to a very wide range of applications. A list of
typical applications includes: random logic, integrating multiple SPLDs,
device controllers, communication encoding and filtering, small to
medium sized systems with SRAM blocks, and many more.
Other interesting applications of FPGAs are prototyping of designs later to
be implemented in gate arrays, and also emulation of entire large
hardware systems. The former of these applications might be possible
using only a single large FPGA (which corresponds to a small Gate Array in
terms of capacity).
Another promising area for FPGA application, which is only beginning to
be developed, is the usage of FPGAs as custom computing machines.
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Advantages of Reconfiguration
The hardware can changed as easily assoftware.
Design updates are easy, can be made to
product already on field. Can be reconfigured dynamically to perform
different function at different times.
Multipurpose hardware. Simplifies hardware design and debugging.
Reduce time to market.
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Disadvantages of Reconfiguration
The programmability causes reduction in
speed.
Require more silicon. Less amount of logic in a
given area.
Costly.
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Selecting FPGA
Gate Count
Number of I/O Pins
Cost per chip Available Tools
Performance
Power Consumption Packaging
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FPGA Vs CPLD
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How Do you Program CPLD FPGA?
Schematic Entry Hardware Description Lang
VHDL
Verylog HDL
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Thanks
