s s Lal Mini Project

8/12/2019 s s Lal Mini Project

1/105


2/105

Power Theft Identification System In

Distribution Lines Using DifferentialPower Measurement

Mini Project re%ort submitted in %artial &ul&illment o& the reuirement &or

the

Aard o& the De"ree o& 7.ech

7y

S.sathishlal (10D11A0236)

Ainash !umar sin"h (10D11A02#1)

De%artment o& lectronic and lectrical n"ineerin"

** +,-+*-+, /,

(A&&iliated to aaharlal +ehru echnolo"ical $niersity)

yderabad4#02301

5ear' 2013

2


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Certificate

his is to certi&y that the %roject re%ort entitled Power Theft

Identification System In Distribution ines !sin" Differentia# Power $easurement

bein" submitted by Mr.S.sathishlal8 Mr.Ainash !umar sin"h in %artial

&ul&illment &or the aard o& the De"ree o& 7achelor o& echnolo"y in to

the aaharlal +ehru echnolo"ical $niersity is a record o& bona&ied or!

carried out by him under my "uidance and su%erision.

he results embodied in this %roject re%ort hae not been submitted to any

other $niersity or -nstitute &or the aard o& any De"ree or Di%loma.

(ead o& the De%artment) ,uide +ame 5.bharath reddy

Desi"nation /D

3


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Certificate

his is to certi&y that the %roject re%ort entitled Power Theft

Identification System In Distribution ines !sin" Differentia# Power $easurement

bein" submitted by Mr.S.sathishlal8 Mr.Ainash !umar sin"h in %artial

&ul&illment &or the aard o& the De"ree o& 7achelor o& echnolo"y in to

the aaharlal +ehru echnolo"ical $niersity is a record o& bona&ied or!

carried out by him under my "uidance and su%erision.

he results embodied in this %roject re%ort hae not been submitted to any

other $niersity or -nstitute &or the aard o& any De"ree or Di%loma.

(ead o& the /r"ani9ation) ,uide +ame Mr. M. anumanth *ao

Desi"nation

:


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AC%&'(ED)E$E&T

;e are %leased to ac!noled"e Pro& .Dr. !ambaram +aidu &or "iin" the

%ermission &or course o& this %roject or!.

;e are %leased to ac!noled"e 5.7A*A *DD5 &or their inaluable

"uidance durin" the course o& this %roject or!.

;e e


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I&DE*

CHAPTER +. ABSTRACT,,,,,,,,,,,,,,,,,,-+/

CHAPTER0.I&TR'D!CTI'& T' E$BEDED SYSTE$S,,,..+0+1

2.1 -+*/D$-/+

2.2 APP-A-/+S /= M7DDD S5SMS

CHAPTER 2. I&TR'D!CTI'& T' $ICR'C&TR'ER,,,,+-1/

3.1 A@#1

3.2 =A$*S

3.3 -M*S

3.: S*-A /MM$+-A-/+

3.# -+**$PS

CHAPTER 3. P'(ER S!PPY,,,,,,,,,,,,,,,,..104/

CHAPTER 5. SPECI6IED TECH&'')Y,,,,,,,,,,,..40-4

#.1 *-A

#.2$**+ *A+S=/*M*

CHAPTER 1. S'6T(ARE DE7E'P$E&T,,,,,,,,,,-8+/0

CHAPTER 4. C'&C!SI'&,,,,,,,,,,,,,,,,,+/2+/5

B.1 /+$S-/+

B.2 *=*+

6


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CHAPTER +

ABSTRACT

B


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Power Theft Identification System In DistributionLines Using Differential Power Measurement

Science and technolo"y ith all its miraculous adancements has &ascinated

human li&e to a "reat e


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S'6T(ARE T''S9

%EI-D &or deelo%in" micro controller code

'RCAD&or desi"nin" schematics

PR''AD or6ASH $A)IC&or dum%in" the he< &ile into controller

HARD(ARE T''S9

AT-8C5+Micro controller.

$'C2/0+&or driin" *-As.

BT+21&or controllin" A loads.

urrent trans&ormers

AD

*e"ulated :5;Poer su%%ly.

AD7A&TA)ES9

*eal4time %oer monitorin".

Sensin" the %oer the&t at the e


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10

MICROCONTROLER

230 V

AC

SUPPLY

POWER SUPPLY

5 V DC

CRYSTAL

LC

D

ADC

CT 1

CT 2

LOAD

1

THEFT

LOAD


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CHAPTER 2

INTRODUCTION TO EMBEDDED SYSTEM

11


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2. INTRODUCTION TO EMBEDDED SYSTEM

An embedded system is s!e"i#$!%&!'se "'m!%te& system desi(ned t'

!e&)'&m 'ne '& )e* dedi"ted )%n"ti'ns+ s'metimes *it, &e#$time "'m!%tin(

"'nst&ints- It is %s%##y embedded s !&t ') "'m!#ete de.i"e in"#%din(

,&d*&e nd me",ni"# !&ts- In "'nt&st+ (ene$!%&!'se "'m!%te&+ s%",

s !e&s'n# "'m!%te&+ "n d' mny di))e&ent ts/s de!endin( 'n

!&'(&mmin(- Embedded systems ,.e be"'me .e&y im!'&tnt t'dy s t,ey

"'nt&'# mny ') t,e "'mm'n de.i"es *e %se-

Sin"e t,e embedded system is dedi"ted t' s!e"i)i" ts/s+ desi(n

en(inee&s "n '!timi0e it+ &ed%"in( t,e si0e nd "'st ') t,e !&'d%"t+ '& in"&esin(

t,e &e#ibi#ity nd !e&)'&mn"e- S'me embedded systems &e mss$!&'d%"ed+

bene)itin( )&'m e"'n'mies ') s"#e-

P,ysi"##y+ embedded systems &n(e )&'m !'&tb#e de.i"es s%", s di(it#

*t",es nd P !#ye&s+ t' #&(e stti'n&y inst##ti'ns #i/e t&))i" #i(,ts+

)"t'&y "'nt&'##e&s+ '& t,e systems "'nt&'##in( n%"#e& !'*e& !#nts- C'm!#e3ity

.&ies )&'m #'*+ *it, sin(#e mi"&'"'nt&'##e& ",i!+ t' .e&y ,i(, *it, m%#ti!#e %nits+

!e&i!,es nd net*'&/s m'%nted inside #&(e ",ssis '& en"#'s%&e-

In (ene+ 4embedded system4 is n't n e3"t#y de)ined te&m+ s mny

systems ,.e s'me e#ement ') !&'(&mmbi#ity- F'& e3m!#e+ Hnd,e#d

"'m!%te&s s,&e s'me e#ements *it, embedded systems s%", s t,e

'!e&tin( systems nd mi"&'!&'"ess'&s *,i", !'*e& t,em b%t &e n't t&%#y

embedded systems+ be"%se t,ey ##'* di))e&ent !!#i"ti'ns t' be #'ded nd

!e&i!,es t' be "'nne"ted-

An embedded system is s'me "'mbinti'n ') "'m!%te& ,&d*&e nd

s')t*&e+ eit,e& )i3ed in "!bi#ity '& !&'(&mmb#e+ t,t is s!e"i)i"##y desi(ned

)'& !&ti"%#& /ind ') !!#i"ti'n de.i"e- Ind%st&i# m",ines+ %t'm'bi#es+

medi"# e6%i!ment+ "me&s+ ,'%se,'#d !!#in"es+ i&!#nes+ .endin(

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m",ines+ nd t'ys 7s *e## s t,e m'&e 'b.i'%s "e##%#& !,'ne nd PDA8 &e

m'n( t,e my&id !'ssib#e ,'sts ') n embedded system- Embedded systems

t,t &e !&'(&mmb#e &e !&'.ided *it, !&'(&mmin( inte&)"e+ nd

embedded systems !&'(&mmin( is s!e"i#i0ed '""%!ti'n-

Ce&tin '!e&tin( systems '& #n(%(e !#t)'&ms &e ti#'&ed )'& t,e

embedded m&/et+ s%", s Embedded 9. nd Wind'*s :P Embedded-

H'*e.e&+ s'me #'*$end "'ns%me& !&'d%"ts %se .e&y ine3!ensi.e

mi"&'!&'"ess'&s nd #imited st'&(e+ *it, t,e !!#i"ti'n nd '!e&tin( system

b't, !&t ') sin(#e !&'(&m- T,e !&'(&m is *&itten !e&mnent#y int' t,e

system;s mem'&y in t,is "se+ &t,e& t,n bein( #'ded int' RA 7&nd'm

""ess mem'&y8+ s !&'(&ms 'n !e&s'n# "'m!%te& &e-

2.1 APPLICATIONS OF EMBEDDED SYSTEM

We &e #i.in( in t,e Embedded W'd- Y'% &e s%&&'%nded *it, mny

embedded !&'d%"ts nd y'%& di#y #i)e #&(e#y de!ends 'n t,e !&'!e& )%n"ti'nin(

') t,ese (d(ets- Te#e.isi'n+ Rdi'+ CD !#ye& ') y'%& #i.in( &''m+ Ws,in(

",ine '& i"&'*.e O.en in y'%& /it",en+ C&d &ede&s+ A""ess C'nt&'##e&s+

P#m de.i"es ') y'%& *'&/ s!"e enb#e y'% t' d' mny ') y'%& ts/s .e&y

e))e"ti.e#y- A!&t )&'m ## t,ese+ mny "'nt&'##e&s embedded in y'%& "& t/e "&e

') "& '!e&ti'ns bet*een t,e b%m!e&s nd m'st ') t,e times y'% tend t' i(n'&e

## t,ese "'nt&'##e&s-

In &e"ent dys+ y'% &e s,'*e&ed *it, .&iety ') in)'&mti'n b'%t t,ese

embedded "'nt&'##e&s in mny !#"es- A## /inds ') m(0ines nd

13


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T,e "'m!%te& y'% %se t' "'m!'se y'%& mi#s+ '& "&ete d'"%ment '&

n#y0e t,e dtbse is /n'*n s t,e stnd&d des/t'! "'m!%te&- T,ese

des/t'! "'m!%te&s &e mn%)"t%&ed t' se&.e mny !%&!'ses nd !!#i"ti'ns-

Y'% need t' inst## t,e &e#e.nt s')t*&e t' (et t,e &e6%i&ed !&'"essin(

)"i#ity- S'+ t,ese des/t'! "'m!%te&s "n d' mny t,in(s- In "'nt&st+ embedded

"'nt&'##e&s "&&y'%t s!e"i)i" *'&/ )'& *,i", t,ey &e desi(ned- 'st ') t,e time+

en(inee&s desi(n t,ese embedded "'nt&'##e&s *it, s!e"i)i" ('# in mind- S'

t,ese "'nt&'##e&s "nn't be %sed in ny 't,e& !#"e-

T,e'&eti"##y+ n embedded "'nt&'##e& is "'mbinti'n ') !ie"e ')

mi"&'!&'"ess'& bsed ,&d*&e nd t,e s%itb#e s')t*&e t' %nde&t/e s!e"i)i"

ts/-

T,ese dys desi(ne&s ,.e mny ",'i"es in

mi"&'!&'"ess'&s?mi"&'"'nt&'##e&s- Es!e"i##y+ in @ bit nd 2 bit+ t,e .i#b#e

.&iety &e##y my '.e&*,e#m e.en n e3!e&ien"ed desi(ne&- Se#e"tin( &i(,t

mi"&'!&'"ess'& my t%&n '%t s m'st di))i"%#t )i&st ste! nd it is (ettin(

"'m!#i"ted s ne* de.i"es "'ntin%e t' !'!$%! .e&y ')ten-

In t,e @ bit se(ment+ t,e m'st !'!%#& nd %sed &",ite"t%&e is Inte#;s @1-

&/et ""e!tn"e ') t,is !&ti"%#& )mi#y ,s d&i.en mny semi"'nd%"t'&

mn%)"t%&e&s t' de.e#'! s'met,in( ne* bsed 'n t,is !&ti"%#& &",ite"t%&e-

E.en )te& 25 ye&s ') e3isten"e+ semi"'nd%"t'& mn%)"t%&e&s sti## "'me '%t

*it, s'me /ind ') de.i"e %sin( t,is @1 "'&e-

Military a! a"r#$%a&" $#'t(ar" a%%li&ati#$

F&'m in$'&bit embedded systems t'


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Ri", in system &es'%&"es nd net*'&/in( se&.i"es+ Lyn3OS !&'.ides n '))$

t,e$s,e#) s')t*&e !#t)'&m *it, ,&d &e#$time &es!'nse b"/ed by !'*e&)%#

dist&ib%ted "'m!%tin( 7CORA8+ ,i(, &e#ibi#ity+ s')t*&e "e&ti)i"ti'n+ nd #'n($

te&m s%!!'&t '!ti'ns-T,e Lyn3OS$1@ RTOS )'& s')t*&e "e&ti)i"ti'n+ bsed 'n

t,e RTCA DO$1@ stnd&d+ ssists de.e#'!e&s in (inin( "e&ti)i"ti'n )'& t,ei&

missi'n$ nd s)ety$"&iti"# systems- Re#$time systems !&'(&mme&s (et b''st

*it, Lyn%3W'&/s; DO$1@ RTOS t&inin( "'%&ses-Lyn3OS$1@ is t,e )i&st DO$

1@ nd EUROCAE?ED$12 "e&ti)ib#e+ POSI:B$"'m!tib#e RTOS s'#%ti'n-

Communications a


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And s t,e *i&e#ess !!#in"e &e.'#%ti'n &'##s 'n+ *eb$enb#ed n.i(ti'n

systems+ &di's+ !e&s'n# "'mm%ni"ti'n de.i"es+ !,'nes nd PDAs ## bene)it

)&'m t,e "'st$e))e"ti.e de!endbi#ity+ !&'.en stbi#ity nd )%## !&'d%"t #i)e$"y"#e

s%!!'&t '!!'&t%nities ss'"ited *it, #%e Ct embedded Lin%3- #%e Ct ,s

temed %! *it, ind%st&y #ede&s t' m/e it esie& t' b%i#d Lin%3 m'bi#e !,'nes

*it, 9. inte(&ti'n-

F'& m/e&s ') #'*$"'st "'ns%me& e#e"t&'ni" de.i"es *,' *is, t' inte(&te t,e

Lyn3OS &e#$time '!e&tin( system int' t,ei& !&'d%"ts+ *e '))e& s!e"i# SRP$

bsed !&i"in(t' &ed%"e &'y#ty )ees t' ne(#i(ib#e !'&ti'n ') t,e de.i"e;s SRP-

I!)$trial a)t#*ati# a! %r#&"$$ tr#l $#'t(ar"

Desi(ne&s ') ind%st&i# nd !&'"ess "'nt&'# systems/n'* )&'m e3!e&ien"e

t,t Lyn%3W'&/s '!e&tin( systems !&'.ide t,e se"%&ity nd &e#ibi#ity t,t t,ei&

ind%st&i# !!#i"ti'ns &e6%i&e-F&'m ISO 1 "e&ti)i"ti'n t' )%#t$t'#e&n"e+

POSI: "'n)'&mn"e+ se"%&e !&titi'nin( nd ,i(, .i#bi#ity+ *e;.e ('t it ##-

T/e d.nt(e ') '%& 2 ye&s ') e3!e&ien"e-

16
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CHAPTER 2

I&TR'D!CTI'& T' $ICR'C'&TR'ERS

1B


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$ICR' C'&TR'ER -8C5+

Introduction

A Micro controller consists o& a %oer&ul P$ ti"htly cou%led ith memory8

arious -F/ inter&aces such as serial %ort8 %arallel %ort timer or counter8 interru%t

controller8 data acuisition inter&aces4Analo" to Di"ital conerter8 Di"ital to Analo"

conerter8 inte"rated on to a sin"le silicon chi%.

-& a system is deelo%ed ith a micro%rocessor8 the desi"ner has to "o &or e


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,-y AT /C1

T,e system &e6%i&ements nd "'nt&'# s!e"i)i"ti'ns "#ey &%#e '%t t,e

%se ') 1+ 2 '& G bit mi"&' "'nt&'##e&s '& mi"&'!&'"ess'&s- Systems %sin( t,ese

my be eie& t' im!#ement d%e t' #&(e n%mbe& ') inte&n# )et%&es- T,ey &e

#s' )ste& nd m'&e &e#ib#e b%t+ @$bit mi"&' "'nt&'##e& stis)"t'&i#y se&.es t,e

b'.e !!#i"ti'n- Usin( n ine3!ensi.e @$bit i"&'"'nt&'##e& *i## d''m t,e 2$bit

!&'d%"t )i#%&e in ny "'m!etiti.e m&/et !#"e-

omin" to the uestion o& hy to use A@#1 o& all the @4bit microcontroller

aailable in the mar!et the main anser ould be because it has : Jb on chi% &lash

memory hich is just su&&icient &or our a%%lication. he on4chi% =lash */M allos the

%ro"ram memory to be re%ro"rammed in system or by conentional non4olatile memory

Pro"rammer. Moreoer AM is the leader in &lash technolo"y in todayEs mar!et %lace

and hence usin" A @#1 is the o%timal solution.

AT/C1 MICROCONTROLLER ARCHITECTURE

T,e @C51 &",ite"t%&e "'nsists ') t,ese s!e"i)i" )et%&es

Ei(,t bit CPU *it, &e(iste&s A 7t,e ""%m%#t'&8 nd

Si3teen$bit !&'(&m "'%nte& 7PC8 nd dt !'inte& 7DPTR8

Ei(,t$ bit st"/ !'inte& 7PSW8

Ei(,t$bit st"/ !'inte& 7S!8

Inte&n# RO '& EPRO 7@518 ') 7@18 t' GJ 7@C518

Inte&n# RA ') 12@ bytes

1- F'%& &e(iste& bn/s+ e", "'ntinin( ei(,t &e(iste&s

2- Si3teen bytes+ *,i", mybe dd&essed t t,e bit #e.e#

- Ei(,ty bytes ') (ene$ !%&!'se dt mem'&y

1


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T,i&ty t*' in!%t?'%t!%t !ins &&n(ed s )'%& @$bit !'&ts!$!

T*' 1$bit time&?"'%nte&s T nd T1

F%## d%!#e3 se&i# dt &e"ei.e&?t&nsmitte& SUF

C'nt&'# &e(iste&s TCON+ TOD+ SCON+ PCON+ IP+ nd IE

T*' e3te&n# nd t,&ee inte&n# inte&&%!ts s'%&"es-

Os"i##t'& nd "#'"/ "i&"%its-

Fi( F%n"ti'n# b#'"/ di(&m ') mi"&' "'nt&'##e&

T-" /C1 #$&illat#r a! &l#&

he heart o& the @#1 circuitry that "enerates the cloc! %ulses by hich all the

internal all internal o%erations are synchroni9ed. Pins KA1 And KA2 is %roided

&or connectin" a resonant netor! to &orm an oscillator. y%ically a uart9 crystal and

ca%acitors are em%loyed. he crystal &reuency is the basic internal cloc! &reuency o&

20


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the microcontroller. he manu&acturers ma!e @#1 desi"ns that run at s%eci&ic

minimum and ma


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Ty%"$ #' *"*#ry

T,e @C51 ,.e t,&ee (ene ty!es ') mem'&y- T,ey &e 'n$",i!mem'&y+ e3te&n# C'de mem'&y nd e3te&n# Rm- On$C,i! mem'&y &e)e&s t'

!,ysi"##y e3istin( mem'&y 'n t,e mi"&' "'nt&'##e& itse#)- E3te&n# "'de mem'&y

is t,e "'de mem'&y t,t &esides ')) ",i!- T,is is ')ten in t,e )'&m ') n e3te&n#

EPRO- E3te&n# RA is t,e Rm t,t &esides ')) ",i!- T,is ')ten is in t,e )'&m

') stnd&d stti" RA '& )#s, RA-

a C#!" *"*#ry

C'de mem'&y is t,e mem'&y t,t ,'#ds t,e "t%# @C51 !&'(&ms t,t ist' be &%n- T,is mem'&y is #imited t' GJ- C'de mem'&y my be )'%nd 'n$",i! '&

'))$",i!- It is !'ssib#e t' ,.e GJ ') "'de mem'&y 'n$",i! nd J ')) ",i!

mem'&y sim%#tne'%s#y- I) 'n#y '))$",i! mem'&y is .i#b#e t,en t,e&e "n be

GJ ') ')) ",i! RO- T,is is "'nt&'##ed by !in !&'.ided s EA

4 It"ral RAM

T,e @C51 ,.e bn/ ') 12@ ') inte&n# RA- T,e inte&n# RA is

)'%nd 'n$",i!- S' it is t,e )stest Rm .i#b#e- And #s' it is m'st )#e3ib#e in

te&ms ') &edin( nd *&itin(- Inte&n# Rm is .'#ti#e+ s' *,en @C51 is &eset+

t,is mem'&y is "#e&ed- 12@ bytes ') inte&n# mem'&y &e s%bdi.ided- T,e )i&st 2

bytes &e di.ided int' G &e(iste& bn/s- E", bn/ "'ntins @ &e(iste&s- Inte&n#

RA #s' "'ntins 12@ bits+ *,i", &e dd&essed )&'m 2, t' 2F,- T,ese bits

&e bit dd&essed i-e- e", indi.id%# bit ') byte "n be dd&essed by t,e %se&-

T,ey &e n%mbe&ed , t' F,- T,e %se& my m/e %se ') t,ese .&ib#es *it,

"'mmnds s%", s SET nd CLR-

22


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& FLASH MEMORY

F#s, mem'&y 7s'metimes "##ed K)#s, RA8 is ty!e ') "'nstnt#y$

!'*e&ed n'n .'#ti#e t,t "n be e&sed nd &e!&'(&mmed in %nits ') mem'&y

"##ed blocks- It is .&iti'n ') e#e"t&i"##y e&sb#e !&'(&mmb#e &ed$'n#y

mem'&y 7EEPRO8 *,i",+ %n#i/e )#s, mem'&y+ is e&sed nd &e*&itten t t,e

byte #e.e#+ *,i", is s#'*e& t,n )#s, mem'&y %!dtin(- F#s, mem'&y is ')ten

%sed t' ,'#d "'nt&'# "'de s%", s t,e bsi" in!%t?'%t!%t system 7IOS8 in

!e&s'n# "'m!%te&- W,en IOS needs t' be ",n(ed 7&e*&itten8+ t,e )#s,

mem'&y "n be *&itten t' in b#'"/ 7&t,e& t,n byte8 si0es+ m/in( it esy t'

%!dte- On t,e 't,e& ,nd+ )#s, mem'&y is n't %se)%# s &nd'm ""ess

mem'&y 7RA8 be"%se RA needs t' be dd&essb#e t t,e byte 7n't t,e

b#'"/8 #e.e#-

F#s, mem'&y (ets its nme be"%se t,e mi"&'",i! is '&(ni0ed s' t,t

se"ti'n ') mem'&y "e##s &e e&sed in sin(#e "ti'n '& K)#s,- T,e e&s%&e is

"%sed by F'*#e&$N'&d,eim t%nne#in( in *,i", e#e"t&'ns !ie&"e t,&'%(, t,in

die#e"t&i" mte&i# t' &em'.e n e#e"t&'ni" ",&(e )&'m floating gatess'"ited

*it, e", mem'&y "e##- Inte# '))e&s )'&m ') )#s, mem'&y t,t ,'#ds t*' bits

7&t,e& t,n 'ne8 in e", mem'&y "e##+ t,%s d'%b#in( t,e "!"ity ') mem'&y

*it,'%t "'&&es!'ndin( in"&ese in !&i"e-

F#s, mem'&y is %sed in di(it# "e##%#& !,'nes+ di(it# "me&s+ LAN

s*it",es+ PC C&ds )'& n'teb''/ "'m!%te&s+ di(it# set$%! b'3es+ embedded

"'nt&'##e&s+ nd 't,e& de.i"es-

23


24/105

M"*#ry Ty%" F"at)r"$

FLASH L'*$"'st+ ,i(,$density+ ,i(,$s!eed

&",ite"t%&e= #'* !'*e&= ,i(,

&e#ibi#ity

ROM

Red$On#y em'&y

t%&e+ ,i(,$density+ &e#ib#e+ #'*

"'st= time$"'ns%min( ms/

&e6%i&ed+ s%itb#e )'& ,i(, !&'d%"ti'n

*it, stb#e "'de

SRAM

Stti" Rnd'm$A""ess em'&y

Hi(,est s!eed+ ,i(,$!'*e&+ #'*$

density mem'&y= #imited density

d&i.es %! "'st

EPROM

E#e"t&i"##y P&'(&mmb#e Red$

On#y em'&y

Hi(,$density mem'&y= m%st be

e3!'sed t' %#t&.i'#et #i(,t )'&

e&s%&e

EEPROM#rE2PROM

E#e"t&i"##y E&sb#e

P&'(&mmb#e Red$On#y

em'&y

E#e"t&i"##y byte$e&sb#e=

#'*e& &e#ibi#ity+ ,i(,e& "'st+

#'*est density

DRAM

Dynmi" Rnd'm A""ess

em'&y

Hi(,$density+ #'*$"'st+ ,i(,$

s!eed+ ,i(,$!'*e&

T"&-i&al O+"r+i"( #' Fla$- M"*#ry

F#s, mem'&y is n'n.'#ti#e mem'&y %sin( NOR te",n'#'(y+ *,i",

##'*s t,e %se& t' e#e"t&i"##y !&'(&m nd e&se in)'&mti'n- Inte#B F#s,

mem'&y %ses mem'&y "e##s simi#& t' n EPRO+ b%t *it, m%", t,inne&+

2:


25/105

!&e"ise#y (&'*n '3ide bet*een t,e )#'tin( (te nd t,e s'%&"e - F#s,

!&'(&mmin( '""%&s *,en e#e"t&'ns &e !#"ed 'n t,e )#'tin( (te- T,e ",&(e

is st'&ed 'n t,e )#'tin( (te+ *it, t,e '3ide #ye& ##'*in( t,e "e## t' be

e#e"t&i"##y e&sed t,&'%(, t,e s'%&"e- Inte# F#s, mem'&y is n e3t&eme#y

&e#ib#e n'n.'#ti#e mem'&y &",ite"t%&e-

=i" @' Pin dia"ram o& A@#1

Pi D"$&ri%ti#

VCC S%!!#y .'#t(e-

2#


26/105

5ND M&'%nd-

P#rt 0

Port 0 is an @4bit o%en4drain bi4directional -F/ %ort. As an out%ut %ort8 each %in

can sin! ei"ht in%uts. ;hen oneEs are ritten to %ort 0 %ins8 the %ins can be used as

hi"h im%edance in%uts. Port 0 may also be con&i"ured to be the multi%le


27/105

P#rt 3

P'&t is n @$bit bi$di&e"ti'n# I?O !'&t *it, inte&n# !%##$%!s- T,e P'&t

'%t!%t b%))e&s "n sin/?s'%&"e )'%& TTL in!%ts- W,en 1s &e *&itten t' P'&t !ins

t,ey &e !%##ed ,i(, by t,e inte&n# !%##$%!s nd "n be %sed s in!%ts- As in!%ts+

P'&t !ins t,t &e e3te&n##y bein( !%##ed #'* *i## s'%&"e "%&&ent 7IIL8 be"%se

') t,e !%##$%!s-

P'&t #s' se&.es t,e )%n"ti'ns ') .&i'%s s!e"i# )et%&es ') t,e AT@C51 s

#isted be#'*

P'&t #s' &e"ei.es s'me "'nt&'# si(n#s )'& F#s, !&'(&mmin( nd .e&i)i"ti'n

Tb -2-1 P'&t !ins nd t,ei& #te&nte )%n"ti'ns

RST

Reset in!%t- A ,i(, 'n t,is !in )'& t*' m",ine "y"#es *,i#e t,e 's"i##t'&

is &%nnin( &esets t,e de.i"e-

ALE6PRO5

2B


28/105

Address atch nable out%ut %ulse &or latchin" the lo byte o& the address durin"

accesses to e


29/105

-n%ut to the inertin" oscillator am%li&ier and in%ut to the internal cloc! o%eratin"

circuit.

7TAL2

It is t,e O%t!%t )&'m t,e in.e&tin( 's"i##t'& m!#i)ie&-

O$&illat#r C-ara&t"ri$ti&$

KA1 and KA2 are the in%ut and out%ut8 res%ectiely8 o& an inertin"

am%li&ier hich can be con&i"ured &or use as an on4chi% oscillator8 as shon in =i"s .

ither a uart9 crystal or ceramic resonator may be used. o drie the deice &rom an

e


30/105

Fi( 1 E3te&n# C#'"/ D&i.e C'n)i(%&ti'n

&otes'

2 Unde& stedy stte 7n'n$t&nsient8 "'nditi'ns+ IOL m%st be

e3te&n##y

#imited s )'##'*s

3im%m IOL !e& !'&t !in 1 mA

3im%m IOL !e& @$bit !'&t P'&t 2 mA

P'&ts 1+ 2+ 15 mA

3im%m t't# IOL )'& ## '%t!%t !ins 1 mA

I) IOL e3"eeds t,e test "'nditi'n+ VOL my e3"eed t,e &e#ted

s!e"i)i"ti'n- Pins &e n't (%&nteed t' sin/ "%&&ent (&ete& t,n t,e

#isted test "'nditi'ns-

2. inim%m VCC )'& P'*e&$d'*n is 2V-

RE5ISTERS

In t,e CPU+ &e(iste&s &e %sed t' st'&e in)'&mti'n tem!'&&i#y- T,t

in)'&mti'n "'%#d be byte ') dt t' be !&'"essed+ '& n dd&ess !'intin( t' t,e

30


31/105

dt t' be )et",ed- T,e .st m


32/105

2. +ot all the address s%ace o& @0 to == is used by the S=*. he unused

locations @0 to == are resered and must not be used by the @0#1

%ro"rammer.

*e"ardin" direct addressin" mode8 notice the &olloin" to %oints' (a) the

address alue is limited to one byte8 004==8 hich means this addressin" mode is

limited to accessin" *AM locations and re"isters located inside the @0#1. (b) -& you

e


33/105

D

TH Time&?"'%nte& ,i(, byte @CH

TL Time&?"'%nte& #'* byte @AH

TH1 Time&?"'%nte& 1 ,i(, byte @DH

TL1 Time&?"'%nte& 1 #'* byte @H

TH2 Time&?"'%nte& 2 ,i(, byte CDH

TL2 Time&?"'%nte& 2 #'* byte CCH

RCAP

2H

T?C 2 "!t%&e &e(iste& ,i(,

byte

CH

RCAP

2L

T?C 2 "!t%&e &e(iste& #'*

byte

CAH

SCON Se&i# "'nt&'# @H

SUF Se&i# dt b%))e& H

PCON P'*e& "'nt&'# @H

Ta4l" 01 S%"&ial ')&ti# r"8i$t"r A!!r"$$

A R"8i$t"r 9A&&)*)lat#r

Fi( 11 A""%m%#t'& &e(iste&

his is a "eneral4%ur%ose re"ister hich seres &or storin" intermediate results durin"

o%eratin". A number (an o%erand) should be added to the accumulator %rior to e


34/105

instruction u%on it. /nce an arithmetical o%eration is %re&ormed by the A$8 the result is

%laced into the accumulator. -& a data should be trans&erred &rom one re"ister to another8

it must "o throu"h accumulator. =or such uniersal %ur%ose8 this is the most commonly

used re"ister that none microcontroller can be ima"ined ithout (more than a hal& @0#1

microcontrollerEs instructions used use the accumulator in some ay).

B R"8i$t"r

7 re"ister is used durin" multi%ly and diide o%erations hich can be %er&ormed only

u%on numbers stored in the A and 7 re"isters. All other instructions in the %ro"ram can

use this re"ister as a s%are accumulator (A).

Fi( 12 &e(iste&

D%&in( !&'(&mmin(+ e", ') &e(iste&s is "##ed by nme s' t,t t,ei&

e3"t dd&ess is n't s' im!'&tnt )'& t,e %se&- D%&in( "'m!i#in( int' m",ine

"'de 7se&ies ') ,e3de"im# n%mbe&s &e"'(ni0ed s inst&%"ti'ns by t,e

mi"&'"'nt&'##e&8+ PC *i## %t'mti"##y+ insted ') &e(iste&s nme+ *&ite

ne"ess&y dd&esses int' t,e mi"&'"'nt&'##e&-

R R"8i$t"r$ 9R0:R;

3:


35/105

Fi( 1RA

his is a common name &or the total @ "eneral %ur%ose re"isters (*08 *18 and

*2 ...*B). en they are not true S=*s8 they desere to be discussed here because o& their

%ur%ose. he ban! is actie hen the * re"isters it includes are in use. Similar to the

accumulator8 they are used &or tem%orary storin" ariables and intermediate results.

;hich o& the ban!s ill be actie de%ends on to bits included in the PS; *e"ister.hese re"isters are stored in &our ban!s in the sco%e o& *AM.

he &olloin" e


36/105

01 R"8i$t"r Ba$ a! Sta&

RAM *"*#ry $%a&" all#&ati# i t-" 01

T,e&e &e 12@ bytes ') RA in t,e @51- T,e 12@ bytes ') RA inside

t,e @51 &e ssi(ned dd&esses t'FH- T,ese 12@ bytes &e di.ided int'

t,&ee di))e&ent (&'%!s s )'##'*s

1- A t't# ') 2 bytes )&'m #'"ti'ns t' 1FH ,e3 &e set side )'&

&e(iste& bn/s nd t,e st"/-

2- A t't# ') 1 bytes )&'m #'"ti'ns 2 t' 2FH ,e3 &e set side )'& bit$

dd&essb#e &ed?*&ite mem'&y-

- A t't# ') @ bytes )&'m #'"ti'ns H t' FH &e %sed )'& &ed nd

*&ite st'&(e+ '& *,t is n'&m##y "##ed S"&t", !d- T,ese @

#'"ti'ns ') RA &e *ide#y %sed )'& t,e !%&!'se ') st'&in( dt nd

!&mete&s n% @51 !&'(&mme&s-

R"8i$t"r 4a$ i t-" 01

A t't# ') 2bytes ') RA &e set side )'& t,e &e(iste& bn/s nd st"/-

T,ese 2 bytes &e di.ided int' G bn/s ') &e(iste&s in *,i", e", bn/ ,s

&e(iste&s+ R$R- RA #'"ti'ns t' &e set side )'& bn/ ') R$R *,e&e

R is RA #'"ti'n + R1 is RA #'"ti'n 1+ nd R2 is #'"ti'n 2+ nd s' 'n+ %nti#

mem'&y #'"ti'n+ *,i", be#'n(s t' R ') bn/- T,e se"'nd bn/ ') &e(iste&s

R$R st&ts t RA #'"ti'n @ nd ('es t' #'"ti'n FH- T,e t,i&d bn/ ') R$

R st&ts t mem'&y #'"ti'n 1H nd ('es t' #'"ti'n 1H- Fin##y+ RA

#'"ti'ns 1@H t' 1FH &e set side )'& t,e )'%&t, bn/ ') R$R- Fi( s,'*s ,'*

t,e 2 bytes &e ##'"ted int' G bn/s-

As *e "n see )&'m )i( 1+ t,e bn/ 1 %ses t,e sme RA s!"e s t,e

st"/- T,is is m


37/105

D"'a)lt r"8i$t"r 4a

I) RA #'"ti'ns $1F &e set side )'& t,e )'%& &e(iste& bn/s+ *,i",

&e(iste& bn/ ') R$R d' *e ,.e ""ess t' *,en t,e @51 is !'*e&ed %!> T,e

ns*e& is &e(iste& bn/ = t,t is + RA #'"ti'ns + 1+2++G+5++ nd &e

""essed *it, t,e nmes R+ R1+ R2+ R+ RG+ R5+ R+ nd R *,en

!&'(&mmin( t,e @51- It is m%", esie& t' &e)e& t' t,ese RA #'"ti'ns *it,

nmes s%", s R+ R1 nd s' 'n+ t,n by t,ei& mem'&y #'"ti'ns s s,'*n in )i(

2-T,e &e(iste& bn/s &e s*it",ed by %sin( t,e D DG bits ') &e(iste& PSW-

FIM1G RA A##'"ti'n in t,e @51

3B


38/105

3@


39/105

Fi( 15 @51 Re(iste& n/s nd t,ei& RA Add&esses

PS, R"8i$t"r 9Pr#8ra* Stat)$ ,#r!

Fi( 1 PSW &e(iste&

his is one o& the most im%ortant S=*s. he Pro"ram Status ;ord (PS;)

contains seeral status bits that re&lect the current state o& the P$. his re"ister contains'

arry bit8 Au


40/105

RS1 RS2 S%a&" i RAM

n/ ,$,

1 n/1 @,$F,

1 n/2 1,$1,

1 1 n/ 1@,$1F,

6/ 6#a" /.his is a "eneral4%ur%ose bit aailable to the user.

AC Aui#iary Carry 6#a"is used &or 7D o%erations only.

CY Carry 6#a"is the (ninth) au


41/105

Fi( 1 DPTR &e(iste&

SP R"8i$t"r 9Sta& P#it"r

Fi( 1@ SP &e(iste&

he stac! is a section o& *AM used by the P$ to store in&ormation

tem%orarily. his in&ormation could be data or an address. he P$ needs this stora"e

area since there are only a limited number o& re"isters.

How stacs are accessed in the -/5+

-& the stac! is a section o& *AM8 there must be re"isters inside the P$ to %oint

to it. he re"ister used to access the stac! is called the SP (Stac! %oint) *e"ister. he

stac! %ointer in the @0#1 is only @ bits ideO hich means that it can ta!e alues o& 00 to

==. ;hen the @0#1 is %oered u%8 the SP re"ister contains alue 0B. his means that

*AM location 0@ is the &irst location used &or the stac! by the @0#1. he storin" o& a

P$ re"ister in the stac! is called a P$S8 and %ullin" the contents o&& the stac! bac!

into a P$ re"ister is called a P/P. -n other ords8 a re"ister is %ushed onto the stac! to

sae it and %o%%ed o&& the stac! to retriee it. he job o& the SP is ery critical hen

%ush and %o% actions are %er&ormed.

Pushin" onto the stac

-n the @0#1 the stac! %ointer (SP) %oints to the last used location o& the stac!. As

e %ush data onto the stac!8 the stac! %ointer is incremented by one. +otice that this

:1


42/105

di&&erent &rom many micro%rocessors8 notably


43/105

olta"e on the %in (0 or # ?). +aturally8 hile readin"8 the o%%osite occurs I olta"e on

some in%ut %ins is re&lected in the a%%ro%riate %ort bit.

he state o& a %ort bit8 besides bein" re&lected in the %in8 determines at the same

time hether it ill be con&i"ured as in%ut or out%ut. -& a bit is cleared (0)8 the %in ill be

con&i"ured as out%ut. -n the same manner8 i& a bit is set to 1 the %in ill be con&i"ured as

in%ut. A&ter reset8 as ell as hen turnin" the microcontroller /+8 all bits on these %orts

are set to one >+?. his means that the a%%ro%riate %ins ill be con&i"ured as in


44/105

INC R1= In"&ement R1 7in"&ement &e(iste& R18

LJMP LAB5 =L'n( 9%m! LA5 7#'n(


45/105

ADD A+Rn Add R Re(iste& t' ""%m%#t'& 1 1

ADD A+R3Add di&e"t#y dd&essed R3 Re(iste& t'

""%m%#t'&2 2

ADD A+RiAdd indi&e"t#y dd&essed Re(iste& t'

""%m%#t'&1 1

ADD A+: Add n%mbe& : t' ""%m%#t'& 2 2

ADDC A+RnAdd R Re(iste& *it, C&&y bit t'

""%m%#t'&1 1

Bra&- I$tr)&ti#$

here are to !inds o& these instructions'

!nconditiona# =um< instructions9

A&ter their e


46/105

G J byte P&'(&m em'&y s!"e

RET Ret%&n )&'m s%b&'%tine 1 G

RETI Ret%&n )&'m inte&&%!t &'%tine 1 G

A9P d&119%m! t' dd&ess #'"ted *it,in 2 J byte

P&'(&m em'&y s!"e2

L9P d&19%m! t' ny dd&ess #'"ted *it,in G J byte

P&'(&m em'&y s!"e G

Data Tra$'"r I$tr)&ti#$

hese instructions moe the content o& one re"ister to another one. he re"ister hich

content is moed remains unchan"ed. -& they hae the su&&i< CK (M/?K)8 the data is e


47/105

L#8i&al I$tr)&ti#$

M"*#i& D"$&ri%ti#Byt"

N)*4"r

Cy&l"

N)*4"r

ANL A+Rn L'(i"# AND bet*een ""%m%#t'& nd R &e(iste& 1 1

ANL A+R3L'(i"# AND bet*een ""%m%#t'& nd di&e"t#y

dd&essed &e(iste& R32 2

ANL A+RiL'(i"# AND bet*een ""%m%#t'& nd indi&e"t#y

dd&essed &e(iste&1 1

ANL A+: L'(i"# AND bet*een ""%m%#t'& nd n%mbe& : 2 2

L#8i&al O%"rati#$ # Bit$

Similar to lo"ical instructions8 these instructions %er&orm lo"ical o%erations. he

di&&erence is that these o%erations are %er&ormed on sin"le bits.

L#8i&al #%"rati#$ # 4it$

M"*#i& D"$&ri%ti#Byt"

N)*4"r

Cy&l"

N)*4"r

CLR C C#e& C&&y bit 1 1

CLR bit C#e& di&e"t#y dd&essed bit 2 2

SET C Set C&&y bit 1 1

SET bit Set di&e"t#y dd&essed bit 2 2

CPL C C'm!#ement C&&y bit 1 1

CPL bit C'm!#ement di&e"t#y dd&essed bit 2 2

:B


48/105

TI$ERS

On$",i! timin(?"'%ntin( )"i#ity ,s !&'.ed t,e "!bi#ities ') t,e

mi"&'"'nt&'##e& )'& im!#ementin( t,e &e# time !!#i"ti'n- T,ese in"#%des !%#se

"'%ntin(+ )&e6%en"y mes%&ement+ !%#se *idt, mes%&ement+ b%d &te

(ene&ti'n+ et"+- H.in( s%))i"ient n%mbe& ') time&?"'%nte&s my be need in

"e&tin desi(n !!#i"ti'n- T,e @51 ,s t*' time&s?"'%nte&s- T,ey "n be %sed

eit,e& s time&s t' (ene&te time de#y '& s "'%nte&s t' "'%nt e.ents

,!!enin( '%tside t,e mi"&'"'nt&'##e&- Let dis"%ss ,'* t,ese time&s &e %sed t'

(ene&te time de#ys nd *e *i## #s' dis"%ss ,'* t,ey &e been %sed s e.ent

"'%nte&s-

PRO5RAMMIN5 01 TIMERS

T,e @51 ,s time&s Time& nd Time&1-t,ey "n be %sed eit,e& s time&s

'& s e.ent "'%nte&s- Let %s )i&st dis"%ss b'%t t,e time&s &e(iste&s nd ,'* t'

!&'(&m t,e time&s t' (ene&te time de#ys-

BASIC RI5ISTERS OF THE TIMER

't, Time& nd Time& 1 &e 1 bits *ide- Sin"e t,e @51 ,s n @$bit

&",ite"t%&e+ e", 1$bit time& is ""essed s t*' se!&te &e(iste&s ') #'* byte

nd ,i(, byte-

TIMER 0 RE5ISTERS

T,e 1$bit &e(iste& ') Time& is ""essed s #'* byte nd ,i(, byte- T,e #'*

byte &e(iste& is "##ed TL7Time& #'* byte8nd t,e ,i(, byte &e(iste& is &e)e&&ed t' s

TH7Time& ,i(, byte8-T,ese &e(iste& "n be ""essed #i/e ny 't,e& &e(iste&+ s%", s

A++R+R1+R2+et"-)'& e3m!#e+ t,e inst&%"ti'n OV TL+ GFm'.es t,e .#%e GFH

int' TL+t,e #'* byte ') Time& -T,ese &e(iste&s "n #s' be &ed #i/e ny 't,e& &e(iste&-

:@


49/105

Fi( 2Time& 7TH nd TL 8 &e(iste&s

TIMER 1 RE5ISTERS

Time& 1 is #s' 1$bit &e(iste& is s!#it int' t*' bytes+ &e)e&&ed t' s TL1

7Time& 1 #'* byte8 nd TH1 7Time& 1 ,i(, byte8-t,ese &e(iste&s &e ""essib#e n

t,e sme *y s t,e &e(iste& ') Time& -

TMOD 9ti*"r *#!" RE5ISTER

't, time&s TIER nd TIER 1 %se t,e sme &e(iste&+ "##ed TOD+

t' set t,e .&i'%s time& '!e&ti'n m'des- TOD is n @$bit &e(iste& in *,i", t,e

#'*e& G bits &e set side )'& Time& nd t,e %!!e& G bits )'& Time& 1-in e",

"se= t,e #'*e& 2 bits &e %sed t' set t,e time& m'de nd t,e %!!e& 2 bits t'

s!e"i)y t,e '!e&ti'n-

MODES

M1< M0

:


50/105

nd 1 &e %sed t' se#e"t t,e time& m'de- T,e&e &e t,&ee m'des

+ 1+ 2-'de is 1$bit time&+ m'de 1 is 1$bit time&+ nd m'de 2 is n @$bit

time&- We *i## "'n"ent&te 'n m'des 1 nd 2 sin"e t,ey &e t,e 'nes %sed m'st

*ide#y- We *i## s''n des"&ibe t,e ",&"te&isti"s ') t,ese m'des+ )te& des"&ibin(

t,e &eset ') t,e TOD &e(iste&-

5ATE Mte "'nt&'# *,en set- T,e time&?"'%nte& is

enb#ed 'n#y

W,i#e t,e INT3 !in is ,i(, nd t,e TR3 "'nt&'#

!in is-

Set- W,en "#e&ed+ t,e time& is enb#ed-

C6T Time& '& "'%nte& se#e"ted "#e&ed )'& time&

'!e&ti'n

7In!%t )&'m inte&n# system "#'"/8-set )'&

"'%nte&

O!e&ti'n 7in!%t T: in!%t !in8-

M 1 'de bit 1

M0 'de bit

M1 M0 MODE O%"rati8 M#!"

0 0 1$bit time& m'de

@$bit time&?"'%nte& TH3*it, TL3 s 5 it !&e$

s"#e&-

0 1 1 1$bit time& m'de

#0


51/105

1$bit time&?"'%nte&s TH3

*it, TL3 &e Cs"ded=

t,e&e is n' !&es"#e&

1 2 @$bit %t' &e#'d

@$bit %t' &e#'d

time&?"'%nte&=TH3 H'#ds

.#%e t,t is t' be &e#'ded

int' TL3 e", time it

'.e&)#'*s-

1 1 3 S!#it time& m'de-

C6T 9&l#&6ti*"r

T,is bit in t,e TOD &e(iste& is %sed t' de"ide *,et,e& t,e time& is

%sed s de#y (ene&t'& '& n e.ent "'%nte&- I) C?T+ it is %sed s time& )'&

time de#y (ene&ti'n- T,e "#'"/ s'%&"e )'& t,e time de#y is t,e "&yst#

)&e6%en"y ') t,e @51-t,is se"ti'n is "'n"e&ned *it, t,is ",'i"e- T,e time&s %se

s n e.ent "'%nte& is dis"%ssed in t,e ne3t se"ti'n-

S"rial C#**)i&ati#

C'm!%te&s "n t&ns)e& dt in t*' *ys !#e# nd se&i#- In !#e#

dt t&ns)e&s+ ')ten @ '& m'&e #ines 7*i&e "'nd%"t'&s8 &e %sed t' t&ns)e& dt

t' de.i"e t,t is 'n#y )e* )eet *y- E3m!#es ') !#e# dt t&ns)e& &e

!&inte&s nd ,&d dis/s= e", %ses "b#es *it, mny *i&e st&i!s- A#t,'%(, in

s%", "ses #'t ') dt "n be t&ns)e&&ed in s,'&t m'%nt ') time by %sin(

mny *i&es in !#e#+ t,e distn"e "nn't be (&et- T' t&ns)e& t' de.i"e

#'"ted mny mete&s *y+ t,e se&i# met,'d is %sed- In se&i# "'mm%ni"ti'n+

#1


52/105

t,e dt is sent 'ne bit t time+ in "'nt&st t' !#e# "'mm%ni"ti'n+ in *,i",

t,e dt is sent byte '& m'&e t time- Se&i# "'mm%ni"ti'n ') t,e @51 is t,e

t'!i" ') t,is ",!te&- T,e @51 ,s se&i# "'mm%ni"ti'n "!bi#ity b%i#t int' it+

t,e&e by m/in( !'ssib#e )st dt t&ns)e& %sin( 'n#y )e* *i&es-

I) dt is t' be t&ns)e&&ed 'n t,e te#e!,'ne #ine+ it m%st be "'n.e&ted

)&'m s nd 1s t' %di' t'nes+ *,i", &e sin%s'id#$s,!ed si(n#s- A !e&i!,e

de.i"e "##ed m'dem+ *,i", stnds )'& Km'd%#t'&?dem'd%#t'&+ !e&)'&ms t,is

"'n.e&si'n-

Se&i# dt "'mm%ni"ti'n %ses t*' met,'ds+ syn",&'n'%s nd

syn",&'n'%s- T,e syn",&'n'%s met,'d t&ns)e&s b#'"/ ') dt t time+ *,i#e

t,e syn",&'n'%s met,'d t&ns)e&s sin(#e byte t time-

In dt t&nsmissi'n i) t,e dt "n be t&nsmitted nd &e"ei.ed+ it is

d%!#e3 t&nsmissi'n- T,is is in "'nt&st t' sim!#e3 t&nsmissi'ns s%", s *it,

!&inte&s+ in *,i", t,e "'m!%te& 'n#y sends dt- D%!#e3 t&nsmissi'ns "n be

,#) '& )%## d%!#e3+ de!endin( 'n *,et,e& '& n't t,e dt t&ns)e& "n be

sim%#tne'%s- I) dt is t&nsmitted 'ne *y t time+ it is &e)e&&ed t' s ,#)

d%!#e3- I) t,e dt "n (' b't, *ys t t,e sme time+ it is )%## d%!#e3- O)

"'%&se+ )%## d%!#e3 &e6%i&es t*' *i&e "'nd%"t'&s )'& t,e dt #ines+ 'ne )'&

t&nsmissi'n nd 'ne )'& &e"e!ti'n+ in '&de& t' t&ns)e& nd &e"ei.e dt

sim%#tne'%s#y-

A$y&-r##)$ $"rial **)i&ati# a! !ata 'ra*i8

T,e dt "'min( in t t,e &e"ei.in( end ') t,e dt #ine in se&i# dt

t&ns)e& is ## s nd 1s= it is di))i"%#t t' m/e sense ') t,e dt %n#ess t,e sende&

nd &e"ei.e& (&ee 'n set ') &%#es+ !&'t'"'#+ 'n ,'* t,e dt is !"/ed+ ,'*mny bits "'nstit%te ",&"te&+ nd *,en t,e dt be(ins nd ends-

Start a! $t#% 4it$

#2


53/105

Asyn",&'n'%s se&i# dt "'mm%ni"ti'n is *ide#y %sed )'& ",&"te&$

'&iented t&nsmissi'ns+ *,i#e b#'"/$'&iented dt t&ns)e&s %se t,e syn",&'n'%s

met,'d- In t,e syn",&'n'%s met,'d+ e", ",&"te& is !#"ed bet*een st&t

nd st'! bits- T,is is "##ed )&min(- In t,e dt )&min( )'& syn",&'n'%s

"'mm%ni"ti'ns+ t,e dt+ s%", s ASCII ",&"te&s+ &e !"/ed bet*een st&t

bit nd st'! bit- T,e st&t bit is #*ys 'ne bit+ b%t t,e st'! bit "n be 'ne '&

t*' bits- T,e st&t bit is #*ys 7#'*8 nd t,e st'! bit 7s8 is 1 7,i(,8-

Data tra$'"r rat"

T,e &te ') dt t&ns)e& in se&i# dt "'mm%ni"ti'n is stted in b!s

7bits !e& se"'nd8- An't,e& *ide#y %sed te&min'#'(y )'& b!s is b%d &te-

H'*e.e&+ t,e b%d nd b!s &tes &e n't ne"ess&i#y e6%#- T,is is d%e t' t,e

)"t t,t b%d &te is t,e m'dem te&min'#'(y nd is de)ined s t,e n%mbe& ')

si(n# ",n(es !e& se"'nd- In m'dems sin(#e ",n(e ') si(n#+ s'metimes

t&ns)e&s se.e bits ') dt- As )& s t,e "'nd%"t'& *i&e is "'n"e&ned+ t,e

b%d &te nd b!s &e t,e sme+ nd )'& t,is &es'n *e %se t,e b!s nd b%d

inte&",n(eb#y-

T,e dt t&ns)e& &te ') (i.en "'m!%te& system de!ends 'n

"'mm%ni"ti'n !'&ts in"'&!'&ted int' t,t system- F'& e3m!#e+ t,e ey

IPC?:T "'%#d t&ns)e& dt t t,e &te ') 1 t' b!s- In &e"ent ye&s+

,'*e.e&+ Penti%m bsed PCS t&ns)e& dt t &tes s ,i(, s 5J b!s- It m%st

be n'ted t,t in syn",&'n'%s se&i# dt "'mm%ni"ti'n+ t,e b%d &te is

(ene#y #imited t' 1+b!s-

RS232 Sta!ar!$

T' ##'* "'m!tibi#ity m'n( dt "'mm%ni"ti'n e6%i!ment mde by.&i'%s mn%)"t%&e&s+ n inte&)"in( stnd&d "##ed RS22 *s set by t,e

E#e"t&'ni"s Ind%st&ies Ass'"iti'n 7EIA8 in 1- In 1 it *s m'di)ied nd

"##ed RS22A- RS22 AND RS22C *e&e iss%ed in 15 nd 1+

&es!e"ti.e#y- T'dy+ RS22 is t,e m'st *ide#y %sed se&i# I?O inte&)"in(

stnd&d- T,is stnd&d is %sed in PCs nd n%me&'%s ty!es ') e6%i!ment-

#3


54/105

H'*e.e&+ sin"e t,e stnd&d *s set #'n( be)'&e t,e d.e&t ') t,e TTL #'(i"

)mi#y+ its in!%t nd '%t!%t .'#t(e #e.e#s &e n't TTL "'m!tib#e- In RS22+ 1

is &e!&esented by $ t' $25V+ *,i#e bit is Q t' Q25V+ m/in( $ t' Q

%nde)ined- F'& t,is &es'n+ t' "'nne"t ny RS22 t' mi"&'"'nt&'##e& system

*e m%st %se .'#t(e "'n.e&te&s s%", s A:22 t' "'n.e&t t,e TTL #'(i" #e.e#s

t' t,e RS22 .'#t(e #e.e#s+ nd .i"e .e&s- A:22 IC ",i!s &e "'mm'n#y

&e)e&&ed t' s #ine d&i.e&s-

RS232 %i$

*S232 cable is commonly re&erred to as the D742# connector. -n labelin"8 D74

2#P re&ers to the %lu" connector (male) and D742#S is &or the soc!et connector (&emale).

Since not all the %ins are used in P cables8 -7M introduced the D74 ?ersion o& the

serial -F/ standard8 hich uses %ins only8 as shon in table.

1 2 3 : #

6 B @

7O%t ') "'m!%te& nd e3!'sed end ') "b#e8

Fi( 21 D$ !in "'nne"t'&

Pin F%n"ti'ns

Pin Descri%tion

1 Data carrier detect (DD)

2 *eceied data (*KD)

3 ransmitted data (KD): Data terminal ready(D*)

# Si"nal "round (,+D)

6 Data set ready (DS*)

B *euest to send (*S)

@ lear to send (S)

*in" indicator (*-)

#:


55/105

+ote'DCD@ DSR@ RTSandCTSare actie lo %ins.

he method used by *S4232 &or communication allos &or a sim%le connection o& three

lines'


56/105

)'& R:D &e desi(nted s R1 nd R2- In mny !!#i"ti'ns 'n#y 'ne ') e", is

%sed-

(mbedded

.ontroller

*KD

)KD

)KD

*KD2

3

#

,+D

MAK 232

FIM 22 CONNECTINM C t' PC %sin( A: 22

I&TERR!PTS

A sin"le microcontroller can sere seeral deices. here are to ays to do

that' -+**$PS or P/-+,.

POLLIN5

-n %ollin" the microcontroller continuously monitors the status o& a "ien

deiceO hen the status condition is met8 it %er&orms the serice .A&ter that8 it moes on

to monitor the ne


57/105

INTERRUPTS

-n the interru%ts method8 heneer any deice needs its serice8 the deice

noti&ies the microcontroller by sendin" it an interru%ts si"nal. $%on receiin" an interru%t

si"nal8 the microcontroller interru%ts hateer it is doin" and seres the deice. he

%ro"ram associated ith the interru%ts is called the interru%t serice routine (-S*).or

interru%t handler.

INTERRUPTS V$ POLLIN5

he adanta"e o& interru%ts is that the microcontroller can sere many

deices (not all the same time8 o& course)O each deice can "et the attention o& the

microcontroller based n the %riority assi"ned to it. he %ollin" method cannot assi"n

%riority since it chec!s all deices in round4robin &ashion. More im%ortantly8 in the

interru%t method the microcontroller can also i"nore (mas!) a deice reuest &or serice.

his is a"ain not %ossible ith the %ollin" method. he most im%ortant reason that the

interru%t method is %re&erable is that the %ollin" method astes much o& the

microcontrollerEs time by %ollin" deices that do not need serice. So8 in order to aoid

tyin" don the microcontroller8 interru%ts are used.

INTERRUPT SERVICE ROUTINE

F'& e.e&y inte&&%!t+ t,e&e m%st be n inte&&%!t se&.i"e &'%tine 7ISR8+ '&

inte&&%!t ,nd#e&- W,en n inte&&%!t is in.'/ed+ t,e mi"&'"'nt&'##e& &%ns t,e

inte&&%!ts se&.i"e &'%tine- F'& e.e&y inte&&%!t+ t,e&e is )i3ed #'"ti'n in mem'&y

t,t ,'#ds t,e dd&ess ') its ISR- T,e (&'%! ') mem'&y #'"ti'n set side t' ,'#d

t,e dd&esses ') ISR nd is "##ed t,e Inte&&%!t Ve"t'& Tb#e- S,'*n be#'*

It"rr)%t V"&t#r Ta4l" '#r t-" 01

#B


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S.N#. INTERRUPT ROM LOCATION 9HE7 PIN FLA5

CLEARIN5

1- Reset A%t'

2- E3te&n# ,&d*&e

Inte&&%!t

P-2 7128 A%t'

- Time&s inte&&%!t

7TF8

A%t'

G- E3te&n# ,&d*&e

Inte&&%!t 17INT18

1 P- 718 A%t'

5- Time&s 1 inte&&%!t

7TF18

1 A%t'

- Se&i# CO 7RI

nd TI8

2 P&'(&mme&

"#e&s it

Si> It"rr)%t$ i t-" 01

In &e#ity+ 'n#y )i.e inte&&%!ts &e .i#b#e t' t,e %se& in t,e @51+ b%t

mny mn%)"t%&e&s dt s,eets stte t,t t,e&e &e si3 inte&&%!ts sin"e t,ey

in"#%de &eset -t,e si3 inte&&%!ts in t,e @51 &e ##'"ted s b'.e-

1- Reset- W,en t,e &eset !in is "ti.ted+ t,e @51


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&e)e&&ed t' s E:1 nd E:2-em'&y #'"ti'n H nd 1H in t,e

inte&&%!t .e"t'& tb#e &e ssi(ned t' INT nd INT1+ &es!e"ti.e#y-

G- Se&i# "'mm%ni"ti'n ,s sin(#e inte&&%!t t,t be#'n(s t' b't, &e"ei.e

nd t&nsmit- T,e inte&&%!t .e"t'& tb#e #'"ti'n 2H be#'n(s t' t,is

inte&&%!t-

N'ti"e t,t #imited n%mbe& ') bytes &e set side )'& e", inte&&%!t- F'&

e3m!#e+ t't# ') @ bytes )&'m #'"ti'n t' A is set side )'& INT+

e3te&n# ,&d*&e inte&&%!t -simi#y+ t't# ') @ bytes )&'m #'"ti'n H t'

12H is &ese&.ed )'& TF+ Time& inte&&%!t- I) t,e se&.i"e &'%tine )'& (i.en

inte&&%!t is s,'&t en'%(, t' )it in t,e mem'&y s!"e ##'"ted t' it+ it is !#"ed in

t,e .e"t'& tb#e= 't,e&*ise+ nd n L9P inst&%"ti'n is !#"ed in t,e .e"t'& tb#e

t' !'int t' t,e dd&ess ') t,e ISR- In t,t &est ') t,e bytes ##'"ted t' t,t

inte&&%!t &e %n%sed-

F&'m t,e b'.e tb#e #s' n'ti"e t,t 'n#y t,&ee bytes ') RO s!"e

&e ssi(ned t' t,e &eset !in- T,ey &e RO dd&ess #'"ti'n +1 nd2-dd&ess

#'"ti'n be#'n(s t' e3te&n# ,&d*&e inte&&%!t -)'& t,is &es'n+ in '%& !&'(&m

*e !%t t,e L9P s t,e )i&st inst&%"ti'n nd &edi&e"t t,e !&'"ess'& *y )&'m

t,e inte&&%!t .e"t'& tb#e+ s s,'*n be#'*

St"%$ i ">"&)ti8 a it"rr)%t

U!'n "ti.ti'n ') n inte&&%!t+ t,e mi"&'"'nt&'##e& ('es t,&'%(, t,e )'##'*in(

ste!s-

1- It )inis,es t,e inst&%"ti'n it is e3e"%tin( nd s.es t,e dd&ess ') t,e ne3t

inst&%"ti'n 7PC8 'n t,e st"/-2- It #s' s.es t,e "%&&ent stt%s ') ## t,e inte&&%!ts inte&n##y 7i-e-+ n't 'n

t,e st"/8-

- It


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G- T,e mi"&'"'nt&'##e& (ets t,e dd&ess ') t,e ISR )&'m t,e inte&&%!t .e"t'&

tb#e nd


61/105

EA IE- disb#es ## inte&&%!ts- I) EA+ n' inte&&%!ts is "/n'*#ed(ed-

I) EA1+ e", inte&&%!t s'%&"e is indi.id%##y enb#ed disb#ed

y settin( '& "#e&in( its enb#e bit-

$$ IE- N't im!#emented+ &ese&.ed )'& )%t%&e %se-

ET2 IE-5 Enb#es '& disb#es Time& 2 '.e&)#'* '& "!t%&e inte&&%!t 7@52

On#y8

ES IE-G Enb#es '& disb#es t,e se&i# !'&t inte&&%!ts-

ET1 IE- Enb#es '& disb#es Time&s 1 '.e&)#'* inte&&%!t

E:1 IE-2 Enb#es '& disb#es e3te&n# inte&&%!t 1-

ET IE-1 Enb#es '& disb#es Time& '.e&)#'* inte&&%!t-

E: IE- Enb#es '& disb#es e3te&n# inte&&%!t-

CHAPTER 3

61


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P'(ER S!PPY

P'(ER S!PPY

All di"ital circuits reuire re"ulated %oer su%%ly. -n this article e are "oin" to learn

ho to "et a re"ulated %ositie su%%ly &rom the mains su%%ly.

=i"ure 1 shos the basic bloc! dia"ram o& a &i


63/105

A trans&ormer consists o& to coils also called as C;-+D-+,S namely P*-MA*5 R

S/+DA*5.

hey are lin!ed to"ether throu"h inductiely cou%led electrical conductors also called as

/*. A chan"in" current in the %rimary causes a chan"e in the Ma"netic =ield in the

core R this in turn induces an alternatin" olta"e in the secondary coil. -& load is a%%lied

to the secondary then an alternatin" current ill &lo throu"h the load. -& e consider an

ideal condition then all the ener"y &rom the %rimary circuit ill be trans&erred to the

secondary circuit throu"h the ma"netic &ield.

S'

he secondary olta"e o& the trans&ormer de%ends on the number o& turns in the Primary as ell as

the secondary.

63


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Rectifier

A recti&ier is a deice that conerts an A si"nal into D si"nal. =or recti&ication %ur%ose

e use a diode8 a diode is a deice that allos current to %ass only in one direction i.e.

hen the anode o& the diode is %ositie ith res%ect to the cathode also called as &orard

biased condition R bloc!s current in the reersed biased condition.

*ecti&ier can be classi&ied as &ollos'

1 Hal' ,a+" r"&ti'i"r.

his is the sim%lest ty%e o& recti&ier as you can see in the dia"ram a hal& ae recti&ier

consists o& only one diode. ;hen an A si"nal is a%%lied to it durin" the %ositie hal&

cycle the diode is &orard biased R current &los throu"h it. 7ut durin" the ne"atie hal&

cycle diode is reerse biased R no current &los throu"h it. Since only one hal& o& the

in%ut reaches the out%ut8 it is ery ine&&icient to be used in %oer su%%lies.

6:


65/105

2 F)ll (a+" r"&ti'i"r.

al& ae recti&ier is uite sim%le but it is ery ine&&icient8 &or "reater e&&iciency e

ould li!e to use both the hal& cycles o& the A si"nal. his can be achieed by usin" a

center ta%%ed trans&ormer i.e. e ould hae to double the si9e o& secondary indin" R

%roide connection to the center. So durin" the %ositie hal& cycle diode D1 conducts R

D2 is in reerse biased condition. Durin" the ne"atie hal& cycle diode D2 conducts R D1

is reerse biased. hus e "et both the hal& cycles across the load.

/ne o& the disadanta"es o& =ull ;ae *ecti&ier desi"n is the necessity o& usin" a center

ta%%ed trans&ormer8 thus increasin" the si9e R cost o& the circuit. his can be aoided by

usin" the =ull ;ae 7rid"e *ecti&ier.

3 Brid"e Rectifier.

6#


66/105

As the name su""ests it conerts the &ull ae i.e. both the %ositie R the ne"atie hal&

cycle into D thus it is much more e&&icient than al& ;ae *ecti&ier R that too ithout

usin" a center ta%%ed trans&ormer thus much more cost e&&ectie than =ull ;ae

*ecti&ier.

=ull 7rid"e ;ae *ecti&ier consists o& &our diodes namely D18 D28 D3 and D:. Durin"

the %ositie hal& cycle diodes D1 R D: conduct hereas in the ne"atie hal& cycle diodes

D2 R D3 conduct thus the diodes !ee% sitchin" the trans&ormer connections so e "et

%ositie hal& cycles in the out%ut.

66


67/105

-& e use a center ta%%ed trans&ormer &or a brid"e recti&ier e can "et both %ositie R

ne"atie hal& cycles hich can thus be used &or "eneratin" &i


68/105

-& e "o on increasin" the alue o& the &ilter ca%acitor then the *i%%le ill decrease. 7ut then th

costin" ill increase. he alue o& the =ilter ca%acitor de%ends on the current consumed by the circu

the &reuency o& the ae&orm R the acce%ted ri%%le.

;here8

?r acce%ted ri%%le olta"e. (Should not be more than 10 o& the olta"e)

- current consumed by the circuit in Am%eres.

= &reuency o& the ae&orm. A hal& ae recti&ier has only one %ea! in one cycle so =2# 9

;hereas a &ull ae recti&ier has o %ea!s in one cycle so =100 9.

6@


69/105

7'TA)E RE)!AT'R

A ?olta"e re"ulator is a deice hich conerts aryin" in%ut olta"e into a constant

re"ulated out%ut olta"e. ?olta"e re"ulator can be o& to ty%es

1) inear ?olta"e *e"ulator Also called as *esistie ?olta"e re"ulator because they

dissi%ate the e


70/105

2 Circuit dia"ram9

6i" 0.2. Circuit Dia"ram of


71/105

Tab#e 0.+. S


72/105

AP* #

SP-=-D +//,5

B2


73/105

TRIAChe *-A is a three terminal semiconductor deice &or controllin" current. -t "ains its

name &rom the term TRIode &or Alternatin" Current.

-t is e&&ectiely a deelo%ment o& the S* or thyristor8 but unli!e the thyristor hich isonly able to conduct in one direction8 the *-A is a bidirectional deice.

TRIAC / thyristor comparison

he *-A is an ideal deice to use &or A sitchin" a%%lications because it can control

the current &lo oer both hales o& an alternatin" cycle. A thyristor is only able tocontrol them oer one hal& o& a cycle. Durin" the remainin" hal& no conduction occurs

and accordin"ly only hal& the ae&orm can be utilised.

Ty%i&al 6 i!"ali$"! TRIAC ? t-yri$t#r $(it&-i8 (a+"'#r*$

he &act that the *-A can be used to control current sitchin" on both hales o& an

alternatin" ae&orm allos much better %oer utilisation. oeer the *-A is not

alays as conenient &or some hi"h %oer a%%lications here its sitchin" is more

di&&icult.

B3


74/105

TRIAC symbol

he circuit symbol reco"nises the ay in hich the *-A o%erates. Seen &rom the

outside it may be ieed as to bac! to bac! thyristors and this is hat the circuitsymbol indicates.

TRIAC $y*4#l '#r &ir&)it !ia8ra*$

/n the *-A symbol there are three terminals. hese are the ,ate and to other

terminals are o&ten re&erred to as an VAnodeV or VMain erminalV. As the *-A has too& these they are labelled either Anode 1 and Anode 2 or Main erminal8 M1 and M2.

TRIAC basics

he *-A is a com%onent that is e&&ectiely based on the thyristor. -t %roides Asitchin" &or electrical systems. i!e the thyristor8 the *-As are used in many

electrical sitchin" a%%lications. hey &ind %articular use &or circuits in li"ht dimmers8etc.8 here they enable both hales o& the A cycle to be used. his ma!es them more

e&&icient in terms o& the usa"e o& the %oer aailable. ;hile it is %ossible to use to

thyristors bac! to bac!8 this is not alays cost e&&ectie &or lo cost and relatiely lo

%oer a%%lications.

-t is %ossible to ie the o%eration o& a *-A in terms o& to thyristors %laced bac! to

bac!.

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TRIAC "@)i+al"t a$ t(# t-yri$t#r$

/ne o& the drabac!s o& the *-A is that it does not sitch symmetrically. -t ill o&tenhae an o&&set8 sitchin" at di&&erent "ate olta"es &or each hal& o& the cycle. his creates

additional harmonics hich is not "ood &or M %er&ormance and also %roides an

imbalance in the system

-n order to im%roe the sitchin" o& the current ae&orm and ensure it is moresymmetrical is to use a deice e


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A!+ata8"$ Di$a!+ata8"$

Cn s*it", b't,,#.es ') n AC

*.e)'&m

Sin(#e "'m!'nent

"n be %sed )'& )%##AC s*it",in(

A TRIAC d'es n't )i&e

symmet&i"##y 'n b't, sides ')t,e *.e)'&m

S*it",in( (i.es &ise t' ,i(, #e.e#') ,&m'ni"s d%e t' n'n$symmet&i"# s*it",in(

'&e s%s"e!tib#e t' EI

!&'b#ems s &es%#t ') t,e n'n$symmet&i"# s*it",in(

C&e m%st be t/en t' ens%&e t,e

TRIAC t%&ns ')) )%##y *,en %sed*it, ind%"ti.e #'ds

Des%ite hat may seem li!e a number o& disadanta"es8 it is still the best o%tion &or manycircumstances. oeer hen usin" a *-A8 it is necessary to be aare o& its

limitations so that these can be satis&actorily addressed and oercome should they a&&ect

the o%eration o& the oerall circuit in any si"ni&icant ay.

Applications

*-As are used in a number o& a%%lications. oeer they tend not to be used in hi"h

%oer sitchin" a%%lications 4 one o& the reasons &or this is the non4symmetricalsitchin" characteristics. =or hi"h %oer a%%lications this creates a number o&

di&&iculties8 es%ecially ith electroma"netic inter&erence.

oeer *-As are still used &or many electrical sitchin" a%%lications'

D'mesti" #i(,t dimme&s

E#e"t&i" )n s!eed "'nt&'#s

Sm## m't'& "'nt&'#s

C'nt&'# ') sm## AC !'*e&ed d'mesti" !!#in"es

he *-A is easy to use and %roides cost adanta"es oer the use o& to thyristors &ormany lo %oer a%%lications. ;here hi"her %oers are needed8 to thyristors %laced in

Vanti4%arallelV are almost alays used.

he *-A is an electronic com%onent that is idely used in many circuit a%%lications8ran"in" &rom li"ht dimmers throu"h to arious &orms o& A control. -t is "enerally only

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used &or loer %oer a%%lications8 thyristors "enerally bein" used &or the hi"h %oer

sitchin" circuits

he *-A structure is ery di&&erent to that o& the ordinary thyristor.

ain" the ability to sitch si"nals on both hales o& a cycle reuires the *-Astructure to be considerably more com%licated than other similar deices.

+eertheless the *-A &abrication is ell established and *-As are idely and

chea%ly aailable.

TRIAC structure

he structure o& a *-A may be considered to be a D-A ith an additional "ate

contact %roided to enable control o& the deice.

i!e other %oer deices8 the *-A is normally made o& silicon. $sin" a silicon&abrication %rocess &urther enables the deices to be %roduced ery chea%ly. he mar!et

ould not tolerate the deices i& they ere made usin" more e


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Additionally connections &or both anodes or main terminals8 i.e. M1 and M2 cross %

and n re"ions as shon. .

*-A theory can be ta!en at seeral leels8 and this can be used to sho the *-Ao%eration8 and ho it can be used in electronics circuits.

he *-A o%eration can be ieed on a number o& leels8 shoin" ho the *A-

o%eration in arious circuits can be desi"ned to oercome some o& the issues.

TRIAC operation

-t can be ima"ined &rom the circuit symbol that the *-A consists o& to thyristors bac!

to bac! but ith a common "ate terminal8 and the cathode o& one thyristor connected to

the anode o& the other8 and ice ersa. his con&i"uration is more correctly termed

anti%arallel

/n a basic leel8 the o%eration o& the *-A can be loo!ed on in the &ormat o& the

anti%arallel thyristors8 althou"h the actual o%eration at the semiconductor leel is rather

com%licated.

;hen the olta"e on the M1 is %ositie ith re"ard to M2 and a %ositie "ate olta"eis a%%lied8 one o& the S*s conducts. ;hen the olta"e is reersed and a ne"atie

olta"e is a%%lied to the "ate8 the other S* conducts. his is %roided that there is

su&&icient olta"e across the deice to enable a minimum holdin" current to &lo.

E@)i+al"t &ir&)it #' a TRIAC

-n terms o& the structure o& the deice8 and its more detailed o%eration8 the main terminals

M1 and M2 are both connected to % and n re"ions ithin the deice. he current %ath

de%ends u%on the %olarity o& the olta"e across the main terminals.

As there is considerable sco%e &or con&usion8 the deice %olarity is normally describedith re&erence to M1.

B@


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-n terms o& its o%eration8 the /+ characteristics &or a *-A in any direction are similar

to that o& a thyristor. oeer as a result o& the %hysical structure o& the *-A8 the

latchin" current8 holdin" current8 and "ate tri""er current ary accordin" to the di&&erenthales o& the cycle and hich VthyristorV ithin the *-A is bein" used.

TRIAC switching issues

*-As do not &ire symmetrically as a result o& sli"ht di&&erences beteen the to haleso& the deice. his results in harmonics bein" "enerated and the less symmetrical the

*-A &ires8 the "reater the leel o& harmonics %roduced. -t is "enerally undesirable to

hae hi"h leels o& harmonics in a %oer system and as a result *-As are not &aoured&or hi"h %oer systems. -nstead to thyristors may be used as it is easier to control their

&irin".

DIAC a! TRIAC "&t"! t#8"t-"r

o hel% in oercomin" this %roblem8 a deice !non as a D-A (D-ode A sitch) is

o&ten %laced in series ith the "ate. his deice hel%s ma!e the sitchin" more een &or

both hales o& the cycle. his results &rom the &act that the D-A sitchin" characteristicis &ar more een than that o& the *-A. Since the D-A %reents any "ate current

&loin" until the tri""er olta"e has reached a certain olta"e in either direction8 this

ma!es the &irin" %oint o& the *-A more een in both directions.

Current Transformer Basics

he Current Transformer( C.T.)8 is a ty%e o& Vinstrument trans&ormerV that isdesi"ned to %roduce an alternatin" current in its secondary indin" hich is %ro%ortional

to the current bein" measured in its %rimary. Current transformersreduce hi"h olta"ecurrents to a much loer alue and %roide a conenient ay o& sa&ely monitorin" the

actual electrical current &loin" in an A transmission line usin" a standard ammeter.

he %rinci%al o& o%eration o& a current trans&ormer is no di&&erent &rom that o& an ordinarytrans&ormer.

B


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Ty!i"# C%&&ent T&ns)'&me&

$nli!e the olta"e or %oer trans&ormer loo!ed at %reiously8 the current trans&ormerconsists o& only one or ery &e turns as its %rimary indin". his %rimary indin" can

be o& either a sin"le &lat turn8 a coil o& heay duty ire ra%%ed around the core or just a

conductor or bus bar %laced throu"h a central hole as shon.

Due to this ty%e o& arran"ement8 the current trans&ormer is o&ten re&erred too as a Vseriestrans&ormerV as the %rimary indin"8 hich neer has more than a ery &e turns8 is in

series ith the current carryin" conductor.

he secondary indin" may hae a lar"e number o& coil turns ound on a laminated coreo& lo4loss ma"netic material hich has a lar"e cross4sectional area so that the ma"netic

&lu< density is lo usin" much smaller cross4sectional area ire8 de%endin" u%on ho

much the current must be ste%%ed don. his secondary indin" is usually rated at a

standard 1 Am%ere or # Am%eres.

here are three basic ty%es o& current trans&ormers' VoundV8 VtoroidalV and VbarV.

W'%nd "%&&ent t&ns)'&me&s T,e t&ns)'&me&s !&im&y *indin( is

!,ysi"##y "'nne"ted in se&ies *it, t,e "'nd%"t'& t,t "&&ies t,emes%&ed "%&&ent )#'*in( in t,e "i&"%it- T,e m(nit%de ') t,e se"'nd&y"%&&ent is de!endent 'n t,e t%&ns &ti' ') t,e t&ns)'&me&-

T'&'id# "%&&ent t&ns)'&me&s T,ese d' n't "'ntin !&im&y *indin(-

Insted+ t,e #ine t,t "&&ies t,e "%&&ent )#'*in( in t,e net*'&/ is t,&ededt,&'%(, *ind'* '& ,'#e in t,e t'&'id# t&ns)'&me&- S'me "%&&entt&ns)'&me&s ,.e 4s!#it "'&e4 *,i", ##'*s it t' be '!ened+ inst##ed+nd "#'sed+ *it,'%t dis"'nne"tin( t,e "i&"%it t' *,i", t,ey &e tt",ed-

&$ty!e "%&&ent t&ns)'&me&s T,is ty!e ') "%&&ent t&ns)'&me& %ses t,e

"t%# "b#e '& b%s$b& ') t,e min "i&"%it s t,e !&im&y *indin(+ *,i", ise6%i.#ent t' sin(#e t%&n- T,ey &e )%##y ins%#ted )&'m t,e ,i(, '!e&tin(.'#t(e ') t,e system nd &e %s%##y b'#ted t' t,e "%&&ent "&&yin( de.i"e-

@0


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Current transformerscan reduce or Vste%4donV current leels &rom thousands o&am%eres don to a standard out%ut o& a !non ratio to either # Am%s or 1 Am% &or

normal o%eration. hus8 small and accurate instruments and control deices can be usedith Ts because they are insulated aay &rom any hi"h4olta"e %oer lines. here are

a ariety o& meterin" a%%lications and uses &or current trans&ormers such as ith

attmeterTs8 %oer &actor meters8 att4hour meters8 %rotectie relays8 or as tri% coils inma"netic circuit brea!ers8 or M7Ts.

Current Transformer

,enerally current trans&ormers and ammeters are used to"ether as a matched %air inhich the desi"n o& the current trans&ormer is such as to %roide a ma


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&rom hich e "et'

As the %rimary usually consists o& one or to turns hilst the secondary can hae seeralhundred turns8 the ratio beteen the %rimary and secondary can be uite lar"e. =or

e


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o& 0.2WTs. he ammeter is reuired to "ie a &ull scale de&lection hen the %rimary

current is @00 Am%s. alculate the ma


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#andheld Current Transformers

here are many s%eciali9ed ty%es o& current trans&ormers no aailable. A %o%ular and

%ortable ty%e hich can be used to measure circuit loadin" are called Vclam% metersV asshon. lam% meters o%en and close around a current carryin" conductor and measure its

current by determinin" the ma"netic &ield around it8 %roidin" a uic! measurementreadin" usually on a di"ital dis%lay ithout disconnectin" or o%enin" the circuit.

As ell as the handheld clam% ty%e 8 s%lit core current trans&ormers are aailablehich has one end remoable so that the load conductor or bus bar does not hae to be

disconnected to install it. hese are aailable &or measurin" currents &rom 100 u% to #000

am%s8 ith suare indo si9es &rom 1V to oer 12V (2#4to4300mm).

hen to summarise8 the Current Transformer@ >CT?is a ty%e o& instrument trans&ormerused to conert a %rimary current into a secondary current throu"h a ma"netic medium.

-ts secondary indin" then %roides a much reduced current hich can be used &or

detectin" oercurrent8 undercurrent8 %ea! current8 or aera"e current conditions.

A current trans&ormers %rimary coil is alays connected in series ith the mainconductor "iin" rise to it also bein" re&erred to as a series trans&ormer. he nominal

secondary current is rated at 1A or #A &or ease o& measurement. onstruction can be one

sin"le %rimary turn as in oroidal8 Donut8 or 7ar ty%es8 or a &e ound %rimary turns8usually &or lo current ratios.

urrent trans&ormers are intended to be used as %ro%ortional current deices. here&ore a

current trans&ormers secondary indin" should neer be o%erated into an o%en circuit8

just as a olta"e trans&ormer should neer be o%erated into a short circuit. ?ery hi"h

olta"es ill result &rom o%en circuitin" the secondary circuit o& an ener"i9ed so theirterminals must be short4circuited i& the ammeter is to be remoed or hen a is not in

use be&ore %oerin" u% the system.

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CD $'D!E

T' dis!#y inte&"ti.e mess(es *e &e %sin( LCD 'd%#e- We e3minen inte##i(ent LCD dis!#y ') t*' #ines+1 ",&"te&s !e& #ine t,t is inte&)"ed t'

t,e "'nt&'##e&s- T,e !&'t'"'# 7,nds,/in(8 )'& t,e dis!#y is s s,'*n- W,e&es

D t' Dt, bit is t,e Dt #ines+ RS+ RW nd EN !ins &e t,e "'nt&'# !ins nd

&eminin( !ins &e Q5V+ $5V nd MND t' !&'.ide s%!!#y- W,e&e RS is t,e

Re(iste& Se#e"t+ RW is t,e Red W&ite nd EN is t,e Enb#e !in-

T,e dis!#y "'ntins t*' inte&n# byte$*ide &e(iste&s+ 'ne )'& "'mmnds

7RS8 nd t,e se"'nd )'& ",&"te&s t' be dis!#yed 7RS18- It #s' "'ntins

%se&$!&'(&mmed RA &e 7t,e ",&"te& RA8 t,t "n be !&'(&mmed t'

(ene&te ny desi&ed ",&"te& t,t "n be )'&med %sin( d't mt&i3- T'

distin(%is, bet*een t,ese t*' dt &es+ t,e ,e3 "'mmnd byte @ *i## be %sed

t' si(ni)y t,t t,e dis!#y RA dd&ess , *i## be ",'sen-P'&t1 is %sed t'

)%&nis, t,e "'mmnd '& dt ty!e+ nd !'&ts -2 t'-G )%&nis, &e(iste& se#e"t nd

&ed?*&ite #e.e#s-

T,e dis!#y t/es .&yin( m'%nts ') time t' ""'m!#is, t,e )%n"ti'ns s #isted-

LCD bit is m'nit'&ed )'& #'(i" ,i(, 7b%sy8 t' ens%&e t,e dis!#y is '.e&*&itten-

Li6%id C&yst# Dis!#y #s' "##ed s LCD is .e&y ,e#!)%# in !&'.idin( %se&

inte&)"e s *e## s )'& deb%((in( !%&!'se- T,e m'st "'mm'n ty!e ') LCD

"'nt&'##e& is HITACHI GG@ *,i", !&'.ides sim!#e inte&)"e bet*een t,e

"'nt&'##e& n LCD- T,ese LCD;s &e .e&y sim!#e t' inte&)"e *it, t,e "'nt&'##e&

s *e## s &e "'st e))e"ti.e-

@#


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231 Line A#!,n%me&i" LCD Dis!#y

T,e m'st "'mm'n#y %sedALPHANUMERICdis!#ys &e 1x16 7Sin(#e Line 1

",&"te&s8+ 2x16 7D'%b#e Line 1 ",&"te& !e& #ine8 4x20 7)'%& #ines

T*enty ",&"te&s !e& #ine8-

T,e LCD &e6%i&es "'nt&'# #ines 7RS+ R?W EN8 @ 7'& G8 dt #ines- T,e

n%mbe& 'n dt #ines de!ends 'n t,e m'de ') '!e&ti'n- I) '!e&ted in @$bit

m'de t,en @ dt #ines Q "'nt&'# #ines i-e- t't# 11 #ines &e &e6%i&ed- And i)

'!e&ted in G$bit m'de t,en G dt #ines Q "'nt&'# #ines i-e- #ines &e &e6%i&ed-

H'* d' *e de"ide *,i", m'de t' %se> Its sim!#e i) y'% ,.e s%))i"ient dt #ines

y'% "n (' )'& @ bit m'de i) t,e&e is time "'nst&in i-e- dis!#y s,'%#d be

)ste& t,en *e ,.e t' %se @$bit m'de be"%se bsi"##y G$bit m'de t/es t*i"e sm'&e time s "'m!&ed t' @$bit m'de-

Pin Symbol Function

1 Vss Ground

2 Vdd Supply Voltage

3 Vo Contrast Setting

4 RS Register Select

5 R/ Read/rite Select

! "n C#ip "nable Signal

$%14 &'(%&'$ &ata )ines

15 */VeeGnd +or t#e

bac,lig#t

1! - Vcc +or bac,lig#t

W,en Ris #'* 78+ t,e dt is t' be t&eted s "'mmnd- W,en RS is ,i(,

718+ t,e dt bein( sent is "'nside&ed s te3t dt *,i", s,'%#d be dis!#yed 'n

t,e s"&een-

@6


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W,en R!"is #'* 78+ t,e in)'&mti'n 'n t,e dt b%s is bein( *&itten t' t,e LCD-

W,en RW is ,i(, 718+ t,e !&'(&m is e))e"ti.e#y &edin( )&'m t,e LCD- 'st ')

t,e times t,e&e is n' need t' &ed )&'m t,e LCD s' t,is #ine "n di&e"t#y be

"'nne"ted t' Mnd t,%s s.in( 'ne "'nt&'##e& #ine-

T,e ENA#LE !in is %sed t' #t", t,e dt !&esent 'n t,e dt !ins- A HIMH $

LOW si(n# is &e6%i&ed t' #t", t,e dt- T,e LCD inte&!&ets nd e3e"%tes '%&

"'mmnd t t,e instnt t,e EN #ine is b&'%(,t #'*- I) y'% ne.e& b&in( EN #'*+

y'%& inst&%"ti'n *i## ne.e& be e3e"%ted-

COMMANDS USED IN LCD

@B


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@@


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CHAPTER 1

S'6T(ARE DE7E'P$E&T

S'6T(ARE

@


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7ision2

>?ision3 is an -D (-nte"rated Deelo%ment nironment) that hel%s you rite8 com%ile8

and debu" embedded %ro"rams. -t enca%sulates the &olloin" com%onents'

A %roject mana"er.

A ma!e &acility.

ool con&i"uration.

ditor.

A %oer&ul debu""er.

o hel% you "et started8 seeral e


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6. Select Project 4 /%tions and set the tool o%tions. +ote hen you select the tar"et

deice &rom the Deice DatabaseY all s%ecial o%tions are set automatically. 5ou

ty%ically only need to con&i"ure the memory ma% o& your tar"et hardare. De&ault

memory model settin"s are o%timal &or most a%%lications.

B. Select Project 4 *ebuild all tar"et &iles or 7uild tar"et.

Debu""in" an A


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his selection sets necessary tool o%tions &or the @0#1*DN deice and sim%li&ies in this

ay the tool on&i"uration.

Bui#din" Pro=ects and Creatin" a HE* 6i#es

y%ical8 the tool settin"s under /%tions I ar"et are all you need to start a ne

a%%lication. 5ou may translate all source &iles and line the a%%lication ith a clic! on the

7uild ar"et toolbar icon. ;hen you build an a%%lication ith synta< errors8 >?ision2

ill dis%lay errors and arnin" messa"es in the /ut%ut

;indo I 7uild %a"e. A double clic! on a messa"e line o%ens the source &ile on the

correct location in a >?ision2 editor indo.

/nce you hae success&ully "enerated your a%%lication you can start debu""in".

A&ter you hae tested your a%%lication8 it is reuired to create an -ntel K &ile to

donload the so&tare into an P*/M %ro"rammer or simulator. >?ision2 creates K

&iles ith each build %rocess hen reate K &iles under /%tions &or ar"et I /ut%ut is

enabled. 5ou may start your P*/M %ro"rammin" utility a&ter the ma!e %rocess hen

you s%eci&y the %ro"ram under the o%tion *un $ser Pro"ram Q1.

CP! Simu#ation

>?ision2 simulates u% to 16 Mbytes o& memory &rom hich areas can be ma%%ed &or

read8 rite8 or code e?ision2 simulator tra%s and re%orts ille"al

memory accesses bein" done.

-n addition to memory ma%%in"8 the simulator also %roides su%%ort &or the inte"rated

%eri%herals o& the arious @0#1 deriaties. he on4chi% %eri%herals o& the P$ you hae

selected are con&i"ured &rom the Deice

2


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Database se#ection

5ou hae made hen you create your %roject tar"et. *e&er to %a"e #@ &or more

-n&ormation about selectin" a deice. 5ou may select and dis%lay the on4chi% %eri%heral

com%onents usin" the Debu" menu. 5ou can also chan"e the as%ects o& each %eri%heral

usin" the controls in the dialo" bo?ision2 ith the Debu" I StartFSto% Debu" Session

command. De%endin" on the /%tions &or ar"et I Debu" on&i"uration8 >?ision2 ill

load the a%%lication %ro"ram and run the startu% code >?ision2 saes the editor screen

layout and restores the screen layout o& the last debu" session. -& the %ro"ram e?ision2 o%ens an editor indo ith the source te


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-& you select the Disassembly ;indo as the actie indo all %ro"ram ste%

commands or! on P$ instruction leel rather than %ro"ram source lines. 5ou can

select a te


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=i" 33' ne %roject

5. Sae the Project by ty%in" suitable %roject name ith no e


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=i" 3#' select deice &oer tar"et

+/. hen lic! on C/J

++. he =olloin" &i" ill a%%ear

=i" 36' o%y @0#1 startu% code

+0. hen lic! either 5S or +/ZZZmostly C+/

+2. +o your %roject is ready to $S

B


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+3. +o double clic! on the ar"et18 you ould "et another o%tion CSource

"rou% 1 as shon in ne


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+1. he ne


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=i" :0' =ile Sae

+8. +o ri"ht clic! on Source "rou% 1 and clic! on CAdd fi#es to )rou

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