Doc.No. Rev.No PageLTP500WV-F01 /30105-000-G-050130
Preliminary
TO DATE
: Computer Division in SAMSUNG Electronics: January. 30.2005
NOTE :
SAMSUNG ELECTRONICS CO., LTD.
APPROVED BY :
Any Modification of Spec is not allowed without SEC’s permission.
SAMSUNG TFT-LCD
MODEL NO.:LTP500WV-F01SAMSUNG TFT-LCD
MODEL NO.:LTP500WV-F01
PREPARED BY :
Doc.No. Rev.No PageLTP500WV-F01 /30205-000-G-050130
PreliminaryCONTENTS
Revision History
General Description
1. Absolute Maximum Ratings1.1 Absolute Ratings Of Environment1.2 Electrical Absolute Ratings
2. Optical Characteristics
3. Electrical Characteristics3.1 TFT LCD Module3.2 Back-light Unit
4. Block Diagram4.1 TFT LCD Module4.2 Back-light Unit
5. Input Terminal Pin Assignment5.1 Input Signal & Power 5.2 Back-light Unit5.3 Input Signals, Basic Display Colors and Gray Scale of Each Color.5.4 Pixel format
6. Interface Timing6.1 Timing Parameters 6.2 Power ON/OFF Sequence6.3 Timing Diagrams of Interface Signal( TFT-LCD Module)
7. Outline Dimension
8. Reference Circuit
9. Packing
10. Markings & others
11. General Precautions
- - - - - - - - - - - - - - - - - - - ( 3 )
- - - - - - - - - - - - - - - - - - - ( 4 )
- - - - - - - - - - - - - - - - - - - ( 5 )
- - - - - - - - - - - - - - - - - - - ( 7 )
- - - - - - - - - - - - - - - - - - - ( 10 )
- - - - - - - - - - - - - - - - - - - ( 13 )
- - - - - - - - - - - - - - - - - - - ( 14 )
- - - - - - - - - - - - - - - - - - - ( 18 )
- - - - - - - - - - - - - - - - - - - ( 22 )
- - - - - - - - - - - - - - - - - - - ( 23 )
- - - - - - - - - - - - - - - - - - - ( 25 )
- - - - - - - - - - - - - - - - - - - ( 26 )
- - - - - - - - - - - - - - - - - - - ( 27 )
Doc.No. Rev.No PageLTP500WV-F01 /30305-000-G-050130
Preliminary
Date Rev.No. Summary
Revision HistoryRevision History
Page
Jan.30.2005 000 Rev.000 was first issues.
Doc.No. Rev.No PageLTP500WV-F01 /30405-000-G-050130
PreliminaryGENERAL DESCRIPTIONDESCRIPTION
LTP500WV-F01 is a color active matrix TFT (Thin Film Transistor) liquid crystal display(LCD) that uses amorphous silicon TFT as a switching devices. This model is composed of a TFT LCD panel, a driver circuit and a back-light system. The resolution of a 5″Contains 800 x 480 pixels and can display up to 262,144colors. 12 o'clock direction isthe optimum viewing angle.
FEATURES• High Brightness.• High contrast ratio.• 6Bits color depth.• High resolution( 800X480 ).• Low power consumption.• Back light with 12 LED( Light Emitting Diode ).
APPLICATIONS
• Display terminals for PDA application products.• Smart phone / Game machine / Camcorder / Hand held PC
GENERAL INFORMATION
Display area 109.2(H) x 65.52(V) (5″ diagonal )
Pixel arrangement RGB vertical stripe
ITEM SPECIFICATION
mm
pixel
Pixel pitch 0.1365(H) x 0.1365(V) (TYP.)
UNIT
Normally whiteDisplay Mode
Display colors 262,144
NOTE
Viewing Direction 12:00
Driver element a-Si TFT active matrix
Number of pixel 800×RGB(H) x 480(V)
mm
O’clock
Doc.No. Rev.No PageLTP500WV-F01 /30505-000-G-050130
Preliminary
1. ABSOLUTE MAXIMUM RATINGS
MECHANICAL INFORMATION
ITEM TYP. MAX. NOTE
Modulesize
Weight
122.4 122.7
79.0
MIN.
79.278.8
Horizontal (H)
Vertical (V)
Depth (D) 4.48
122.1
4.78 5.08
- 91
1.1 ABSOLUTE RATINGS OF ENVIRONMENT
Note (1) 90%RH maximum humidity, 60℃ maxmum wet-bulb temperature.(2) When operated at a temperature lower than 0 ℃, the LCD worked slowly and
the screen slowed appearing dim images due to the characteristics id LC(Liquid Crystal).
ITEM UNIT NOTE
Operating temperature(Temperature of glass surface)
SYMBOL MIN. MAX.
TSTG
TOPR -20 60
Storage temperature -30 70 °C
°C
Vibration (non-operating)
Shock ( non-operating ) Snop
Vnop
-
1.0-
50 G
G
(1)
(1)
(2),(4)
(3),(4)
g
mm
mm
mm
-
0-40 -20 0 20 40 60 80
5
Relative Humidity ( %RH)
Temperature (OC)
40
60
80
100
20
OperatingRange
StorageRange
-30 70
Doc.No. Rev.No PageLTP500WV-F01 /30605-000-G-050130
Preliminary
NOTE (1) Permanent damage to the device may occur if maximum values are exceededor reverse voltage loaded.Functional operation should be restricted to the conditions described under Normal Operating Conditions.
(2) BACK-LIGHT UNITTa = 25 ± 2 °C
1.2 ELECTRICAL ABSOLUTE RATINGS
(1) TFT LCD MODULE
-V35-0.3Von
-VAVDD + 0.3-0.3V0 to V10Input Voltage
-VVDD + 0.3-0.3Other
-V3316.0Von - Voff
-V5.53.0VCC - Voff
-V6.0-0.3AVDD
Supply Voltage
-V6.0-0.3VDD
SYMBOL MIN. MAX. UNIT NOTEITEM
-
MIN.
25
MAX.
(1)mAIBLED current
NOTEUNITSYMBOLITEM
Ta = 25 ± 2°C, GND = 0V
Doc.No. Rev.No PageLTP500WV-F01 /30705-000-G-050130
Preliminary2. OPTICAL CHARACTERISTICS
The following items are measured under stable conditions. The optical characteristics should be measured in a dark room or equivalent state with the methods shown in Note (5).Measuring equipment : TOPCON BM-5A,EZ-CONTRAST
* Ta = 25 ± 2°C , fv= 75Hz, fDCLK=32.64MHz, IL = 40mA
ResponseTime at Ta
RX
msec
(1), (2), (5)
(1), (3)
ColorChromaticity
( CIE )
Red
Green
Blue
White
RY
GX
GY
BX
BY
WX
WY
(1), (5)
ViewingAngle
Hor.
Ver.
θ L
φ H
θ R
φ L
φ = 0,
θ = 0
Luminance of White (center)
NormalViewingAngle
ITEM SYMBOL CONDITION MIN. TYP. MAX. UNIT
Contrast Ratio(1 Points) CR
Rising TR
Falling TF
-
-
CR ≥ 10
cd/m2YL
Degrees
5 PointsWhite Variation
(6)Ez-contrast
NOTE
(1), (4)
TBD
δ L 1.45--
250
15
20
30
45
-
-
-
-
35
35
25
10
45
45
30
15
(1)
116
TBD
TBD
TBD
TBD
TBD
TBD
TBD
150
Doc.No. Rev.No PageLTP500WV-F01 /30805-000-G-050130
Preliminary
Note 3) Definition of Response time :
Note 1) Definition of Viewing Angle : Viewing angle range(10 ≤ C/R)
Note 4) Definition of Luminance of White : measure the luminance of white at center point(@ )
6 O’clockdirection
Normal Line
θ L
θ R
φ Hφ L 12 O’clockdirection
θR =90o
θ L =90o
φ = 0°,
x
x'y'
y
θ = 0°
φ H = 90o
φ L= 90o
Display data Black(TFT ON)White(TFT OFF) White(TFT OFF)
OpticalResponse
100 %90 %
10 %0 %
TR TF
Time
CR = gray max (Gmax)
Note 2) Definition of Contrast Ratio (CR) : Ratio of gray max (Gmax) ,gray min (Gmin) at center point
gray min (Gmin)
V/10
2V/5
H/102H/5
321
4 5 6
7 8 9
2H/5H/10
2V/5
V/10
FPC
Doc.No. Rev.No PageLTP500WV-F01 /30905-000-G-050130
Preliminary
Optical characteristics measurement setup
Center of the screen
TFT-LCD module LCD panel
Photo detector( TOPCON BM-5A)
40 cm Field = 2°
: test point
Note 5) After stabilizing and leaving the panel alone at a given temperature for 30 minutes, the measurement should be executed. Measurement should be executed in a stable, windless,and dark room.This should be measured in the center of screen. LED current : 20 mAEnvironment condition : Ta = 25 ± 2 °C
=Maximum luminance of 5 points
Minimum luminance of 5 pointsδ L
Note 6) Definition of 5 points white variation ( δ L ) [ ① ~ ⑤ ]
V/10
2V/5
H/102H/5
31
5
7 9
2H/5H/10
2V/5
V/10
FPC
Doc.No. Rev.No PageLTP500WV-F01 /301005-000-G-050130
Preliminary3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
Note (1) fV=75Hz, fDCLK = 32.24MHZ, VDD = 3.3V , AVDD = 5.0V, VCC = -8.7V, Von = 17V, Voff = -12V DC Current.
(2) 1 pixel /clock(3) Power dissipation check pattern
-V-11.7-12.0-12.3VoffGate Off Voltage
-V-8.4-8.7-9.0VCCGate Logic Input Voltage
-V5.25.04.8AVDDSource Analog Input Voltage
-V17.317.016.7VonGate On Voltage
ACV3.5--1.5VcomCommon Voltage
-mW300TBD-Vertical
-mW-TBD-Black
(1),(3)mW-TBD-White
Power Consumption
(2)MHz4032.24-fDCLKMain Frequency
-KHz10029.4-fHHsync Frequency
-Hz-7560FvVsync Frequency
-V3.63.32.5VDDInput Level Shifters &Source Logic Input Voltage
NOTEUNITMAXTYPMINSYMBOLITEM
Ta = 25 ± 2°C, GND = 0V
Doc.No. Rev.No PageLTP500WV-F01 /301105-000-G-050120
Preliminary
R G B
*c) Vertical 1 Line
R G B
R G B
R G B
R G B
R G B
R G B
R G B
R G B
B
B
R G B R
R
Doc.No. Rev.No PageLTP500WV-F01 /301205-000-G-050130
Preliminary
Note (1) The LEDs parallel type.( Refer to 4.2 )(2) Where IB = 40mA, VB = PBL / IB
3.2 BACKLIGHT UNIT
The back-light system is an edge - lighting type with The white LED(Light Emitting Diode)s.
Ta=25 ± 2°C
(2)mW-(888)-PBLPower Consumption
(1)mA-40-IBLEDs Current
NOTEUNITMAXTYPMINSYMBITEM
Doc.No. Rev.No PageLTP500WV-F01 /301305-000-G-050130
Preliminary4. BLOCK DIAGRAM
4.2 BACKLIGHT UNIT
VLED-ANODE 1
VLED-CATHOE 1
S800
L
C
D
P
A
N
E
L
.
.
.
.
.
.
.
SOURCE D-IC
AVDD(5V)
VDD(3.3V)
VLS(3.3V)
V0~V10
Data 18bit
HCLK
SPOI
PS
LS
POL
GND
GATE D-IC
G1
G480
.
.
.
LED
VON(17V)
VOFF(-12V)
VCC(-8.7)
VLS(3.3V)
CKV
SPV
LED1+
LED2+
LED1-
LED2-
VCOM
S1
VLED-ANODE 2
VLED-CATHOE 2
Doc.No. Rev.No PageLTP500WV-F01 /301405-000-G-050130
Preliminary5. INPUT TERMINAL PIN ASSIGNMENT
VCOM voltageVCOM60GREEN_DATA_5G0530
GroundGND59GREEN_DATA_4G0429
VCOM voltageVCOM58GREEN_DATA_3G0328
GroundGND57GREEN_DATA_2G0227
BLUE_DATA_5B0556GREEN_DATA_1G0126
BLUE_DATA_4B0455GREEN_DATA_0G0025
BLUE_DATA_3B0354RED_DATA_5R0524
BLUE_DATA_2B0253RED_DATA_4R0423
BLUE_DATA_1B0152RED_DATA_3R0322
BLUE_DATA_0B0051RED_DATA_2R0221
Input data polarity exchange inputPOL50RED_DATA_1R0120
3.3VVDD49RED_DATA_0R0019
GroundGND48Input pin for power savePS18
GroundGND475VAVDD17
Main clockHCLK46Gate on Voltage(17V)Von16
Latch input LS45GroundGND15
GroundGND44Gate off Voltage(-12V)Voff14
Gamma_Voltage_10V1043-8.7VVCC13
Gamma_Voltage_9V9423.3VVDD12
Gamma_Voltage_8V841GroundGND11
Gamma_Voltage_7V740VCOM voltageVCOM10
Gamma_Voltage_6V639Vetical start pluseSPV9
Gamma_Voltage_5V538VCOM voltageVCOM8
Gamma_Voltage_4V437Vertical clockCKV7
Gamma_Voltage_3V336GroundGND6
Gamma_Voltage_2V235GroundGND5
Gamma_Voltage_1V134Back light LED(CATHODE)LED2-4
Gamma_Voltage_0V033Back light LED(ANODE)LED2+3
GroundGND32Back light LED(CATHODE)LED1-2
Start pluse input/cascade output SPOI31Back light LED(ANODE)LED1+1
NoteSymbolNo.NoteSymbolNo.
Doc.No. Rev.No PageLTP500WV-F01 /301505-000-G-050120
Preliminary5.2 Input Signal,Basic Display Colors and Gray Scale of Each Colors
Note
(1) Definition of Gray : Rn : Red Gray, Gn : Green Gray, Bn : Blue Gray (n = Gray level)
(2) Input Signal : 0 = Low level voltage, 1 = High level voltage
R0(LSB)
R1 R2 R3 R4 R5 R6 R7(MSB)
G0(LSB)
G1 G2 G3 G4 G5 G6 G7(MSB)
B0(LSB)
B1 B2 B3 B4 B5 B6 B7(MSB)
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Blue 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Green 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Cyan 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Red 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Magenta 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
: : : : : : : : : : : : : : : : : : : : : : : :
: : : : : : : : : : : : : : : : : : : : : : : :
1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Red 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
: : : : : : : : : : : : : : : : : : : : : : : :
: : : : : : : : : : : : : : : : : : : : : : : :
0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Green 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0
: : : : : : : : : : : : : : : : : : : : : : : :
: : : : : : : : : : : : : : : : : : : : : : : :
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1
Blue 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Blue
GrayScale
ofRed
GrayScale
ofGreen
GrayScale
ofBlue
Color Display
BasicColor
Data Signal
Red Green
Dark↑
↓
Light
Dark↑
↓
Light
Dark↑
↓
Light
Doc.No. Rev.No PageLTP500WV-F01 /301605-000-G-050130
Preliminary5.4 PIXEL FORMAT
R G B R G B
R G B R G B R G B R G B
R G B R G BLine 1
LTP500WV-F01 Panel
Pixel 1 Pixel 800
Line 480
Doc.No. Rev.No PageLTP500WV-F01 /301705-000-G-050130
Preliminary
6. INTERFACE TIMING
6.1 Timing Parameters
SPV
CKV, SPV
CKV
LS
SPOI
POLXI0 to ZI5
CK
Application Pin
ns100trckvClock rise time
ns100tfCKVClock fall time
ns100tSUData setup time
ns300tHData hold time
ns100trSPVPulse rise time
ns100tfSPVPulse fall time
Us0.5tWLMinimum “L” clock pulse width
KHz100fCKVClock frequency
ns18tWLSLS signal “H” level width
ns7tHLSLS signal, CK signal hold time
ns18tLSSPLS signal, SPI signal setup time
ns13tDSPStart pulse output delay time
ns1.5/fCKtWSPStart pulse width
ns0tHSPStart pulse hold time
ns4tSUSPStart pulse setup time
ns0tHDData hold Time
ns4tSUDData setup time
ns4tCFInput fall timens4tCRInput rise timens4tCWL“L” level pulse width
ns4tCWH“H” level pulse width
MHz4832.24fCKClock frequency
Unit.MAXTYPMINSymbolParameter
( VDD = +3.0 to 3.6V, AVDD = +3.0 to 5.5V, Ta= -30 to +85℃ )
Doc.No. Rev.No PageLTP500WV-F01 /301805-000-G-050120
Preliminary
NOTE. (1) The supply voltage of the external system for the module input should be the same
as the definition of VDD and VDD.
(2) Apply the LED voltage within the LCD operation range. When the back-light turns onbefore the LCD operation or the LCD turns off before the LEDs turns off, the
display may momentarily become white.
(3) In case of VDD = off level, please keep the level of input signals on the low or keep a high impedance.
(4) T8 should be measured after the module has been fully discharged between power off and on period.
(5) Interface signal shall not be kept at high impedance when the power is on.
Doc.No. Rev.No PageLTP500WV-F01 /301905-000-G-050120
Preliminary
6.2 Power ON/OFF Sequence:
T2
T1
T3
T5
T6 T6
T5
T3
T2
T8
T4
POWER SUPPLY
VDD
INTERFACE
SIGNAL
POWER SUPPLY
AVDD
DISPLAY POWER
Voff. VCC
POWER SUPPLY
For LED unit
0.9VDD
0.1VDD
0.9VDD
0.1VDD
0 ≤ T4 ≤ 10 msec
0 ≤ T3 ≤ 50 msec
0 ≤ T2 ≤ 10 msec
0 ≤ T1 ≤ 10 msec
Specification
T7
T6
T5
Symbol
0 ≤ T5 ≤ 30 msecT1
0 ≤ T5 ≤ 10 msecT2
100 msec ≤ T7T3
T4
SpecificationSymbol
0.9AVDD
0.1AVDD
0.9AVDD
0.1AVDD
POWER SUPPLY
Von
Power ON/OFF Sequence
T7T7
0.1Voff
0.1Von
0.1LED
0.1Voff
0.1Von
0.1LED
Doc.No. Rev.No PageLTP500WV-F01 /302005-000-G-050120
Preliminary
This TFT-LCD has a high-voltage LC driver, so it may be permanently damaged by a large current which may flow if a voltage is supplied to the LC driver power supply while the logicsystem power supply is floating. Power supply sequence is shown as below.
Logic system power( VDD ) →Input signal → LC driver power( Voff and Von).The logic state of internal logic is unstable immediately after the logic system Is supplied,
input CKV and SPV to send a clock during cascade sequence setting period and initialize the internal logic.
INPUT
VCC
VDD
Von
Voff
NOTE(1) Observe the following relation for the potential of the voltage input.
GND ≤ V0≤V1 ≤V2 ≤V3 ≤V4 ≤V5 ≤V6 ≤V7 ≤V8 ≤V9 ≤V10 ≤AVDDor
AVDD≥ V0 ≥ V1 ≥ V2 ≥ V3 ≥ V4 ≥ V5 ≥ V6 ≥ V7 ≥ V8 ≥ V9 ≥ V10 ≥ GND(2) When power supply tuning on or off, please to satisfied condition of absolute maximum
ratings,
AVDD, V0 ~ V10
6.3 TIMMING Diagrams of Interface Signal( TFT-LCD Module )
Doc.No. Rev.No PageLTP500WV-F01 /302405-000-G-050130
Approval8. Packing
Note
(1) Total : Case: Approx. 2.25 Kg
Box: Approx. 10.3 Kg
(2) Size : Case: 490(W) x 342(D) x 58(H)
Box: 505(W) x 355(D) x 300(H)
(3) Place the panels in the tray facing the direction shown in the figure.
(4) Place 2 tray and cover(empty tray) and pads inside the packing-case.
(5) Place 4 packing-case and 1 Empty case inside the packing-box.(Affix the label)
(6) Seal the packing-box. Affix the label-safety.
Label
2 tray + cover
* 8 Panels per pack
Pad (3t)
*2 pads per tray(upper & lower)
Packing-case
Label-safety
Sealing tape
Panel
* 4 Panels per tray
Packing-box
* Contains 4
Packing-case
②
①
④
③Label-safety
Label-paper
+ Empty box 1
9. Operation Circuit
9.1 T-Con B/D
T-CON B/D
VDD(3.3V)AVDD(5V)MCLK VsyncHsync
Data 18 bit
VDD(3.3V)AVDD(5V)VonVoff
V0 ~ V10Vcom
LED +1, +2LED -1, -2HCLKSPV SPOILSPOLCKV
Data 18 bit
OBLUE_5Out_DATA_1776
OBLUE_4Out_DATA_1677
OBLUE_3Out_DATA_1578
OBLUE_2Out_DATA_1479
OBLUE_1Out_DATA_1380
OBLUE_0Out_DATA_1281
OGREEN_5Out_DATA_1191
OGREEN_4Out_DATA_1092
OGREEN_3Out_DATA_993
OGREEN_2Out_DATA_894IGROUNDGND100
OGREEN_1Out_DATA_795I3.3VVCCIO298
OGREEN_0Out_DATA_696I3.3VVCCIO288
ORED_5Out_DATA_519IGROUNDGND84
ORED_4Out_DATA_418IGROUNDGND75
ORED_3Out_DATA_317IGROUNDGND69
ORED_2Out_DATA_216IGROUNDGND62
ORED_1Out_DATA_115I1.8vVCC57
ORED_0Out_DATA_014I3.3VVCCIO151
IBLUE_5In_DATA_1763I3.3VVCCIO138
IBLUE_4In_DATA_1664IGROUNDGND31
IBLUE_3In_DATA_1565IData enable DE29
IBLUE_2In_DATA_1466IVertical sync Vsync27
IBLUE_1In_DATA_1367I1.8vVCC26
IBLUE_0In_DATA_1268IGROUNDGND25
IGREEN_5In_DATA_1144IMain clockMCLK23
IGREEN_4In_DATA_1043IHorizontal syncHsync22
IGREEN_3In_DATA_942IGROUNDGND21
IGREEN_2In_DATA_841I3.3VVCCIO120
IGREEN_1In_DATA_740OMain clockHCLK13
IGREEN_0In_DATA_639OVertical sync CKV12
IRED_5In_DATA_537OStart pluse input/cascade output SPIO/SPOI11
IRED_4In_DATA_436OLatch input LS10
IRED_3In_DATA_335OInput data polarity exchange inputPOL9
IRED_2In_DATA_234OVertical scanning start pluse inputSPV8
IRED_1In_DATA_133OInput pin for power savePS7
IRED_0In_DATA_032I3.3VVAUX5
구분용도명칭번호구분용도명칭번호
9.2 CPLD Pin MAP
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
X5R/2012/10VTDKC2012X5R1A225K(M)
X5R/2012/10VTDKC2012X5R1A225K(M)
CN5
JR3
(-9.7V)
(5V)
(3.3V)
(3.3V)
(-13V)(20V)
U20
9.3 Reference Circuit 9.3.1 T-CON & Peripheral
T-CON BOARD2<RevCode>
LTP500WV-F01A2
2 2Tuesday, December 14, 2004
Title
Size Document Number Rev
Date: Sheet of
0
0 000 0 0
VDD
0
R401 2
R381 2
R351 2
R461 2
R971608, 60
12
R11112
AVDD
C76
R291 2
V6
106,3216
C112
12
R1512
R1912
R1100,1608
12
V4
C85
R612
G02
CN3123456
R912
R271 2
R1212
B02
R1712
POL
R10712
B05
R431 2
R412
SPIO
V1
R301 2
V3
R03
CKV
CN1
SD-54722-0601
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
R02
V9
V10
B03
VSYNC_TP
V8
R311 2
R1312R05
106,3216
C48
12
R391 2
V0
R361 2
R451 2
G05
G01
R2212
SPV
R10312
R10812
R04
R1291k,1608,5%
12
R331 2
R411 2
HSYNC_TP
R712
106,3216
C111
12
R1012
G00
R03
R321 2
Voff
C88105,1608
R1612
R10612
G03
R441 2
G04S2
SW DIP-6
123456
121110987
123
R9912
R241 2
C77
R231608, 60
1 2
R2012
R1812
B00
R00
R10412
R212C45
106,3216
12
R10512
MCLK_TP
DE_TPPS
VCOM
B01
HCLK
R11212
C78104,1608
R341 2
C90105,1608
V2
C47
106,3216
12
106,3216
C46
12
R251 2
R512
R1412
C51105,1608
12
R10212
VCC
C83104,1608
R261 2
C86
C91105,1608
R371 2
R10012
F1R431 01.5(1.5A)/LITTLE FUSE
R812
R1112
R10112
VLS
C87105,1608
R421 2
V5
FX2-P-DS
123456789
111213141516171819202122232425262728293031323334353637383940
10
C89105,1608
F2R431 01.5(1.5A)/LITTLE FUSE
XC2C128-VQ100
123456789
1011121314151617
2021
1819
22232425
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 45 46 47 48 49 5044
515253545556
5960616263646566
69707172737475
5758
6768
767778798081828384858687888990919293949596979899100
I/O(1)I/O(1)I/O(1)I/O(1)VAUXI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/OI/O
VCCIO1GND
I/OI/O
I/O(2)I/O(2)I/O(4)GND
VC
CI/O
(2)
I/O(5
)I/O I/O G
ND
I/O I/O I/O I/O I/O I/O VC
CIO
1I/O I/O I/O I/O I/O TD
II/O TM
STC
KI/O I/OI/O
VCCIO1I/OI/OI/OI/OI/O
I/OI/OI/O
GNDI/OI/OI/OI/O
GNDI/OI/OI/OI/OI/O
GND
VCCI/O
I/OI/O
I/OI/OI/OI/OI/OI/OI/OTD
OG
NDI/OI/OI/O
VC
CIO
2I/OI/OI/OI/OI/OI/OI/OI/OI/O
VC
CIO
2I/O
(3)
GN
D
R471 2
R11312
R11608, 60
12
V7
R9812
R312
R2112
LS
B04
C84
S1
SW DIP-6
123456
121110987
R281 2
Von
MCLK_IC
R01
R03
AVDD
R0
MCLK_IN
R00
Von
DE_IC
G04
R0_IN
POL
V4
Voff
R1_IN
V6
G01
DE_IN
DE_IN
V0
LED1+
MCLK_IN
V5
B00
G03
VDD
R1
G05
R02
HCLK
G00
R04
VCC
SPOI
V8
HSYNC_IC
PS
VSYNC_IC
CKV VCOM
SPV
VDD
B03
V3
V1
V2
B01
R4_IN
B5_IN
G3_IN
R0_IN
G5_IN
G0_IN
R2_IN
B2_IN
B4_IN
B1_IN
G1_IN
G4_IN
R5_IN
R3_IN
B3_IN
B0_IN
R1_IN
G2_IN
VSYNC_INHSYNC_IN
R05
G02
V7
V10
V9
LS
B02
B04 B05
VCOM
VDD_1.8
GO
2_A
BO
3_A
GO
3_A
GO
4_A
BO
1_A
BO
4_A
BO
2_A
GO
5_A
BO5_
A
BO
0_A
GO
1_A
GO
0_A
POL_ASPV_A
SPOI_ACKV_A
PS_A
LS_A
CONTROL3
CONTROL1
CONTROL6
CONTROL4
CONTROL2
CONTROL5
CONTROL9
CONTROL7
CONTROL10
CONTROL8
CONTROL11CONTROL12
R2_INR3_INR4_INR5_IN
G3_ING2_ING1_ING0_IN
B1_INB0_IN
G5_IVG4_IN
B3_INB2_IN
VSYNC_INHSYNC_IN
R3R2
R4R5
G1G0
G2G3
G5G4
B0B1
B3B2
B4B4_INB5B5_IN
RO2
RO3_A
GO1
RO3
BO4
BO1_A
POL_A
BO3_A
GO4_A
RO4_A
PS_A
CKV
RO5
BO4_A
GO1_A
RO2_A
CKV_A
SPOI
PS
SPV_A
SPOI_A
BO1
LS_A
BO0_A
POL
GO3GO3_A
RO4
GO4
BO2_A
RO0
BO0
GO5
RO1
GO2_A
RO5_A
RO1_A
GO2
GO5_A
BO2
LS
BO3
BO5BO5_A
GO0_A
RO0_A
GO0
SPV
HCLK_A
LED1-
LED2-
HCLKHCLK_A
AVDD(5V)
VDD
VDD
MCLK_ICHSYNC_IC
VS
YN
C_I
C
DE
_IC G
2G
3
G1
G4
G5
G0
R1
R3
R0
R4
R5
R2
B0
B3B4B5
B1B2
RO4_A
RO1_ARO2_A
RO5_A
RO0_A
RO3_A
VD
D_1
.8 VD
D
VDD
VDD
VDD
VD
D
VD
D
VDD_1.8
CONTROL2
CONTROL5
CONTROL3CONTROL4
CONTROL1
TDO
TDI
TMS
TCK
TMSTDITDOTCK
VDD
CONTROL8
CONTROL10
CONTROL7CONTROL6
CONTROL9
CONTROL11
CONTROL12
VDD(3.3V) LED2+
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
-12V
17V
-8.7V.
1608/16V
U6
U4
U1
U8_A
0,1608
0,1608
U10
U2
JR1
JR2
U8_B
LM8262
(5V)
U7_B
E D4
B1_A
B1_B
U5
U7_A
C
B
105,3216
105,3216
105,3216
105,3216
9.3.2 POWER
T-CON BOARD1(POWER) <RevCode>
LTP500WV-F01A2
1 2Tuesday, December 14, 2004
Title
Size Document Number Rev
Date: Sheet of
R77
1
2
3
R5324k,1608,1%
R5024k,1608,1%
R68
C730.47uF,1608
R88480,1608,1%
R81200,1608,1%
MNDT2227B2
E2
C2
R96200k,1608,1%
R83200,1608,1%
C744.7p,1608
R73
C68
R55 91k, 1608
L110uH
C58
105,1608
C62
BUF11702
123456789101112131415
16171819202122232425262728 VDD
NCOUT1OUT2OUT3OUT4OUT5OUT6OUT7OUT8OUT9
OUT10OUTCOM
GNDGNDINCOMIN10IN9IN8IN7IN6IN5IN4IN3IN2IN1NCVDD
C65
R85450,1608,1%
1.2K,1608,1%
R86
R87410,1608,1%
R69
-
+
LM8262
5
67
R6410K,1%,1608
R48180K,1608,1%
C59
106,3216
R94100k,1608,1%
0,1608
R133TC7SH04FU
2 4
L6 0H
C106
16V,150uF,7343
C101
R82200,1608,1%
R5615K,1608
C92106,3216,X7R
0,1608
R131
R74
-
+
LM8262
5
67
C70
R63200K,1%,1608
L733uH
R910,1608
R70
0,1608
R135
C60
C93106,3216,X7R
105,3216
C105
C64
3.3n,1608
C107
-
+
LM8262
3
21
48
C67
R5910,1608
105,1608C58
D5MBR0540
R89300,1608,1%
3.3n,1608
C108
R584.3k,1608
105,1608
C115
R6510,1%,1608
R80100,1608,1%
-
+3
21
48
C53100p,1608
C99
16V,150uF,7343
C724.7uF,1608
R75
R54 8.2K,1608
VR110k
U23
LTC660
1234
8765
BOOSTCAP+GNDCAP-
V+OSC
LVVout
D3ZHCS500
MNBD4448HTS
0,1608
R132
B1
E1
C1
VR2 10k,1608
C103
R621k,1608
R528.2k,1608,1%
R490,1608
C66
R6010,1608
C69
0,1608
R138
GZF33C
D9
R90230,1608,1%
R71
C56104,1608
C94105,3216
D2ZHCS500
0,1608R137
R51100,1608,1%
LTC1844-1.8
1
3
2
4
5IN
SHDN
GN
D
BYP
OUT
C61
R670,1608
R614.3k,1608
C100
R57
120k,1608
D1ZHCS500
C544.7u,1608
C71104,1608
105,1608
C114
C52104,1608 123
C55106,3216
R76
LT1945EMS
12
34 5
67
8
9
10
NFB1SHDN1
GN
DSHDN2 FB2
SW
2
PG
ND
Vin
PG
ND
SW
1
C5710V,104,1608
300K,1608
R78
R84250,1608,1%
0,1608R66
L310uH
0,1608
R140
C102
MAX15542
4
8
7
6
13
5
Vcc
BRT
LX
OV
SS
GNDEN
FB
R951M,1608,1%
R72
0,1608
R139
C95105,3216
TC7SH04FU
2 4
300K,1608
R93
R79680,1608,1%
L2 0H
C63
0,1608
R130
0,1608R134
R9210,1%,1608
VDD
Voff
Von
VDD VDD_1.8
VDD
VDD_1.8
LED1+
POL_AVW
VB
V6
V2
V5
AV
DD
V4
V9
V1
V3
V10
V0
V7V8
VB
VW
AVDD
LED1-
LED2-
AV
DD
AVDD
VCOMPOL_A
Vcom-
VCC
LED2+
AV
DD
AVDD
Vcom-
AVDD
Doc.No. Rev.No PageLTP500WV-F01 /302905-000-G-050130
Preliminary11. GENERAL PRECAUTIONS
1. Handling
(a) When the module is assembled, It should be attached to the system firmly using every mounting holes. Be careful not to twist and bend the modules.
(b) Refrain from strong mechanical shock and / or any force to the module. In addition to damage, this may cause improper operation or damage to the module and CCFT back-light.
(c) Note that polarizers are very fragile and could be easily damaged. Do not press or scratchthe surface harder than a HB pencil lead.
(d) Wipe off water droplets or oil immediately. If you leave the droplets for a long time,Staining and discoloration may occur.
(e) If the surface of the polarizer is dirty, clean it using some absorbent cotton or soft cloth.
(f) The desirable cleaners are water, IPA(Isopropyl Alcohol) or Hexane.Do not use Ketone type materials(ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might permanent damage to the polarizer due to chemical reaction.
(g) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth . In case of contact with hands, legs or clothes, it must be washed away thoroughlywith soap.
(h) Protect the module from static , it may cause damage to the CMOS IC.
(i) Use finger-stalls with soft gloves in order to keep display clean during the incoming inspection and assembly process.
(j) Do not disassemble the module.
(k) Do not adjust the variable resistor which is located on the back side.
(l) Protection film for polarizer on the module shall be slowly peeled off just before use sothat the electrostatic charge can be minimized.
(m) Pins of I/F connector shall not be touched directly with bare hands.
Doc.No. Rev.No PageLTP500WV-F01 /303005-000-G-050130
Preliminary2. STORAGE
(a) Do not leave the module in high temperature, and high humidity for a long time.It is highly recommended to store the module with temperature from 0 to 35 °C and relative humidity of less than 70%.
(b) Do not store the TFT-LCD module in direct sunlight.
(c) The module shall be stored in a dark place. It is prohibited to apply sunlight or fluorescentlight during the store.
3. OPERATION
(a) Do not connect,disconnect the module in the “ Power On” condition.
(b) Power supply should always be turned on/off by following item 6.2 “ Power on/off sequence “.
(c) Module has high frequency circuits. Sufficient suppression to the electromagnetic interference shall be done by system manufacturers. Grounding and shielding methodsmay be important to minimize the interference.
4. OTHERS
(a) Ultra-violet ray filter is necessary for outdoor operation.
(b) Avoid condensation of water. It may result in improper operation or disconnection of electrode.
(c) Do not exceed the absolute maximum rating value. ( the supply voltage variation, input voltage variation, variation in part contents and environmental temperature, so on) Otherwise the module may be damaged.
(d) If the module displays the same pattern continuously for a long period of time,it can bethe situation when the image “sticks” to the screen.
(e) This module has its circuitry FPC’s on the rear side and should be handled carefully in order not to be stressed.
