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Spin Torque Transfer RAM

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“SPIN TORQUE TRANSFER RANDOM ACCESS MEMORY” -COMPONENTIZATION IN EMBEDDED SYSTEM Seminar presentation by- DHANANJAY POOJARI YAD 1GA05EC026 1 SPIN TORQUE TRANSFER RAM
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SPIN TORQUE TRANSFER RANDOM ACCESS MEMORY -COMPONENTIZATION IN EMBEDDED SYSTEM

Seminar presentation byDHANANJAY POOJARI YADAV 1GA05EC026

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INTRODUCTION:which will lead to durable, high density memory chips impervious to radiation and capable of virtually unlimited read/write cycles. Called SPIN TRANSFER TORQUE RANDOM ACCESS MEMORY (STT-RAM) chips is cost competitive provide a revolution in military and space electronics.

STT-RAM is a new digital-data-recording technology,

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AIM:To design a Memory chip that satisfies the following needs:-

Increase the Throughput of the system. Reliability and better Scalability. Must be resistive to radiation and Other hazards. Doubling of the number of transistors on a chip roughly every two years- MOORES law.

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-

-

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Existing SystemRAM

VOLATILE Ex: SRAM, DRAM.

NON-VOLATILE Ex: MRAM,

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PROBLEM STATEMENTIn conventional RAMs we are facing following problems: Scalability problem (MRAM). write disturbance under some conditions, which affects accuracy and retention. More current is needed. An external magnetic field is necessary(MRAM). More Voltage is required for the functionality of the chip. The speed of writing is slow.

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It has no capacity to preserve data under radiation and other hazards. The user needs to move data from one format to another, because it does not have the ability to work with virtually all systems equally well. Power trade off problem- decrease in area of the chip increases the power consumption.

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The Challenge

To design the universal memory chip that satisfies all the aims and overcomes all the problems specified.

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PROPOSED SOLUTION

Use SPIN TRANSFER TORQUE technique to design the Non-Volatile RAM.

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SPIN:PAULI EXCLUSIVE PRINCIPLE:

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SPIN TRANSFER:

Between two electrons, interaction changes each angular momentum, but the total conserves. Exchange interaction transfers an angular momentumSPIN TRANSFER.

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Spin Transfer Torque:A spin-polarized current injected into a ferromagnetic layer can induce a torque on its magnetization, hence rotate the magnetization.

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M1 exerts torque on incoming electron, that become spin polarized in M1 direction. This spin polarized current in turn exerts a torque on M2, causing M2 precision and switching.

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Fixed layer

NM

Pinned layer

I I

I

+

-

I=> Direct current, I=> Spin Polarized Current.SPIN TORQUE TRANSFER 1313

Intrinsic magnetic momentum of the spin polarized electron.

=> intrinsic magnetic moment. g=> it is called g-factor. For exclusively orbital rotations its value is 1 q=>charge of a elementary particle. m=> mass of charged particle. S=> spin of the charged particle.SPIN TORQUE TRANSFER 1414

The possibility of alignment of magnetic dipole in free ferromagnet layer.

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The resistivity and magnetic field strength of MTJ during SPIN TORQUE TRANSFER logic 0 and logic 1.

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WORKING OF STT-RAM:

Change in magnetization direction by the application of direct currentSPIN TORQUE TRANSFER 1717

MRAM

STT_RAM

External magnetic field is required for switching but this is not required in case of STT-RAM.SPIN TORQUE TRANSFER 1818

The STT-RAM ARCHITECTURE:

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WRITING PROCESS:

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Parallel magnetic effect in MTJ or logic 1 state

2020

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Antiparallel magnetic effect in MTJ or logic 1 state

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NN STT-RAM CHIP.

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The MTJ state changes from Parallel (P) to Antiparallel (AP) if the positive direction current density I>Ic. Its state will change from AP to P if the negative direction current density I > Ic. Where Ic is critical current density.SPIN TORQUE TRANSFER

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TMR= (Rap-Rp) Rap TMR, Tunnel Magneto Resistance Ratio. Rap => resistance introduced in TMR due to Antiparallel action in the pinned layer. Rp => resistance introduced in TMR due to parallel action in the pinned layer.

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Simulation model symbol in the specter simulator. Resistance equivalent circuit.SPIN TORQUE TRANSFER 2525

DC and Transient simulation.SPIN TORQUE TRANSFER 2626

I(A) (80mV, 135.053 A)

Dc(mV) DC simulation of MTJ (Parallel), the critical current is about 135.053uA and the potential is about 80mVSPIN TORQUE TRANSFER 2727

Dc(mV)

I(A)

Time (nS) Transient response simulation of MTJ, the critical current is about 153.206uA for parallel and -221.202uA for anti-parallelSPIN TORQUE TRANSFER 2828

quired current in STT-RAM continues to scale lower with ngly smaller geometries. Conversely, conventional MRAM sw SPIN TORQUE TRANSFER 2929 ncreases with smaller geometries.

FABRICATION:

First generation MRAM cell

STT-RAM cell

By eliminating the bypass line, write word line & cladding, STT-RAM i considerable Smaller than conventional MRAM cell.SPIN TORQUE TRANSFER 3030

ION MILLING AND LIFT-OFF METHOD:

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APPLICATION: STT-RAM in Avionics and Military Application.

Input Spin-LUT architectureSPIN TORQUE TRANSFER 3333

The full schematic of Spin-MTJ based Non-Volatile Flip-Flop (Spin-FF) SPIN TORQUE TRANSFER

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Full layout (5.65um10.15um) of Spin-FF, MTJs are placed above the two points ML and MRSPIN TORQUE TRANSFER 3535

IC DESIGNER BENEFITSq

STT-RAM can be embedded in the semiconductor devices such as FPGA, microprocessor, microcontroller and systems on chip (SOC).

q

Internal voltage required by STT-RAM is very low in terms of 1.2v. STT-RAM writing current is very low in the order of 100 to 200 microampere at the 90nm node. At the 45 nm semiconductor 100 micro amps. node and beyond, writing current continues to scale down significantly below

q

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FUTURE WORK:q

Continuous exploration of VOx-MTJ; focusing on barrier growth and interface quality. Re-visit of AlOx-MTJs to better understand the dependence of interface and barrier quality on TMR. New barrier materials exploration: Oxides like TiOx, TaOx, Nitrides like BN, etc. Further optimization of lithographic patterning process.

q

q

q

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CONCLUSION: STT-RAM COMBINES THE ADVANTAGES OF ALL CONVENTIONAL MEMORY.q

It combines the speed of SRAM.

q

The non-volatility of flash memory. Cost effective and low-power memory solution like DRAM. No limit for write-read cycles (flash 100,000) Radiation-resistant. Greater Performance, reliability and Scalability. Satisfies MOORES law, by providing 45nm VLSI design technology.

q

q

q

q

q

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Storage permanence:Its the ability of memory to hold its stored bits after those bits have been written.

Write ability:Its the manner and speed that a particular memory can be written.

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Finally, I Thank to efficient spin-transfer torque techniques. That will revolutionize in the memory sector of embedded system

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Q/A

Questions and answer time

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THANK YOU

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