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SUPERVISORY CONTROL THEORY
MODELS AND METHODS
W.M. WonhamSystems Control Group
ECE DepartmentUniversity of Toronto
Workshop on Discrete-Event Systems Control
Eindhoven 2003.06.24
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WHAT’S BEEN ACCOMPLISHED?
• Formal control theory• Basis – simple ideas about control
and observation• Some esthetic appeal• Amenable to computation• Admits architectural composition• Handles real industrial applications
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WHAT MORE SHOULD BE ACCOMPLISHED?
• Flexibility of model type
• Flexibility of model architecture
• Transparency of model structure (how to view and understand a complex DES?)
• ...
Accepting that most of the interesting problems are exponentially hard!
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MODEL FLEXIBILITY
For instance
Automata versus Petri nets
batrakhomuomakhia
or
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COMPUTATION OF SIMSUP
1. FMS = Sync (M1,M2,R) (20,34)
2. SPEC = Allevents (FMS) (1,8)
3. SUPER(.DES) = Supcon (FMS,SPEC) (15,24)
4. SUPER(.DAT) = Condat (FMS,SUPER)
5. SIMSUP = Supreduce (FMS,SUPER,SUPER) (computes control congruence on SUPER) (4,16)
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COMPUTATION OF MONITORS
Based on “theory of regions”
1. Work out reachability graph of PN (20 reachable markings, 15 coreachable) 2. Find the 6 “dangerous markings”
3. Solve the 6 “event/state separation” problems (each a system of 15 linear integer inequalities)
4. Implement the 3 distinct solutions as monitors
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MODEL WITH THE BEST OF BOTH WORLDS ?
Q1 Q2 · · · Qm k l
(Algebraically) hybrid state set
Qi for (an unstructured) automaton component
for a naturally additive component (buffer...)
for a naturally boolean component (switch...)
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WHAT ABOUT LARGE SYSTEMS?
For architecture, need algebraic “laws” for basic objects and operators
_____ DES G nonblocking if Lm(G) = L(G). Suppose G = G1 G2.
_____ ____________ Lm(G) Lm(G1) Lm(G2) (computationally intensive!) _____ _____ =? Lm(G1) Lm(G2) = L(G1) L(G2) = L(G)
E.g. languages, prefix-closure, synchronous product
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TOP-DOWN MODELLING BY STATE TREES
• Adaptation of state charts to supervisory control • Transparent hierarchical representation of complex systems
• Amenable to efficient control computation via BDDs
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AIP CONTROL SPECIFICATIONS
• Normal production sequencing Type1 workpiece: I/O AS1 AS2 I/O Type2 workpiece: I/O AS2 AS1 I/O
• AS3 backup operation if AS1 or AS2 down
• Conveyor capacity bounds, ...
• Nonblocking
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AIP COMPUTATION
• Equivalent “flat” model ~ 1024 states, intractable by extensional methods
• BDD controller ~ 7 104 nodes • Intermediate node count < 21 104
• PC with Athlon cpu, 1GHz, 256 MB RAM• Computation time ~ 45 min
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CONCLUSIONS
• Base model flexibility, architectural variations among topics of current importance
• Symbolic computation to play major role• Other topics: p.o. concurrency models, causality, lattice-theoretic ideas, ...• There is steady progress
• There is lots to do
