Suspend-to-RAM implementation on Freescale 74xx without PMU€¦ · Title: Presentation title (on...

Copyright 2007, Toshiba Corporation.

4/18/2007Fujihito Numano

Corporate Software Engineering Center

Suspend-to-RAM implementation on Freescale74xx without PMU

Suspend-to-RAM implementation on freescale 74xx without PMU 2Copyright 2007, Toshiba Corporation.

Agenda – Goals and Backgrounds1. Target Board 2. Goals3. Backgrounds

– Freescale 74xx programmable power mode– PMU (Power Management Unit)

4. Idle power management5. Suspend to RAM

– Overview– enter_state()– Device Power Management– pm_ops functions

6. Performance7. Our next challenges


1. Target BoardTOSHIBA TEC Corporation development board

CPU Freescale 74xx

without PMU

Some devices need to be resume trigger

No non-volatile memory


2. GoalsRequirement

The system automatically enters in the low-power “sleep” modeafter a period of inactivity.

Status – Implemented a test version– Go to suspend to RAM after a period of inactivity – Reduce power consumption by more than 50%– Resume triggered by the specific device access.

Points– Suspend to RAM with 74xx power saving “sleep” mode– Device control without “PMU”– Simple & compact implementation


3. Backgrounds• The system enters in the low-power “sleep” mode

automatically after a period of inactivity to reduce power consumption.

• The system returns to the normal “working” mode immediately if needed.

⇒⇒ The boot up time is so long that ,The boot up time is so long that ,power off and system shutdown cannot be used power off and system shutdown cannot be used System suspend & resume should be used.System suspend & resume should be used.


3. Backgrounds•• NNo o nonnon--volatile memory volatile memory

⇒⇒ Hibernation function cannot be supportedHibernation function cannot be supported““Suspend to RAMSuspend to RAM””, , ““Idle power managementIdle power management””, and, and““Device power management (Device on and off control)Device power management (Device on and off control)”” functions.functions.are effective.are effective.

•• The target The target CPUCPU is is FFreereesscalecale 7474xxxx⇒⇒ It needs to support programmable power modeIt needs to support programmable power mode

and we plan how to implement suspend to RAM by using it.and we plan how to implement suspend to RAM by using it.

•• No external H/W, such as PMU (Power Management No external H/W, such as PMU (Power Management Unit),Unit), supports to control power statussupports to control power status⇒⇒ The kernel itself should control power statusThe kernel itself should control power status

and especially control resume trigger devices.and especially control resume trigger devices.


Freescale 74xx power saving mode2 power saving modes are available to the system, Nap mode and Sleep mode

Nap modeInstruction fetching is halted. The clocks for time base, decrementer remain running.So the CPU is soon returned to the normal (RUN) mode by the “decrementer” timer interruption⇒

The system cannot keep the “power saving mode (Nap)”.Nap mode should not be applied to suspend to RAM but Idle power management.


Freescale 74xx power saving modeSleep mode

Power consumption is further reduced by disabling bus snooping.All internal functional units are disabled.

Internal exception, such as timer interrupt ,does not occur.So the system does not return to normal mode by itself.⇒ The system can keep sleep “power saving” mode.

It is appropriate for suspend to RAM

Disabling bus snooping ⇒ The system needs to flush TLB and cache on resume.


PMU – The Power Management UnitThe Power Management Unit (PMU) is a microcontrollerthat governs power functions for Apple computers. And is responsible for coordinating following powermanagement functions.

– Monitoring power connections and battery charges– Charging batteries when necessary– Controlling power to other integrated circuits– Shutting down unnecessary components when they are left idle– Controlling sleep and power functions (on and off)

( from Wikipedia, the free encyclopedia)


Without PMU support Without PMU , the kernel needs to do some he kernel needs to do some power management functions by itself. power management functions by itself.

– Controlling power to other integrated circuits– Shutting down unnecessary system components

when they are left idle– Controlling sleep and power functions (on and off)

(In the target, the resume trigger devices are controlled in particular)


Agenda - Implementations and Performance1. Target2. Goals3. Backgrounds

– Freescale 74XX programmable power mode– PMU (Power Management Unit)

4. Idle power management5. Suspend to RAM

– Overview– enter_state()– Device Power Management– pm_ops functions

6. Performance7. Our next challenges


4. Idle power management• The idle power management for 74xx has been

already implemented in the power PC kernel

• When the kernel starts, the idle process is launched. It is set to the lowest priority by the process scheduler .

• If “/proc/sys/kernel/powersave-nap” is set to １,the idle process tries to set the CPU to NAP mode.


5. Suspend to RAM implementation - Overview• Implementations for 74xx sleep mode

– Save and restore the processor contexts– Timer , TLB and cache flush– The resume exception handler

• Device control without “PMU”– The resume trigger devices are controlled in particular.

• Simple & compact implementation– All functions dependent on 74xx are wrapped on pm_ops function table .– All functions independent on the CPU architecture can be used without any

changes , such as enter_state() and device power management functions.


enter_state()All suspend to RAM implementations are included inenter_state() function.

Applications and following suspend command also call itindirectly.

#echo –n mem > /sys/power/state

It is based on preprocessing, main and post processing functions.

suspend_prepare()suspend_enter()suspend_finish()


enter_state()The functions dependent on 74xx are wrapped on thepm_ops function table.

All implements independent on the CPU architecturecan be applied to the target system without any change.

• Process control• Console control• Device power management


enter_state()enter_state()

suspend_prepare()pm_prepare_console() ← exchange the virtual console for the one of suspend onlydisable_nonboot_cpus() ← Stop other CPUs ( for multi processor ）freeze_processes() ← Freeze processesnr_free_pages() ← check and allocate memories for suspendpm_ops->prepare() ← preprocessing for the suspend dependent on 74xxsuspend_console() ← suspend the console outputdevice_suspend() ← suspend the devices

suspend_enter() device_power_down() ← suspend devices which fail to suspend in device_suspend() function

or otherspm_ops->enter() ← main routines dependent on 74xx. The system suspend heredevice_power_up() ← resume devices

suspend_finish()device_resume() ← resume devices entried in the dpm_off table resume_console() ← resume the console outputthaw_processes() ← resume processesenable_nonboot_cpus() ← restart other CPUs( for multi processor ）pm_ops->finish() ← post-processing for the suspend dependent on 74xxpm_restore_console() ← restore the virtual console


Device Power Management• The kernel can control device power state by “device_xx” functions.

• “device_register” function entries the device in the “dpm_active” list at the initialization of the driver. All devices in the list can be controlled by the kernel.

• On suspending the system, enter_state() calls device_suspend() and device_power_down().The devices are set to device power down or device off state.

• On resuming the system, enter_state() function calls device_power_up() and device_resume() function. The devices are restored to device power on state.


enter_state()suspend_prepare()

:pm_ops->prepare()

:device_suspend() ← suspend the devices

suspend_enter() device_power_down() ← suspend devices which fail to suspend in device_suspend()

or devices not entried in the dpm_active tablepm_ops->enter()

device_power_up() ← resume devices

suspend_finish()device_resume() ← resume devices entried in the dpm_off table

:pm_ops->finish()

:

Device Power Management functions


Device Power Management for resume trigger devices

• The resume trigger devices are controlled in particular.

• While the system suspends, their exception handlers are exchanged for the resume exception handlers(for 74xx sleep mode).

Resume Trigger Device General DeviceExample LAN (supports wake-up on LAN)

Power buttonLCD “rid” buttonInput device

HDDLCD

Resume Trigger Yes NoControl function pm_ops functions

(dependent on 74xx)device_xx()(independent on the CPU architecture)



:pm_ops->prepare()

:device_suspend()

suspend_enter() :

pm_ops->enter(){

}:

suspend_finish()device_resume()

:pm_ops->finish()

:

Power Management for resume trigger device

74xx sleep modesuspend

resumereturn

exchange

exchange The deviceexception handler

The resumeexception handler

The deviceexception handler


pm_ops function table• “pm_ops” function table can wrap functions dependent on 74xx.

All functions independent on the CPU architecture can be usedwithout any changes ,

such as enter_state() and device power management functions.

• Our reference comes from the implementations in the x86 kernel.implemented mainly ACPI BIOS processing.

• The codes, preprocessing , main routines and post-processing, are set in the table as follows. They are called from enter_state() function.

/drivers/power/main.cstatic struct pm_ops acpi_pm_ops = {

.prepare = acpi_pm_prepare,

.enter = acpi_pm_enter,

.finish = acpi_pm_finish,};



:pm_ops->prepare()

:

device_suspend()

suspend_enter() :

pm_ops->enter(){

}:


:pm_ops->finish()

:

pm_ops->prepare()


resumereturn

exchange





pm_ops->prepare()The preprocessing dependent on 74xxis wrapped in pm_ops ->prepare() function.

1. Interrupt disabled by the exception of resume trigger devices.Usually the interrupts are used for their device controls.Disabled for the followings

2. Exchange the exception handlers for the exception handlers for resume only. The resume exception handler is the start point where the 74XX system resume from the sleep mode.

• Our reference comes from the following pm_ops->prepare() implementations in the x86 kernel.

– Control resume trigger devices and their device state – Prepare resume vectors



:pm_ops->prepare()

:device_suspend()

suspend_enter() :

pm_ops->enter(){

}:


:pm_ops->finish()

:

pm_ops->enter(), the resume exception handler


resumereturn

exchange





pm_ops->enter()The suspend main routine dependent on the CPU architecture.is wrapped in pm_ops ->enter() function.

1. Interrupt enabled by the exception of resume trigger devices (resume exception handlers).

2. Save the processor contexts3. Destroy timer and cache4. Go to Freescale 74XX sleep mode

(The system goes to suspend)

5. Returned from the resume exception handler.6. Interrupt disabled by the exception of resume factor devices (resume

exception handlers).

• Our reference comes from the following pm_ops->enter() implemented in the x86 kernel. – Save the processor contexts

– Flush cache


The exception handler for resume only• The resume starts from the resume exception handler.

It is set in pm_ops->prepare(), and set off in pm_ops->finish().

• Followings is the flow of the handler.1. Restore the CPU contexts2. Validate timer and cache3. Flush cache and TLB4. Reassemble MMU5. Finish (and return to pm_ops->enter() function)



:pm_ops->prepare()

:device_suspend()

suspend_enter() :

pm_ops->enter(){

}:


:pm_ops->finish()

:

pm_ops->finish()


resumereturn

exchange





pm_ops->finish()

The postprocessing dependent on the CPU architecture is

wrapped in pm_ops ->prepare() function.

1. Restore the normal exception handler of the resume trigger devices from the resume exception handlers

2. Interrupt enabled


6. Performance• We implemented test version. And succeed to reduce power consumption

by more than 50%.


7. Our next challenges• Measureing the resume speed and optimizing the

kernel if needed.

• Longer persistence of Idle ( Nap mode )with tickless kernel function.

•• Hibernation function supports for the next target Hibernation function supports for the next target with nonwith non--volatile memoryvolatile memory


Acknowledgement

TOSHIBA Corporate Software Engineering CenterHiroshi NozuweTsutomu OwaMasahiro YamadaFujihito Numano

TOSHIBA TEC Corporation membersTOSHIBA Information Systems members


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Suspend-to-RAM implementation on Freescale 74xx without PMU€¦ · Title: Presentation title (on...

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