The Bidirectional Dual Active Bridge DC/DC Converter for Photovoltaic Application

Xi'an Jiaotong-Liverpool University

Department of Electrical and Electronic Engineering

Sustainable Energy Technologies Laboratory

Master’s Thesis Defense Presentation

2013 December 11

The Bidirectional Dual Active

Bridge DC/DC Converter for

Photovoltaic Application

Wenlong JING

Supervisor : Dr. Huiqing WEN

1

Presentation Overview

Introduction

Theoretical Analysis

PSIM Simulation

Prototype Design

Experiments

Conclusions

Reference

Acknowledgements


2

Chapter 1

Introduction

Thesis Background

Bidirectional DC/DC Converter (BDC)

Bidirectional DAB DC/DC Converter (BDC-DAB)

Thesis Objectives


3

Introduction Thesis Background

Energy Crisis : Another 41 years

Solution: Renewable Energy

Drawback: Randomness, Unpredictability and Intermittent

World Market Energy Use by Energy Type [1]


[1] Maureen Lorenzetti, “BP: World oil and gas reserves still growing at healthy pace” Oil and gas journal, June 2004.

4

Introduction Thesis Background

Solution: Combine with Energy Storage Unit (ESU)

Example : Renewable Energy Co-generation System

Energy needs to be transferred bidirectional

Unidirectional DC/DC Converter

Load

Unidirectional AC/DC Rectifier

Bidirectional DC/DC Converter


Unidirectional DC/AC Inverter

Unidirectional DC/DC Converter

Unidirectional DC/AC Inverter

Load

Load

G

DC BusPV Array Power Unit

Wind Power Unit

Battery Energy Storage Unit

Supercapacitor Energy Storage Unit

Grid


5

Introduction Application in PV System

Load

Bidirectional

DC/DC

Converter

DC Bus

Power Control

Unit

Battery

Energy

Storage

PV Array


6

Introduction BDC

Bidirectional DC/DC Converter (BDC) :

DC voltage polarity : Same and Unchanged

Energy : Bidirectional Transmission

Stabilized Voltage and Current

Two Operation Modes : Forward & Reverse Mode


Forward mode

Reverse mode

>0 , <0

<0 , >0


7

Introduction BDC

Traditional Bidirectional DC/DC Converter: (Analog Control)

High power loss

Low efficiency of energy conversion

Complex structure

New Generation Bidirectional DC/DC Converter: (Digital Control)

Large capacity

High power density

High efficiency

High reliability and Soft switching

Hot Topology : BDC-DAB

Bidirectional Dual Active Bridge (DAB) Phase Shifted DC/DC Converter


8

Introduction Soft Switching

1. Zero Voltage Switching (ZVS)

When the switch on or off :

The voltage of switch is zero.

2. Zero Current Switching (ZCS)

When the switch on or off :

The current flow is zero.

Reduce switching losses and Improve efficiency

Contain a pair of the resonant inductor and capacitor


9

Introduction BDC-DAB – Vision 1

Two active bridges (Most Popular and Since 1991 [2] )

Eight power MOSFETs (Driven by PWM with 50% duty cycle)

High-frequency transformer

Contains leakage inductance

Galvanic isolation

Achieve ZVS & ZCS for all MOSFETs.

MT1

C1

MT3

MT2 MT4

N:1

MT5 MT7

MT6 MT8

Lk

VinT1

R Either

active or

passive

load

iLVT1 VT2

C2

Vo


[2] R. De Doncker, D. Divan, and M. Kheraluwala, “A three-phase soft-switched high-power-density dc/dc converter for high-power applications,”

IEEE Transactions on Industry Application, vol. 27, pp. 63–73, Jan./Feb. 1991.

DC/AC AC/DC

iL

VT1 VT2

B1 B2

V1 V2

Lk

10


V1

-V1

V2

-V2

0 π 2π

φ

ωt

φ

iL

Steady State Operation Waveform

Phase shift φ : Control the inductance current iL

Voltage VT1 with values ±V1 (Primary side)

Voltage VT2 with values ±V2 (Secondary side)

V1 > V2:Forward mode

The Inductance Current

Semi-cycle Symmetry : Two Modes

Mode 1 : 0 < θ < φ

Mode 2 : φ < 𝜃 < 𝜋

diL(t)

dt= VT1 t − VT2(t)

L


11


V1

-V1

V2

-V2

0 π 2π

φ

ωt

φ

iL

Mode 1 : 𝟎 < 𝛉 < 𝛗

The VT1 is positive and VT2 is

negative

Leakage inductance is charging

iL is increasing

• iL θ = −iL 0 +V1+V2

ws∗Lk∗ θ

Mode 2 : 𝝋 < 𝜽 < 𝝅

The VT1 is positive and VT2 is

negative

Leakage inductance is charging

iL is increasing

• iL θ = iL φ +V1−V2

ws∗Lk∗ (θ − φ)


12


Main Problem : The energy circulates from output to input with a quite

significant value

Causes high conduction losses

Reach 25% of the total output power at maximum output power

Cause high current ripple at the output filter capacitors

Reduces the efficiency

Motivation

Explore a DAB DC/DC converter to overcome the problem

Still keep the original features

Improve the efficiency


13

Introduction Thesis Objectives

Proposed a different vision of Bidirectional DAB DC/DC Converter [3]

High Frequency Transformer with Leakage Inductance

Half bridge in the primary side (Two MOSFETs)

The circulation energy can be eliminated effectively

Total 6 MOSFETs : Reduce the complexity of the control scheme

Cin

N:1

Lk

2Vin

T1

R Either

active or

passive

load

iLVT1 VT2

Co

VoCin

MT1D1 C1 MT5 D5

C5

MT2D2 C2

MT3D3

C3

MT4D4

C4MT6

D6C6


[3] Zhang, J.M.; Xu, D.M.; Zhaoming Qian, "An improved dual active bridge DC/DC converter," Power Electronics Specialists

Conference, 2001. PESC. 2001 IEEE 32nd Annual , vol.1, no., pp.232,236 vol. 1, 2001.

BDC-DAB – Vision 2

14

Chapter 2

Theoretical Analysis

Basic Information

Components Lists

Steady State Operating Waveforms

Steady State Operation Modes

Semi-Cycle : 5 Modes

Key Parameters Decision

Angle β , Ratio “d”, Phase shift φ

Maximum Output Power Po

Performance Comparison

Maximum Output Power Po

Conduction Loss


15

Theoretical Analysis Basic Information

Component Lists

• Source DC voltage which the value is 2*Vin.

• Two Cin is the input capacitor.

• 6 power MOSFETs and two active bridges (MT1, MT2, MT3, MT4, MT5, MT6).

• The D1 - D6, C1 – C6 are anti-paralleled body diodes and capacitor of switches.

• The high frequency transformer T1 which contains leakage inductance Lk .

• The Cout is the output filter capacitor.

• The load can be active or passive load.

Cin

N:1

Lk

2Vin

T1

R Either

active or

passive

load

iLVT1 VT2

Co

VoCin

MT1D1 C1 MT5 D5

C5

MT2D2 C2

MT3D3

C3

MT4D4

C4MT6

D6C6


MT1, MT2 -- ZVS

MT3, MT4 -- ZCS

MT5, MT6 -- ZVS

16

Theoretical Analysis Basic Information

MT1 MT2

MT4 MT3 MT4

MT5 MT6 MT5

β

t2 t3t4 t5

φ

iL

VL

t1

Half Cycle

Steady State Operation Waveform

Ten Modes

Phase shift φ

(MT1, MT2, MT5 and MT6) (Two ZVS Legs)

Angle β

(MT1, MT2, MT3 and MT4) (ZVS Leg and ZCS Leg)

Symmetry : iL t0 = iL t5

Assumption

All components : ideal

Output capacitor:

Sufficient large to get ideal DC

output voltage.


17

Mode 1 : [t0 – t1]

Start : MT2, MT4 and MT5 are under the conducting mode

At t0 : MT2 is switched off while MT4 & MT5 remain turned on

C1, C2 and LK are formed as a resonant circuit

The inductance current iL is decreasing from the largest negative value

C2 starts discharging until completely discharged and the voltage is

uc2 = Vin2(1 − d)2+iL(0)

2Z12 ∗ sin ωr1 ∗ t − α + Vin(1 − d)

Where

Theoretical Analysis Steady State Operation Modes

C2

N : 1

MT5 D5

MT4 D4

LKVin

C1

T1

iL Vout

Vin


• ωr1 = 1

Lk∗(C1+C2)

• Z1 = Lk

(C1+C2)

• α = arctan−1Vin∗ d−1

ip 0 ∗Z1

• d =V0

N∗Vin

18

Mode 2 : [t1 – t2]

After t1: MT1 is turned on under the ZVS condition.

At t2 : the inductance current iL is decreased to zero.

The expression of the iL can be derived in the following step:


MT1 D1

N : 1

MT5 D5

MT4 D4

LKVinT1

iL Vout

iL t = iL t1 +1

Lk∗ V ∗ dt iL t = iL t1 +

Vin 1 + d ∗ t − t1Lk

MT1 MT2

MT4 MT3 MT4

MT5 MT6 MT5

β

t2 t3t4 t5

φ

iL

VL

t1

Half Cycle


19

Mode 3 : [t2 – t3]

After t2 : MT4 will be turned off and MT3 will be turned on under ZCS condition

The secondary side is shorted.

The input voltage is directly applied on the inductance LK

Leads the current of iL increases linearly and it equals:

iL t = iL t2 +Vin ∗ t − t2

Lk

In this mode, the input energy will not flow back to the primary side.

The problem of feedback circulating energy in the previous DAB converter is

eliminated.


MT1 D1

N : 1

MT5 D5MT3 D4

LKVinT1

iL


20

Mode 4 : [t3 – t4]

After t3 : the MT5 turns off

[t3 – t4] is the time of dead band : avoids the MT5 & MT6 turning on simultaneously

The C5, C6 and LK form the resonant circuit until the C5 reaches the output voltage

The voltage of C5 is given by:

uc5 = N2Vin2+ [iL(t3)/N]2 ∗ Z2

2∗ sin ωr2 t − t3 − ϑ + N ∗ Vin

Where

ωr2 =1

N Lk∗ C5+C6

Z2 = N ∗ Lk ∗ C5 + C6

ϑ = arctan−1[N2∗Vin

iL t3 ∗Z2]


MT1 D1

N : 1

LKVinT1

iL Vout

MT3 D4

C6

C5


21

Mode 5 : [t4 – t5]

After t4 : the MT6 turns on under the ZVS condition

Through the inductor LK, the input power is delivering to the output side.

The input voltage is directly applied on the inductance LK

The inductance current iL is keeping constant and equals:

iL t = iL t4 +Vin 1−d ∗ t−t4

Lk

The first 5 modes has been presented.

Due to the symmetry, the next five modes analyzing is omitted.


MT1 D1

N : 1

MT6 D4

LKVinT1

iL Vout

MT3 D4


MT1 MT2

MT4 MT3 MT4

MT5 MT6 MT5

β

t2 t3t4 t5

φ

iL

VL

t1

Half Cycle

22

Assumption

Compared to the modes 2, 3, 5, the

modes 1&4 are quite short and

omitted.

Thus the deadband is omitted.

Evaluate the performance:

Maximum Output Power

Assume fully delivered, thus the Ii

is the inductance current iL with β,

thus the first step is to find the β.

Theoretical Analysis Key Parameter Decision

MT1 MT2

MT4 MT3 MT4

MT5 MT6 MT5

β

t1 t2 t3

Φ

ip

Vp

t0

π

I1

-I1

02π

Φ

π

T2

MT1

MT3


Po = VinIi

The new waveform:

23

The derivation of 𝛃 (The period between t0 and t1)

Flow chart

All equations:

iL θ = −iL 0 +Vin 1+d

ws∗Lk∗ θ 0 ≤ θ ≤ β

iL θ = − iL β +Vin

ws∗Lk∗ (θ − β) β ≤ θ ≤ φ

iL θ = iL φ +Vin 1−d

ws∗Lk∗ θ − φ φ ≤ θ ≤ π

iL 0 = iL π


Collect all equations of inductance in each mode and

Get the expression of the inductance current at t0

From iL t0 = iL t5 , get the expression of the initial inductance current

The expression of β

iL 0 =Vin 1 + d

ws ∗ Lk∗ β

iL π = VinwsLk

φ− β +Vin 1 − d

wsLkπ − φ


24

The derivation of 𝛃 (The period between t0 and t1)

• Once get the expression of β , the equation of the inductance current iL can be found. After

that, the equation of output power Po can be deduced.


iL 0 = iL π

iL π − iL 0 = −Vin 1 + d

ws ∗ Lkβ +

Vinws ∗ Lk

φ− β +Vin 1 − d

ws ∗ Lkπ − φ

− 1 + d ∗ β + φ − β + 1 − d ∗ π − φ = 0

2 + d ∗ β = 1 − d ∗ π + d ∗ φ

𝛃 =𝟏 − 𝐝 ∗ 𝛑 + 𝐝 ∗ 𝛗

(𝟐 + 𝐝)


iL Po

25

The derivation of output power 𝑷𝒐

Assume: all input energy is fully delivered to the output.

Po = VinIi (The Vin is the input voltage and Ii is the average current )

Then the average current is:

Ii = 1

π[ iL θβ

0dθ + iL θ

Φ

βdθ + iL θ

π

Φdθ]

Applying MATLAB:

Ii =d∗Vin

2 2+d 2ωsLk∗ π 1 + d − 2d2 + 4φ 1 + d + d2 − 2 2 + 2d + d2

φ2

π

Assume,

f φ = π 1 + d − 2 ∗ d2 + 4φ 1 + d + d2 − 2 2 + 2d + d2φ2

π

Then the output power is:

𝐏𝐨 = 𝐕𝐢𝐧𝐈𝐢 =𝐝 ∗ 𝐕𝐢𝐧

𝟐

𝟐 ∗ 𝟐 + 𝐝 𝟐 ∗ 𝛚𝐬 ∗ 𝐋𝐤∗ 𝐟(𝛗)



d ?

26

The Parameter “d” Decision ( 𝐝 =𝑽𝟎

𝑵∗𝑽𝒊𝒏 )

It stands for the primary referred DC voltage gain.

In order to achieve soft switching, the case shall be satisified : φ ≥ β ≥0

Based on the expression of β, d has three possible cases : d<1, d>1 and d=1

(1) d<1

MT1 & MT2 constantly satisfies the ZVS condition

However, MT5 & MT6 will not meets the ZVS condition if the φ is decreased to a certain value

β =d−1 ∗π+d∗φ

(2+d)> 0 φmin1 =

1−d

dπ

(2) d>1

MT1 & MT2 will not satisfy the ZVS condition when the φ is lower than a certain value

β =1−d ∗π+d∗φ

(2+d)> 0 φmin2 =

d−1

dπ

If φ is below φmin2, energy is flowing back and ripple current will be increased



27

The Parameter “d” Decision ( 𝐝 =𝐕𝟎

𝐍∗𝐕𝐢𝐧 )

(3) d=1

The expression β is :

β =1 − d ∗ π + d ∗ φ

(2 + d)=φ

3> 0

That means the φ ≥ β ≥0 is satisfied across the whole load range.

Under this case, all MOSFETs can achieve the soft switching condition.

Therefore, d=1 is the preferred operation point.



𝐏𝐨 = 𝐕𝐢𝐧𝐈𝐢 =𝐕𝐢𝐧

𝟐

𝟏𝟖 ∗ 𝛚𝐬 ∗ 𝐋𝐤∗ 𝐟(𝛗)

f φ = π 1 + d − 2 ∗ d2 + 4φ 1 + d + d2 − 2 2 + 2d + d2φ2

π = 12φ -

10πφ2

28

Under the case d=1, the output power is:

For evaluating the performance of the converter, the maximum output power is deduced.

And the maximum value occurs at f′ φ = 0,

f ′ φ = 12 −10

π∗ φ = 0

Thus

φ = 0.6π

When d=1 and φ=0.6𝜋, the maximum output power is:

Po max= 0.2π ∗Vin

2

ωs∗Lk



Po = VinIi =Vin

2

18∗ωs∗Lk∗ f(φ) =

Vin2

18∗ωs∗Lk∗(12φ -

10πφ2)

29

Figure below is the output power PO with variation of φ

By way of a contrast, the corresponding curve of the DAB – V1 converter is added.

Comparing the two curves, the DAB – V2 reduces the maximum output power under the

same circuit parameters.

Theoretical Analysis Performance Comparison


0 0.5 1 1.5 2 2.5 3 3.50

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

[rad]

Po /

[p.u

]

Output Power Versus Φ (d=1)

DAB -- V1

DAB -- V2

30

Through the transformer current, compare the conduction loss of the two DABs.

Deduce the RMS equations of the transformer current firstly and it is:

Irms = ip θ2

β

0

dθ + ip θ2

Φ

β

dθ + ip θ2

π

Φ

dθ

DAB BDC – V1 :

Irms = Vin

ws ∗ Lk∗ 4 ∗ φ2 ∗ π − φ +

φ3

3

DAB BDC – V2 :

Irms = Vin

ws ∗ Lk∗4 ∗ φ2(π − φ)

9+4 ∗ φ3

27

To provide a reasonable comparison, assume the two converter are all operating under

the same condition. (same output power and same phase shift angle φ)



31

For more accuracy, define coefficient: k = 9∗(1−

φ

π)

6−5∗φ

π

Obviously, the RMS current is reduced at the same output power and phase shift.

The DAB– V2 performance a lower conduction loss.


0 0.5 1 1.5 2 2.5 3 3.50

0.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

2

Φ (rad)

Irm

sRMS Current of Transformer vs. Φ (d=1)

DAB -- V2

Multiplied by k

DAB -- V1


32

PSIM Simulation

Basic Information

Model

Model design specification

Overview of Simulation Results

The Ripple Current of Output Capacitor

DAB BDC –V1

DAB BDC –V2

The Transformer Current

DAB BDC –V1

DAB BDC –V2

Comparison

Soft Switching Condition Verification

ZVS

ZCS

Chapter 3


33

The simlation model of the new DAB BDC (Based on software PSIM)

The control signal is generated through the PWM_G block.

PSIM Simulation Basic Information


34

Model design specification

Parameter Symbol Value Unit

Output power Po 300 W

DC source voltage 2*Vin 200 V

Output Voltage Vo 50 V

Switching frequency fs 200 kHz

Transformer n = N1 : N2 2:1

Lk 5 uH

Output Filter Capacitor Cout 1.32 mF

Load Rload 2.5 Ω



35

The simulation results : Inductor Current 𝑖𝐿 and Drive Signals

Same with the theoretical analyzing results.


0

0.2

0.4

0.6

0.8

1

MT1 MT2

0

0.2

0.4

0.6

0.8

1

MT3 MT4

0

0.2

0.4

0.6

0.8

1

MT5 MT6

8.6e-005 8.8e-005 9e-005 9.2e-005

Time (s)

0

-10

-20

10

20

I1


36

DAB BDC – V1 : Contains visible ripple [3]

DAB BDC – V2 : Small ripple value and the performance is improved considerable.

Note these two figures were obtained under the case d=1.

PSIM Simulation The Ripple Current of Output Capacitor

0.000164 0.000166 0.000168 0.00017

Time (s)

0

-10

-20

10

20

I(C3)


[3] Zhang, J.M.; Xu, D.M.; Zhaoming Qian, "An improved dual active bridge DC/DC converter," Power Electronics Specialists

Conference, 2001. PESC. 2001 IEEE 32nd Annual , vol.1, no., pp.232,236 vol. 1, 2001.

37

PSIM Simulation The Transformer Current

DAB BDC – V1: In a half circle, the transformer current is continuous increasing. The

topology has a reverse recovery problem and the energy flows back.

DAB BDC – V2 : The transformer current is constant when the leakage inductor is full

charged. Difference performance compare with the Vision 1.

The simulation results verified the theoretical analysis.

6e-005 8e-005 0.0001 0.00012 0.00014

Time (s)

0

-10

-20

10

20

I1


[4] Huang-Jen Chiu; Li-Wei Lin, "A bidirectional DC-DC converter for fuel cell electric vehicle driving system," Power Electronics,

IEEE Transactions on, vol.21, no.4, pp.950,958, July 2006.

38

Due to complementation position, note that the MT1 and MT2 have the same waveform.

MT1 and MT2 : Achieve ZVS successfully.

PSIM Simulation ZVS and ZCS Verification

8.8e-005 9e-005 9.2e-005 9.4e-005 9.6e-005 9.8e-005

Time (s)

0

50

100

150

200

MT1Current MT1Vgs


39


MT3 and MT4 : Achieve ZCS successfully.


0.000112 0.000114 0.000116 0.000118 0.00012 0.000122

Time (s)

0

20

40

MT4Current MT4Vgs


40


MT5 and MT6 : Achieve ZVS successfully.


0.000128 0.00013 0.000132 0.000134 0.000136 0.000138

Time (s)

0

-20

-40

20

40

MT5Current MT5Vgs


41

Prototype Design

The Hardware Structure

The Hardware Design

Basic information

High Frequency Transformer Design

Compensative Inductor Design

Selection of MOSFET

Drive Circuit Design

PCB Design

The Software Design

DSP Introduction

Three Phase PWM Waveform Generation

Chapter 4


42

The system architecture diagram

Prototype Design The Hardware Structure

Peripheral(Power Supply,Computer, etc.)

DSPTMS320F28335

DAC or IO Peripheral Circuit

ADCSampling

Circuit

PWMPeripheral Circuit

Driver Circuit

Main Power Circuit

Interface Circuit


43

The prototype design specifications

Prototype Design The Hardware Design

Parameter Symbol Value Unit

Output power Po 300 W

DC source voltage 2*Vin 200 V

Output Voltage Vo 50 V

Input Bridge Switches MT1-MT2 IRF540

Output Bridge Switches MT3-MT6 IRF540

Switching frequency fs 200 kHz

Transformer n = N1 : N2 2:1

Lk 5 uH

Output Filter Capacitor Cout 100 uF

Load Rload 300 Ω


44

Overview



45



Input

Drive Circuits

Output

Transformer

Inductor

MOSFETs PWM Inputs

Cin

Cout

1

2

3

Overview

46

The Design Steps

• EE-25 Ferrite Core

• Turns: 𝑁𝑃 = 8 ; 𝑁𝑆 = 4

• Wire: AWG 29

• Winding Number : Primary 12;

Secondary 24.

Prototype Design The High Frequency Transformer Design

Checking the Feasibility

Wire Size & Winding Number

Turns Evaluation

Determine Core Size AP Method: AP = 𝐴𝑤𝐴𝑒 =𝑃𝑜

𝐾𝑓𝑠∆𝐵

4

3𝑐𝑚4

Np = Vin ∗ 10

4

Kffs∆BAe


47

The Prototype of the Transformer

Leakage Inductance : 2.56 uH

Require a compensative inductor



48

The converter contains parasitic inductance

The total leakage inductance shall less than 5 uH

• EE-25 Ferrite Core

• Turns: 𝑁𝐿 = 9

• Gap: 𝛿 ` = 4.5 mm

• Wire: AWG 29

• Winding Number : 12

Prototype Design Compensative Inductor Design

Checking the Feasibility

Air Gap Calculation

Wire Size & Winding Number

Turns Evaluation

Determine Core Size

𝑁𝐿 = 𝐿 ∗ 𝐼𝐿𝑝𝑘_𝑚𝑎𝑥4∆𝐵𝐴𝑒

∗ 102

δ` = 𝜇0NL

2 ∗ 2𝐴𝑒𝐿


49


Total Leakage Inductance : 4.28 uH

Contain parasitic inductance less than 5 uH


50

Maximum Power : 300W

Peak Current : 6A

Choose the power MOSFET IRF540N (International Rectifier Company)

Prototype Design Selection of power MOSFET


51

Maximum Power : 300W

Main Chip : IR2110 (Drive 2 MOSFETs) 15V

6N137D: Opto-coupler (isolate the main circuit and control circuit) 5V

Prototype Design The Drive Circuit Design

L O

1

C O M

2

V C C

3

V S

6

V B

7

H O

8

V D D

1 1

HIN

1 2

S D

1 3

LIN

1 4

VSS

1 5

U D

IRS2110

D b

Diode FRD

G D H

G D L

1 K

R b

3 3 0 n F

C b

3 3 0 n F

Cvdd

M P

C O M

3 3 0 n F

Cvcc

6 o h m

R12

6 6 o h m

R11

D 1

D Schottky

6 o h m

R22

6 6 o h m

R21

D 2

D Schottky

+

-

V C C

Vout1

Vout2

G N D+

-

Vf1

Vf2

U101

6N137D

4 7 0 o h m

RI1

4 7 0 o h m

R O 1

4 7 0 o h m

R O 2

4 7 0 o h m

RI2

HIN-

LIN-

HIN+

LIN+

V D D

VSS

V C C

S D


52

Three Drive Signals

Drive 1 Drive 2

Drive 3


Prototype Design The Drive Circuit Design

53

Schematic Diagram

Prototype Design PCB Design

1 2

3 4

5 6

7 8

9 1 0

1 1 1 2

1 3 1 4

1 5 1 6

Control

S1H+ S1H-

S1L+ S1L-

S2H+

S2L+

S3H+

S3L+

S4H+

S4L+

S2H-

S2L-

S3H-

S3L-

S4H-

S4L-

1

2

3

4

AUX Power V D D

VSS

V C C

S D

1

2

3

4

5

6

7

8

9

C_VDD C V D D

S 1 1

IRF540

S 1 2

IRF540

T 1

Trans Eq

S 2 1

IRF540

S 2 2

IRF540

S 2 3

IRF540

S 2 4

IRF540

5 u H

L

Inductor Iron

G11

G12

G21

G22

G23

G24

1

2

S 1 V

100uF/ 100V

CP11

100uF/100V

CP2

M11

M12

M21

M22

P S 1 +

P S 1 - P S 2 -

P S 2 +

1

2

S 1 C

1

2

S 2 C

1

2

S 2 V

100uF 100V

CP12

0.01uF

CP22

HIN+

LIN+

G D H

G D L

M P

C O M

HIN-

LIN-

G D 1 Driver.SchDoc

S1H+

S1H-

S1L+

S1L-

G11

G12

M11

P S 1 -


54

Overview

Prototype Design PCB Design


55

The Microcontroller : DSP TMS320LF28335

The Features:

32-bit floating point CPU (150 MHz, modified Harvard architecture)

Memory: 68k SARAM, 512k Flash

MAC Operations

16 12-bit ADC Channels (25 MHz)

18 PWM Outputs

Low Power Dissipation

3 32-bit CPU Timers

1 Watchdog Timer

88 GPIO

6 Channel DMA

Prototype Design Software Design DSP


56

6 MOSFETs need three pairs of complementary PWM signals

PWM is a scheme to represent a signal as a sequence of pulses

Use ePWM Module in DSP to generate PWM

Two outputs : EPWMxA and EPWMxB

7 Sub-modules

Prototype Design Software Design PWM Generation

To power

switching

device

Power

supply rail

Gate signals are

complementary PWM

Time-base (TB) module

Counter-compare (CC) module

Action-qualifier (AQ) module

Dead-band (DB) module

Event-trigger (ET) module

Trip-zone (TZ) module

PWM-chopper (PC) module

ePWM module

GPIOMUX

EPWMxA

EPWMxB

EPWMxSYNCI

EPWMxSYNCO

PIE

ADC

EPWMxSOCA

EPWMxSOCB

Peripheral bus

to


57

Set the initial values of corresponding registers within each sub-module


Compare

Logic

Action

Qualifier

Shadowed

Compare

Register

Shadowed

Clock

Prescaler

Shadowed

Compare

Register

CMPA . 15 - 0 CMPB . 15 - 0

EPWMxA

EPWMxBSYSCLKOUT

TZy

EPWMxSYNCI EPWMxSYNCO

TBCLK

TBCTR . 15 - 0

16-Bit

Time-Base

Counter

Dead

Band

Period

RegisterPWM

Chopper

Trip

ZoneTBPRD . 15 - 0

TB

CC

AQ DB

TB

CC

AQ

DB

TZ

TZ


58

One Phase PWM Waveform

• With Deadband

• 200kHz

• Complementary



SyncIn

SyncOut

CTR=zero

CTR=CMPB X

En

o o

o

o

o

o o =36° Phase

EPWM2A

EPWM2B

SyncIn

SyncOut

CTR=zero CTR=CMPB

X

En

o o

o

o

o

o o =72° Phase

EPWM3A

EPWM3B

SyncIn

SyncOut

CTR=zero

CTR=CMPB X

En

o o

o

o

o

o o =0° Phase

EPWM1A

EPWM1B

=36°

=72°


59

PWM Phase Shift Generation : Three ePWM modules are used.


60

Three pairs of complementary PWM signals


MT1_MT3 MT1_MT5 MT3_MT6

Cin

N:1

Lk

2Vin

T1

R Either

active or

passive

load

iLVT1 VT2

Co

VoCin

MT1D1 C1 MT5 D5

C5

MT2D2 C2

MT3D3

C3

MT4D4

C4MT6

D6C6


61

Experiments

Basic Information

Drive Voltage of MOSFETs

The Transformer Current (Primary Side)

Soft Switching Condition Verification

Limitations

Chapter 5


62

Test Platform Overview

Experiments Basic Information


63

Experiments Basic Information

DAB-BDC

DSP

LOAD

AC/DC

AC Power


64

Experiments Drive Voltage of MOSFETs


The Drive Voltage VGS

on Input Bridge

The Drive Voltage VGS

on Output Bridge

Deadband is added

65

Experiments The Transformer Voltage (Primary Side)


Verified the Theoretical Analysis

66

Experiments Soft Switching Condition Verification

The VGS and VDS on

Input Bridge

The VGS and VDS on

Output Bridge


67

Experiments Limitations

The laboratory does not have High Voltage DC Power

Supply.

The 60V DC Power Supply : Output with Huge Ripple

Can not provide a 300 W , 200V input, thus no results to

evaluate the efficiency.

Now : 60V, 50W, Light Load, Verified the basic function.


68

Conclusions

Summary

Future Work

Chapter 6


69

1. Renewable energy systems needs energy storage unit and DAB-BDC

transfers the energy in bidirectional way.

2. Discussed a improved topology of bidirectional DAB DC/DC converter

that can eliminate the circulation energy losses (Compare traditional

DAB).

3. Fully theoretical analysis was done.

4. Based on PSIM software, simulation was done.

5. A 300W prototype was built and experiment results verified the

previous analysis.

Conclusions Summary


70

1. Get High Quality DC power supply and evaluate the efficiency.

2. Open loop and not sufficiently stable Small signal model and PI

controller improve the stable ability.

3. Full order continuous time average model for DC/DC DAB converters

will be developed.

4. Try to adapt the DAB BDC into the renewable energy systems such as PV

array generation, wind turbine or tidal power generation.

Conclusions Future Work


71

Reference (Part)


1. Maureen Lorenzetti, “BP: World oil and gas reserves still growing at healthy pace” Oil and gas journal, June 2004.

2. Xiaodong Li; Bhat, A. K S, "Analysis and Design of High-Frequency Isolated Dual-Bridge Series Resonant DC/DC Converter," Power Electronics,

IEEE Transactions on , vol.25, no.4, pp.850,862, April 2010.

3. H. J. Chiu and L. W. Lin, "A bidirectional dc-dc converter for fuel cell electric vehicle driving system," IEEE Trans. Power Electron., vol. 21, no. 4,

pp. 950-958, July 2006.

4. S. Jalbrzykowski, A. Bogdan and Tadeusz Citko, "A dual full-bridge resonant class-e bidirectional dc-dc converter," IEEE Trans. Industrial

Electron., vol. 58, no. 9, pp. 3879-3883, September 2011.

5. L. Sh. Yang and T. J. Liang, "Analysis and implementation of a novel bidirectional dc-dc converter," IEEE Trans. Industrial Electron., vol. 59, no.

1,p.p 422-434, January 2012.

6. Zhu, L., "A Novel Soft-Commutating Isolated Boost Full-Bridge ZVS-PWM DC–DC Converter for Bidirectional High Power Applications," Power

Electronics, IEEE Transactions on , vol.21, no.2, pp.422,429, March 2006.

7. N. M. L. Tan, T. Abe and H. Akagi, "Topology and Application of Bidirectional Isolated DC-DC Converters," 8th International Conference on Power

Electronics - ECCE Asia, p-p1039-1046, June 2011.

8. Huang-Jen Chiu; Li-Wei Lin, "A bidirectional DC-DC converter for fuel cell electric vehicle driving system," Power Electronics, IEEE Transactions

on, vol.21, no.4, pp.950,958, July 2006.

9. Zhe Zhang; Thomsen, O.C.; Andersen, M. A E; Nielsen, H.R., "A novel dual-input isolated current-fed DC-DC converter for renewable energy

system," Applied Power Electronics Conference and Exposition (APEC), 2011 Twenty-Sixth Annual IEEE , vol., no., pp.1494,1501, 6-11 March

2011.

10. Babokany, A.S.; Jabbari, M.; Shahgholian, G.; Mahdavian, Mehdi, "A review of bidirectional dual active bridge converter," Electrical

Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2012 9th International Conference on , vol.,

no., pp.1,4, 16-18 May 2012.

11. Jung-Goo Cho; Sabate, J.A.; Hua, G.; Lee, F.C., "Zero-voltage and zero-current-switching full bridge PWM converter for high-power

applications," Power Electronics, IEEE Transactions on , vol.11, no.4, pp.622,628, Jul 1996.

12. R. De Doncker, D. Divan, and M. Kheraluwala, “A three-phase soft-switched high-power-density dc/dc converter for high-power applications,” IEEE

Transactions on Industry Application, vol. 27, pp. 63–73, Jan./Feb. 1991.

13. M. N. Kheraluwala, R. W. Gascoigne, D. M. Divan, and E. D. Baumann, “Performance characterization of a high-power dual active bridge,” IEEE

Transactions on Industry Application, vol. 28, pp. 1294–1301, Jun. 1992.

14. Kunrong Wang; Lee, F.C.; Lai, J., "Operation principles of bi-directional full-bridge DC/DC converter with unified soft-switching scheme and soft-

starting capability," Applied Power Electronics Conference and Exposition, 2000. APEC 2000. Fifteenth Annual IEEE, vol.1, no., pp.111,118 vol.1,

2000.

15. Kheraluwala, M.N.; Gascoigne, R.W.; Divan, D.M.; Baumann, E.D., "Performance characterization of a high-power dual active bridge DC-to-DC

converter," Industry Applications, IEEE Transactions on , vol.28, no.6, pp.1294,1301, Nov/Dec 1992.

16. Zhang, J.M.; Xu, D.M.; Zhaoming Qian, "An improved dual active bridge DC/DC converter," Power Electronics Specialists Conference, 2001.

PESC. 2001 IEEE 32nd Annual , vol.1, no., pp.232,236 vol. 1, 2001.

17. Oggier, G.G.et al., "Extending the ZVS Operating Range of Dual Active Bridge High-Power DC-DC Converters," Power Electronics Specialists

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72

Acknowledgements


• I would like to thank first and foremost my advisor, Dr. Huiqing Wen for his kind guidance

and help not only with research but also with my life at XJTLU.

• I would also express special thanks to the Dr. Mohamed Nayel. Although his is far away in

Egypt, he was my supervisor in MSc-year 1 and he taught me how to do research.

• I also want to thank Dr. Tammam Tillo. Under his tremendous help, the MSc program was

able to start.

• I also want to thank my dear English teacher, Roy Arthur Edwards, his guidance on technical

writing and research habits is highly valuable to me for my future work.

• I also want to thank my “boss”, A. Prof. Moncef Tayahi, he is always generous to give me

suggestions, encouragement and ideas to help me to solve problems.

• I would also like to thank my other MSc classmates, Fei CHENG, Xingshuo LI , Hengyang

LUO, Saiyu SHI, Jiawei QIU, Li GAO, Xin LIU, Fang MA and Zongbiao ZHANG.

Their innovative work has given me inspiration and sparked my interest in the area of power

electronics, and has also enriched my experience in XJTLU.

• Last but not least, I will thank to my dear parents. They always concentrate on my life here

and gave me great support and encouragement. I can feel their selfless love all the time.

73

Thank You!


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