TNB PRODUCT APPLICATION FOR GE GRID SOLUTIONS P40 …

Copyright © by Protection Automation & Control Section, Grid Solution Expertise, Grid Division, TNB

TNB PRODUCT APPLICATION FOR

GE GRID SOLUTIONS P40 AGILE P94Vx

VOLTAGE PROTECTION & SYNCHRONIZING CHECK

Protection, Automation & Control Grid Solution Expertise Department Grid Division Tenaga Nasional Berhad

Copyright © by Protection Automation & Control Section, Grid Solution Expertise, Grid Division, TNB Page 2 of 27

PRODUCT APPLICATION

SUBJECT Section Protection Automation & Control Matter Technical Guidebook Category Product Application Title TNB Product Application GE Grid Solutions P40 Agile P94Vx Voltage

Protection & Synchronizing Check Application • Under Voltage & Under Frequency

• Under Voltage Interlock • Synchronizing Check

Model Number • P94VB • P94VP

Hardware Version A (Hardware) Firmware Version 62 (Major Firmware) D (Minor Firmware) Document No TEG/SC/GE GRID SOLUTIONS/P94Vx Revision No. 3.1 Date 23 October 2020

Task Name Designation Date Signature

Initiated and Written by

Amirul Idzuan Ideris Senior Engineer – PM 23/10/2020 AII

Khairul Anuar Ghafar Senior Engineer – PM 23/10/2020 KAG

Mohd Hafiz Azmi Senior Engineer – PM 23/10/2020 MHA

Intan Juliana Abdul Hamid

Senior Engineer – Product Modelling 23/10/2020 IJH

Shahliza Aznim Sarmin Senior Engineer – PRST 23/10/2020

Reviewed by Kamarul Jalal Abd Jalil Principle Engineer –

PRS 23/10/2020 KJA

Hairussaleh Osman Principle Engineer – PD&E 23/10/2020 HBO

Approved by Fadhilah Ahmad Chief Engineer - PAC 23/10/2020 FBA

REVISION HISTORY

Revision No

Date Revision by Revision Notes

1.0 02/03/2020 PD&E Finalized document 2.0 08/05/2020 PD&E Revised marshalling for F81UF27UV application:

• Assign signal LS Operated from adjacent LS relay at Input L2 for DR cross triggering

• Add LS Operated signal multiplication at Output 5 for DR cross triggering

• Revise LEDs marshalling 03/07/2020 PD&E Revised marshalling for F81UF27UV application:

• Revised frequency and voltage assignment


REVISION HISTORY Revision

No Date Revision by Revision Notes

3.0 24/08/2020 PD&E a) Rebranding document category to Product Application

b) Change Name from Load Shedding Scheme to Demand Shedding Scheme (DSS)

c) Updated information in Additional Features d) Revised marshalling for F81UF27UV application:

• Revised frequency and voltage assignment • Change number of tripped bays from 4 to 5

bays (2 TX Groups and 3 Feeders) e) Revised marshalling for F25MSYNC application:

• Removed indication contact for SYNC OK 3.1 23/10/2020 PM, PAC Revised marshalling for F25MSYNC application:

Added BO2 contact for SYNC FAIL


TABLE OF CONTENTS 1.0 INTRODUCTION ............................................................................................................................... 5

INTRODUCTION ....................................................................................................................................................... 5 OBJECTIVES ............................................................................................................................................................ 5 COLLABORATION ..................................................................................................................................................... 5 CHANGES ............................................................................................................................................................... 5

2.0 IED SETUP ........................................................................................................................................ 6

IED FEATURES ........................................................................................................................................................ 6 REFERENCE ............................................................................................................................................................ 7 VERSION & ORDERING DATA ..................................................................................................................................... 7

3.0 IED MARSHALLING ........................................................................................................................... 9

APPENDIX 3A1: MARSHALLING OF BINARY INPUTS FOR UNDER VOLTAGE EARTH SWITCH INTERLOCK PROTECTION (P40 AGILE P94VB) ...................................................................................................................... 10 APPENDIX 3A2: MARSHALLING OF BINARY OUTPUTS FOR UNDER VOLTAGE EARTH SWITCH INTERLOCK PROTECTION (P40 AGILE P94VB) ...................................................................................................................... 11 APPENDIX 3A3: MARSHALLING OF LED INDICATORS FOR UNDER VOLTAGE EARTH SWITCH INTERLOCK PROTECTION (P40 AGILE P94VB) ...................................................................................................................... 12 APPENDIX 3B1: MARSHALLING OF BINARY INPUTS FOR DEMAND SHEDDING SCHEME (P40 AGILE P94VB) ... 13 APPENDIX 3B2: MARSHALLING OF BINARY OUTPUTS FOR DEMAND SHEDDING SCHEME (P40 AGILE P94VB) 14 APPENDIX 3B3: MARSHALLING OF LED INDICATORS FOR DEMAND SHEDDING SCHEME (P40 AGILE P94VB) . 17 APPENDIX 3C1: MARSHALLING OF BINARY INPUTS FOR MANUAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP) .................................................................................................................................................... 18 APPENDIX 3C2: MARSHALLING OF BINARY OUTPUTS FOR MANUAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP) ............................................................................................................................................ 19 APPENDIX 3C3: MARSHALLING OF LED INDICATORS FOR MANUAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP) .................................................................................................................................................... 21 APPENDIX 3D1: MARSHALLING OF BINARY INPUTS FOR EXTERNAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP) .................................................................................................................................................... 22 APPENDIX 3D2: MARSHALLING OF BINARY OUTPUTS FOR EXTERNAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP) ............................................................................................................................................ 23 APPENDIX 3D3: MARSHALLING OF LED INDICATORS FOR EXTERNAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP) ............................................................................................................................................ 25

4.0 IED VT CONNECTIONS .................................................................................................................... 26

OVERVIEW ........................................................................................................................................................... 26 HOW TO READ THIS SECTION .................................................................................................................................... 26 VT CONNECTION ................................................................................................................................................... 26

5.0 STANDARD LOGIC AND TERMINAL FUNCTION DIAGRAM ................................................................ 27

INTRODUCTION ..................................................................................................................................................... 27 LOGIC ................................................................................................................................................................. 27


1.0 INTRODUCTION Introduction The numerical multi-function relay allows competent users to customise the

configuration of the relay. Therefore, a standard configuration of numerical multi-function relay is required to provide easy reference in using them for Load Shedding, Synchro Check, Manual Synchro Check and Under Voltage Earth Switch Interlock.

Objectives This document is to provide the standard configuration for GE Grid Solutions P40

Agile P94Vx for these applications: • Under Voltage Earth Switch Interlock • Under Voltage & Under Frequency Load Shedding • Manual Synchronizing Check • Synchronizing Check

Collaboration The document was produced collaboratively by TNB protection engineers from

Protection, Automation & Control, Grid Solution Expertise, Grid Division, TNB & Protection Setting - Maintenance Technical Expert & Performance Unit, Grid Maintenance Department, Grid Division, TNB for the mentioned application together together with GE Grid Solutions personnel.

Changes The request for any clarification on the contents of this document can be

forwarded to the: Chief Engineer (Protection, Automation & Control – PAC), Grid Solution Expertise, Grid Division, Tenaga Nasional Berhad


2.0 IED SETUP IED Features

In this document, the GE Grid Solutions P40 Agile P94Vx shall be used for the following applications:

Model Application Additional Features P94VB

Under Voltage Earth Switch Interlock

• Used V<3 element • Blocking of V<3 due to MCB Trip done

using PSL logic Under Voltage & Under Frequency (Load Shedding)

• Support tripping maximum for 5 bays per box

• V<1, V<2 and V<3 elements for UV • f1, f2, f3, f4, f5, f6, f7, f8, f9 elements

for UF • Provision for df/dt function • ON/OFF Switch to inhibit UVLS/UFLS • Blocking of Under Frequency elements

done by: o activation of built-in Under

Frequency UV Block (V<B) for immediate blocking

o Alarm to SCADA/Annunciator is time delayed

• Blocking of Under Voltage elements done by: o UV Block element feedback o Alarm to SCADA/Annunciator is

time delayed • LS Operated to cross trigger DR of

adjacent LS relay • Setting application:

o Assignment of frequency, blocking and tripping element are done in setting and logic (PSL)

o No of frequency elements in used depends on how many bays to trip per box eventhough all bays have same frequency and timer setting

o Only 1 undervoltage elements assigned per station ie trip 5 bays, Bay 1: Stg1 f+t, Stg2 f+t, V<1 trip Bay 2: Stg3 f+t, Stg4 f+t, V<1 trip Bay 3: Stg5 f+t, V<1 trip Bay 4: Stg6 f+t, V<1 trip Bay 5: Stg7 f+t, V<1 trip

o However, element V<1 trip need to be unlink in the PSL if UVLS Not In Used


Model Application Additional Features P94VP Manual Synchronizing

Check • Sync Check and Voltage check

conditions done using PSL logic (LLDB, DLLB, DLDB)

• Bypass Sync interlock conditions done using PSL logic

• Manual Sync Fail delayed pickup timer in the PSL for indication to SCADA & Annunciator shall be set as 20ms

Synchronizing Check • Sync Check and Voltage check conditions done using PSL logic (LLDB, DLLB, DLDB)

• AR Sync Fail delayed pickup timer in the PSL for indication to SCADA & Annunciator shall be set the same as AR DT

___________________________________________________________________

Reference This document refers to the following other documents:

P94V-B/P-TM-EN-1.pdf

Version & Ordering Data

Model : P40 Agile P94Vx Hardware Version : A Major Firmware Version : 62 Minor Firmware Version : D The different GE Grid Solutions P40 Agile P94Vx models and its intended application are described below:

Application Ordering Cortex Under Voltage Earth Switch Interlock P94VB11A1B062AA Under Voltage & Under Frequency (Load Shedding)

P94VB11A1B062AA

Manual Synchronizing Check P94VP11A1B062AA Synchronizing Check P94VP11A1B062AA



3.0 IED MARSHALLING Introduction This section will discuss the GE Grid Solutions P40 Agile P94Vx input/output

marshalling. The discussions will results in the common or standard TNB marshalling for the GE Grid Solutions P40 Agile P94Vx relay.

Terminal Marshalling

The marshalling configurations of the GE Grid Solutions P40 Agile P94Vx in this document is divided into 3 major applications as below:

TNB Applications Model Appendix Application


P94VB

3A1 Marshalling Of Binary Inputs

3A2 Marshalling Of Binary Outputs

3A3 Marshalling Of LEDs

Under Voltage & Under Frequency Demand Shedding Scheme

3B1 Marshalling Of Binary Inputs

3B2 Marshalling Of Binary Outputs

3B3 Marshalling Of LEDs

Manual Synchronizing Check

P94VP

3C1 Marshalling Of Binary Inputs

3C2 Marshalling Of Binary Outputs

3C3 Marshalling Of LEDs

Synchronizing Check

3D1 Marshalling Of Binary Inputs

3D2 Marshalling Of Binary Outputs

3D3 Marshalling Of LEDs


APPENDIX 3A1: MARSHALLING OF BINARY INPUTS FOR UNDER VOLTAGE EARTH SWITCH INTERLOCK PROTECTION (P40 AGILE P94VB)

**common negative for Opto 1, 2, and 3; common negative for Opto 4, 5, 6, 7, 8

Contact Binary Input

Task No.

Status Input Labels Application Notes

46-52 OPTO 1 1 MCB input L1 MCB Trip VT MCB Trip To block Under Voltage Interlocking

48-52 OPTO 2 1 - L2 SPARE SPARE








APPENDIX 3A2: MARSHALLING OF BINARY OUTPUTS FOR UNDER VOLTAGE EARTH SWITCH INTERLOCK PROTECTION (P40 AGILE P94VB)

Contact Binary Output

Task No.

Marshalling (Function No./Function

Description) Label Application Notes

4-6 RELAY

HEALHY 1 - - NOT USED

3-5 RELAY FAILED 1 Relay Watch Dog NC contact Relay IRF For indication Contact Multiplication: • Annunciator • SCADA

30-32 RL1 1 U<3 Trip R1 3UV Interlock Release interlock Q8

34-36 RL2 1 - R2 SPARE SPARE








APPENDIX 3A3: MARSHALLING OF LED INDICATORS FOR UNDER VOLTAGE EARTH SWITCH INTERLOCK PROTECTION (P40 AGILE P94VB)

LED Indicator Task No


Description) Labels Notes

LED 1 1 U<3 Trip E/S Interlock Inhibit

LED 2 1 - SPARE

LED 3 1 - SPARE

LED 4 1 - SPARE


APPENDIX 3B1: MARSHALLING OF BINARY INPUTS FOR DEMAND SHEDDING SCHEME (P40 AGILE P94VB)


Task No.


46-52 OPTO 1 1 On/Off Demand Shedding Scheme

L1 On/Off Switch Inhibit Demand Shedding Scheme

• To block operation of UV/UF from external Load Shedding On/Off Switch

• Positive DC from OFF switch contact

48-52 OPTO 2 1 DSS Operated L2 DSS Operated DSS Operated cross triggering

• For DR Cross Triggering • Signal from adjacent

UFLS/UVLS to trigger relay DR (from Contact Multiplication RL6)


45-55 OPTO 4 1 UV Block L4 UV Block To block UV Condition From RL8







APPENDIX 3B2: MARSHALLING OF BINARY OUTPUTS FOR DEMAND SHEDDING SCHEME (P40 AGILE P94VB)

Contact Binary Output Task No.


Description) Labels Application Notes

4-6 RELAY HEALHY 1 - - NOT USED

3-5 RELAY FAILED 1 Relay Watch Dog NC contact - Relay IRF

Contact Multiplication: • Annunciator • SCADA

30-32 RL1

1 Stg n f+t Trip (n = 1,2)

R1 DSS TX GR1 To Trip Transformer Group 1

Contact Multiplication: • TX Group 1 LV Trip

Coils • Annunciator

(LVBC/LVBT) • SCADA/TASE Tripping for: • Under voltage

Operated • Under frequency

Operated (Tripping Stage to be determine)

UF and UV stage depends on GSO assignment

2 U<1 Trip





34-36 RL2

1 Stg n f+t Trip (n = 3,4)

R2 DSS TX GR2 To Trip Transformer Group 2

Contact Multiplication: • TX Group 1 LV Trip

Coils • Annunciator

(LVBC/LVBT) • SCADA/TASE Tripping for: • Under voltage




2 U<1 Trip

38-40 RL3

1 Stg n f+t Trip (n = 5)

R3 DSS FEEDER 1 To Trip Feeder 1

Tripping for: • Under voltage




2 U<1 Trip





42-44 RL4







2 U<n Trip (n = 1)

29-31 RL5







2 U<1 Trip

33-35 RL6 1 Stg n f+t Trip

(n = 1,2,3,4,5,6,7,8) R5 DSS Operated Tripping Indication

Contact multiplication for: • Annunciator (HVBC) • SCADA (HV) • DSS OPERATED

CROSS TRIGGERING 2 U<1 Trip

37-39 RL7 1 UV Block R7 UV Block Alarm Indication CECOMS

41-43 RL8 1 UV Block R8 UV Block UV blocking Wired to Opto Input 4 to block UVDSS


APPENDIX 3B3: MARSHALLING OF LED INDICATORS FOR DEMAND SHEDDING SCHEME (P40 AGILE P94VB)

LED Indicator

Task No

Marshalling (Function No./Function Description) Labels Notes

LED 1 1 L1 On/Off Switch Demand Shedding Scheme OFF

LED 2 1 Stg n f+t Trip

(n = 1,2) DSS TX GR1 OPTD For TX Group 1 Tripping

2 U<1 Trip


(n = 3,4) DSS TX GR2 OPTD For TX Group 2 Tripping

2 U<1 Trip


(n = 5,6,7) DSS FEEDER OPTD For Feeders 1, 2 & 3 Tripping

2 U<1 Trip


APPENDIX 3C1: MARSHALLING OF BINARY INPUTS FOR MANUAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP)



Task No.


46-52 OPTO 1 1 CS1 Enable L1 Enable CS Input for Start SYNC (SYNC and Voltage Check)



45-55 OPTO 4 1 MCB Input L4 MCB Trip To block Voltage Check






APPENDIX 3C2: MARSHALLING OF BINARY OUTPUTS FOR MANUAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP)


Task No.




3-5 RELAY FAILED 1 Relay Watch Dog NC contact - Relay IRF Contact Multiplication: • Annunciator • SCADA

30-32 RL1

1 &2

Check Sync 1 OK

R1 MSYNC OK Manual Synchro Check OK

To closing circuit. Condition: • SYNC • DLLB • LLDB • DLDB

(not) VT MCB Trip

3 &4 &5 &6

Live Line

Dead Bus

(not) VT MCB Trip

L1 Enable CS

7 &8 &9 &10

Dead Line

Live Bus

(not) VT MCB Trip

L1 Enable CS

11 &12 &13 &14

Dead Line

Dead Bus

(not) VT MCB Trip

L1 Enable CS



Task No.



34-36 RL2

1 (NOT) Check Sync 1 OK R2 MSYNC FAIL Manual Synchro Check Fail

Contact Multiplication: • Annunciator • SCADA

2 (NOT) Voltage Condition OK

3 L1 Enable CS



29-31 RL5 1 CS VLine<

R5 SPARE For SOE Triggering: V Line Over/Under Voltage

Output contact should not to be wired 2 CS VLine>

33-35 RL6 1 CS VLine>VBus

R6 SPARE For SOE Triggering: Exceed Diff Voltage

Output contact should not to be wired 2 CS VLine<VBus

37-39 RL7 1 CS FLine>Fbus

R7 SPARE For SOE Triggering: Exceed Slip Frequency

Output contact should not to be wired 2 CS Fline<Fbus

41-43 RL8 1 CS1 Ang Not OK+

R8 SPARE For SOE Triggering: Exceed Slip Angle

Output contact should not to be wired 2 CS1 Ang Not OK-


APPENDIX 3C3: MARSHALLING OF LED INDICATORS FOR MANUAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP)

LED Indicator

Task No

Marshalling (Function No./Function Description) Labels Notes

LED 1 1 Check Sync OK MSYNC OK Manual SYNC OK

LED 2 1 Voltage Check ( LLDB, DLLB) VCHECK OK Voltage Check OK

LED 3 1 Voltage Check ( DLDB) VCHECK DLDB Voltage Check DLDB

LED 4 1 Check Sync Fail MSYNC FAIL Manual SYNC Fail


APPENDIX 3D1: MARSHALLING OF BINARY INPUTS FOR EXTERNAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP)



Task No.


46-52 OPTO 1 1 CS1 Enable L1 Enable CS

Input for Start SYNC (SYNC and Voltage Check) • From External AR:

AR In-progress • Or give permanent

positive at BI for old scheme



45-55 OPTO 4 1 MCB Input L4 MCB Trip To block Voltage Check






APPENDIX 3D2: MARSHALLING OF BINARY OUTPUTS FOR EXTERNAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP)


Task No.




3-5 RELAY FAILED 1 Relay Watch Dog NC contact - Relay IRF Contact Multiplication: • Annunciator • SCADA

30-32 RL1

1 Check Sync 1 OK

R1 SYNC OK

Synchro Check OK

• To AR Relay/Closing circuit

• Additional DLDB condition to be configured in PSL logic

2 & 3

Live Line

Dead Bus

4 & 5

Dead Line

Live Bus

6 & 7

Dead Line Additional DLDB condition to be configured in PSL logic Dead Bus

34-36 RL2 1 (NOT) Check Sync 1 OK

R2 SYNC Fail Synchro Check Fail Contact Multiplication: • Annunciator • SCADA 2 (NOT) Voltage Condition OK




Task No.




29-31 RL5 1 CS VLine<

R5 For SOE Triggering: V Line Over/Under Voltage Output contact not to be wired

2 CS VLine>

33-35 RL6 1 CS VLine>VBus

R6 For SOE Triggering: Exceed Diff Voltage Output contact cannot be wired

2 CS VLine<VBus

37-39 RL7 1 CS FLine>Fbus

R7 For SOE Triggering: Exceed Slip Frequency Output contact not to be wired

2 CS Fline<Fbus

41-43 RL8 1 CS1 Ang Not OK+

R8 For SOE Triggering: Exceed Slip Angle Output contact not to be wired

2 CS1 Ang Not OK-


APPENDIX 3D3: MARSHALLING OF LED INDICATORS FOR EXTERNAL SYNCHRONIZING CHECK PROTECTION (P40 AGILE P94VP)

LED Indicator Task No


Description) Labels Application

LED 1 1 Check Sync OK SYNC OK Synchro Check OK

LED 2 1 Voltage Check (LLDB, DLLB) VCHECK OK Voltage Check OK

LED 3 1 Voltage Check (DLDB) VCHECK DLDB Voltage Check DLDB

LED 4 1 Check Sync Fail VCHECK & SYNC Fail Synchro Check Fail


4.0 IED VT CONNECTIONS Overview This section will discuss GE Grid Solutions P40 Agile P94Vx voltage (VT)

connection for typical feeder. The discussion will result in the common or standard TNB AC connections for GE Grid Solutions P40 Agile P94Vx.

How to read this section

The VT input configurations of GE Grid Solutions P40 Agile P94Vx in this document is divided into two sections:

Section Matters A-31 VT Connection

VT Connection


5.0 STANDARD LOGIC AND TERMINAL FUNCTION DIAGRAM

Introduction This section will provide detailed on configuration logic and terminal function

diagram for GE Grid Solutions Agile P40 P94Vx for the following TNB applications

Logic No any additional logic need to be done or can be done by anyone without the

consultancy of Protection, Automation & Control, GSE, Grid Division, TNB and the written permission of Chief Engineer (Protection, Automation & Control), GSE, Grid Division, TNB.

TNB Applications Logic Reference Voltage Level


P94VB ver_3UV_xxxxxxxx 500kV and below

Under Voltage & Under Frequency (Load Shedding)

P94VB ver_81UF27UV_xxxxxxxx

Manual Synchronizing Check

P94VP ver_25MSYN_xxxxxxxx

Synchronizing Check P94VP ver_25SYN_xxxxxxxx

ver: Hardware and firmware version xxxxxxx: Latest configuration dates (YYYYMMDD)

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