Ultimate Device Scaling: Intrinsic Performance Comparisons of Carbon-

based, InGaAs, and Si Field-effect Transistors for 5 nm Gate Length

Mathieu Luisier1, Mark Lundstrom2, Dimitri Antoniadis3, and Jeffrey Bokor4

1ETH Zurich, 2Purdue University, 3MIT, and 4University of California at Berkeley

• Motivation

• Simulation Approach Models and Validation

• General Scaling Considerations Band-to-band Tunneling

Electrostatics and Contacts

Source-to-drain Tunneling

• Performance Comparisons

• Conclusion and Outlook

Outline

Motivation

Motivation: Future of Moore’s Law

65nm (2005)

45nm (2007)

32nm (2009)

22nm (2011)

5nm (2020)

??Source: Intel Corporation

1. 3-D Si FinFETs for ever?

2. What will be the dominant limiting factors when Lg<10nm?

Gate Length Reduction in planar Si MOSFETs:=> increase of short-channel effects (SCE)=> poor electrostatic control (single-gate)

Gate Length Reduction in planar Si MOSFETs:=> increase of short-channel effects (SCE)=> poor electrostatic control (single-gate)=> SOLUTION: 3-D FinFET since 2011

Leakage Sources in Ultrascaled Devices

IBT/S-to-D

BTBT1

BTBT2

HIBL

Band Diagram of Lg=5nm Nano-transistor

How can we minimize leakage?

Best device structure at Lg=5nm:The least sensitive to leakage

P. Hashemi et al., EDL 30, 401 (2009)

L. Tapasztó et al., Nat. Nano. 3, 397 (2008)

Y.Q. Wu et al., EDL 30, 700 (2009)

Nanowire Graphene III-V UTB CNT

NEEDED: Fast, cheap, and reliable platform to investigate the performance of next-generation ultrascaled nano-transistors beyond 3-D FinFETs

Supratik Guha, IBM Research

Simulation Approach

More Features

Simulation Capabilities

Efficient Parallel Computing

• 3D Quantum Transport Solver• Different Flavors of Atomistic

Tight-Binding Models• Multi-Physics Modeling: From

Ballistic to Dissipative (e-ph) Electron/Hole

Transport

• Industrial-Strength Nano-electronic Device Simulator

• Multi-Geometry Capabilities • Investigate Performance of

Ultra-Scaled Nano-Devices before Fabrication

• Schrödinger-Poisson Solver with NEGF and WF

• Finite Element Poisson• Accelerate Simulation Time

through Massive and Multi-Level Parallelization

8Donnerstag, 20. April 2023

State-of-the-art Nano-TCAD Tool

Physical Models

Si Bandstructure

TB: sp3d5s*

OMENBias

Momentum

Energy

Space

Model Verifications

Expt: J. del Alamo @ MIT Expt: A. Franklin @ IBM YH Expt: S. Rommel @ RIT S. Datta @ PSU

III-V HEMT CNT FET BTBT Diode

Zener Current

NDR Current

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General Scaling Considerations

Device Characteristics

CNT NW

SG-AGNR

DG-AGNR DG-UTB

Id-Vgs at Vds=0.5 V in Carbon Devices

AGNR width: 2.1 nm / CNT diameter: 1.49 nm / Band Gap Eg=0.56 eV

Observations:•same EOT gives very different electrostatic gate-channel coupling•as long as Eg>Vds, BTBT remains weak, but still intra-band tunneling

SiO2

EOT=0.64nm

HfO2

EOT=0.64nm

BTBT

HIBL/IBT

Intra-Band Tunneling: Electrostatics

Spectral current through GAA CNT FETs with d=1.49 nm, Eg=0.563 eV, different dielectrics, and EOT=0.64 nm

Fringing Fields:

•stronger when spacer with large εR

•effective channel length is longer•same effect as gate underlap doping

Intra-Band Tunneling: Material (1)

Fix electrostatic potential (Gaussian-like barrier)Investigate how semiconductor properties influence IBT

CNT d=1nmEg=0.817eV

Si NW d=3nmEg=1.404eV

Id=4.4nA

Id=91nA• Smaller band gap (and m*) gives higher intra-band tunneling current

• Need to understand why

OBSERVATIONS:•Current flows through the potential barrier, almost no thermionic component

Intra-Band Tunneling: Material (2)

What is needed: Under-the-Barrier (UB) modelSame principle as Top-of-the-Barrier (ToB), but with

Complex Bandstructure instead of Real Bandstructure

Transmission through potential barrier: T(E)=exp(-2*Κ(E)*L)

ToB

UB

Eg=1.408eVEg=1.404eVEg=1.378eVEg=0.817eV

Ohmic vs Schottky Contacts

Ohmic

Schottky

Id-Vgs transfer characteristics for Si NW and CNT FETs with

Ohmic and Schottky Contacts

Performance Comparisons

Id-Vgs at Vds=0.5 V in CNT, NW, and UTB

VDD=0.5 V

Features:

•CNT with d=0.6nm and Si/InGaAs NW with d=3nm have same band gap: Eg=1.4eV

•CNT with d=1nm has band gap: Eg=0.82eV

•EOT=0.64nm made of 3.3nm HfO2

•No AGNR since worse than CNT

•Intrinsic characteristics

• d=1nm GAA-CNT (high IBT) and DG-UTB (bad electrostatics) scale poorly• 3-D devices with same “large” band gap (Eg=1.4 eV) scale better (low IBT)• if CNT with d<1 nm and Eg>1 eV possible, then at least as good as NW • CHALLENGE: trade-off between high injection velocity (low m*) and low

SS (high m*) needed, new constraint at short gate lengths

Conclusion

Conclusion and Outlook

• Simulation Platform for Lg=5nm Ultra-scaled Devices

Full-band and atomistic

Same approximations for All

• Understand Limiting Factors Electrostatics and IBT

Trade-off between vinj and SS

• Outlook Include non-ideal effects

Try other crystal orientations

Investigate nano-contact physics