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WWW.TERADYNE.COM/INTEGRASLIDE 1The Cost of Test
Semiconductor Test
Consumer Business Unit
SETNET MEETING - The Cost of Test
Thursday 21 February 2002TUC Congress Centre, London
Chris BrownSales Engineer
Teradyne Inc.
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 2
The Cost of Test
Semiconductor Test
Consumer Business Unit
The Cost of Test – What is it?
Direct Costs.– Cost of the test system.– Cost of the prober or handler.– Cost of support hardware (docking, interface
boards, probecards).
Hidden Costs.– Floorspace usage.– Uptime/Downtime (Reliability).– Cost of application support.
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 3
The Cost of Test
Semiconductor Test
Consumer Business Unit
Requirements of Semiconductor Manufacturers from an ATE perspective
• Performance• Price• Time To Market• Reliability• Productivity• Quality
Reduce Test CostsReduce Test Costs
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 4
The Cost of Test
Semiconductor Test
Consumer Business Unit
Example:The ‘non-memory’ -Semiconductor Markets
PR
ICE
PE
R P
INP
RIC
E P
ER
PIN
PERFORMANCEPERFORMANCE
High Performance
CISC µProcessorCISC µProcessor
High Integration (SOC)
High Volume
RISC µProcessorRISC µProcessor
8-bit µController8-bit µController
16/32-bit µController16/32-bit µController
DSPsDSPs Embedded Embedded ControllersControllers
Gate ArraysGate Arrays PLDs/FPGAsPLDs/FPGAs
ModemsModems
GraphicsGraphics
Audio/VideoAudio/Video
ChipsetsChipsets
StorageStorage
Smart Cards
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 5
The Cost of Test
Semiconductor Test
Consumer Business Unit
Case 1: Microcontroller Market
Range of microcontroller performance and test requirements are constantly expandingTT
HHRROOUUGGHHPPUUTT
PERFORMANCEPERFORMANCE
RF
Flash
12 Bit A/D - D/A
8 Bit A/D - D/A
OTP
EEPROM
Smartcards
16/32 bit uC
8 bit uC
DRAM
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 6
The Cost of Test
Semiconductor Test
Consumer Business Unit
Case 1: Microcontroller Market
Dropping prices and increasing volumes are pressuring micro controller test organizations to find new solutions
Competing in the micro controller market requires: 50% reduction in test cost Double worldwide capacity
SSH H I I PPMMEENNT T SS
19951995 20002000
3 Billion Units3 Billion Units
7.3 Billion Units7.3 Billion Units
20002000
DDEEV V I I CCEE
AASSPP
19951995
$2.62$2.62
$3.41$3.41
Dataquest - 12/00Dataquest - 12/00
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 7
The Cost of Test
Semiconductor Test
Consumer Business Unit
Case 2: Smart Card Market
$0
$500
$1,000
$1,500
$2,000
$2,500
$3,000
1998 1999 2000 2001 2002 2003 2004
Total Value Worldwide US MarketMillions of USD
Source: Dataquest 7/2000 Device ASP << 1USD
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 8
The Cost of Test
Semiconductor Test
Consumer Business Unit
Case 2: Smart Card Market (cont.)
• Lowest device cost• Highest production
volume
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 9
The Cost of Test
Semiconductor Test
Consumer Business Unit
‘The Cost of Test’ Conclusion
Device S
elling
Price
Device S
elling
Price
Pro
du
ctio
n V
olu
me
Pro
du
ctio
n V
olu
me
Co
st of T
estC
ost o
f Test
Dropping device prices and increasing production volume causes a strong demand to constantly reduce the cost of test.
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 10
The Cost of Test
Semiconductor Test
Consumer Business Unit
Test Cost Reduction Measures from an ATE point of view
No. 1: Parallel test
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 11
The Cost of Test
Semiconductor Test
Consumer Business Unit
No. 1: Parallel test Efficiency (R = 1- (dt/dn) / Tsingle)T T H H R R O O U U G G H H P P U U TT
Sites Tested In ParallelSites Tested In Parallel
• Analog/ parametrics tested seriallyAnalog/ parametrics tested serially• Memory test driven by slowest deviceMemory test driven by slowest device• Programming tester one pin at a timeProgramming tester one pin at a time
TTHHRROOUUGGHHPPUUTT
Sites Tested In ParallelSites Tested In Parallel
• All parametrics / analog test in parallelAll parametrics / analog test in parallel• Memory test optimal test timesMemory test optimal test times• Programming tester with command per siteProgramming tester with command per site• Devices tested asynchronouslyDevices tested asynchronously
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 12
The Cost of Test
Semiconductor Test
Consumer Business Unit
No. 1: Parallel test – Parallel Test Efficiency
Relative Cost of Capital (tester) per Unit Tested
-
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
0 2 4 6 8
Number of Sites
Re
lati
ve
Co
st
pe
r U
nit
100.0%
96.0%
94.0%
90.0%
86.0%
84.0%
80.0%
Dual site parallel test already cuts test costs by 50%
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 13
The Cost of Test
Semiconductor Test
Consumer Business Unit
No. 1: Parallel test – Parallel Test EfficiencyRelative Cost of Capital (tester) per Unit Tested
-
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0 32 64 96 128
Number of Sites
Re
lati
ve
Co
st
pe
r U
nit
100.0%
99.6%
99.4%
99.0%
98.6%
98.4%
98.0%
Parallel test efficiency becomes relevant at higher site counts
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 14
The Cost of Test
Semiconductor Test
Consumer Business Unit
No. 1: Parallel test - Summary
• Increasing parallel test does mean increasing throughput per tester
• Parallel test has its limits based on how efficient a tester can test sites in parallel.
• Basic Principle: HW and SW of the ATE instrument needs to be designed from the ground up for parallel test
Per Pin Instruments Per Site Instruments Programming per site Asynchronous pattern control Production interface designed for parallel test
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 15
The Cost of Test
Semiconductor Test
Consumer Business Unit
Test Cost Reduction Measures from an ATE point of view
No. 2: Reduce cost of the test system
(Low capital cost tester)
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 16
The Cost of Test
Semiconductor Test
Consumer Business Unit
No. 2: Reduce cost of the test system
Zero Footprint Design
Take advantage of leading edge technology
High Reliability
Easy to use software
Low capital cost
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 17
The Cost of Test
Semiconductor Test
Consumer Business Unit
Test Cost Reduction Measures from an ATE point of view
No. 3: Reduce infrastructure costs
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 18
The Cost of Test
Semiconductor Test
Consumer Business Unit
Floorspace usage of Floorspace usage of typical Mainframe typical Mainframe Tester + ProberTester + Prober
4.57m
4.26m
TestheadHandplug
Mainframe TesterMainframe Tester(3ft x 9ft)(3ft x 9ft)
CPUCPUTestheadTestheadProbeProbe
ManipulatorManipulator
No. 3: Reduce infrastructure costs
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 19
The Cost of Test
Semiconductor Test
Consumer Business Unit
4.57m
4.26m
No. 3: Reduce infrastructure costs (cont.)
EG Prober
J750 Tester
CPU
EG Prober
J750 Tester
CPU
EG Prober
J750 Tester
CPU
EG Prober
J750 Tester
CPU
Reduce test costs Reduce test costs through optimized through optimized floorspace usagefloorspace usage
Zero Footprint Zero Footprint Tester + ProberTester + Prober
WWW.TERADYNE.COM/INTEGRAThe Cost of Test - Sept 2001SLIDE 20
The Cost of Test
Semiconductor Test
Consumer Business Unit
Conclusion
To continuously help semiconductor manufacturers to reduce ‘The Cost of Test’ is ‘The’ challenge for the ATE industry.
Several actions have been taken by the ATE industry to reduce test costs.– Improve parallel test efficiency.– Provide low capital cost test equipment.– Reduce infrastructure requirements for ATE test
equipment (floorspace, cooling, power consumption) through zero footprint designs.