INTRODUCTION
The important consideration in the present field of Electrical and Electronics related
technologies are Automation, Power Consumption and cost effectiveness. Automation is
intended to reduce manpower, with the help of intelligent systems and Power Saving is
the main consideration forever, as the source of the power is getting diminished due to
various reasons.
The main goal of the project is to implement an automatic speed braker which can work
under a given time constraint. These constraints are influenced by the needs of the
immediate locality. This allows the task efficiently and effectively without the
intervention of human by making it automated.
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PROJECT DESCRIPTION
The Automatic Speed Braker System makes it possible to adjust the time of speed
breaker on road. We use this innovative idea in front of every school, which is on main
road. When school is to start then clock connected to the speed breaker automatically
transfers the speed breaker on the road for a time being. After half an hour speed breaker
is automatically reversed to the flat position. Semi circle portion of the speed breaker is
turned automatically as per the time set.
Time set option is changeable. We can set the time of opening and closing of the speed
breaker as per our choice. Changeable time is to be stored in the external memory up to
next change. This memory is non-volatile and retains its data for a long time. Time is
automatically adjusted by the RTC IC with a small battery backup to save the clock
setting. Speed breaker is designed by a half flat and half semi circle shaped long metallic
pipe.
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BASIC BLOCK DIAGRAM
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HARDWARE USED:
1. MICROCONTROLLER
2. LCD DISPLAY CIRCUIT
3. MEMORY INTERFACE
4. CURRENT SENSOR/TRANSFORMER
5. RELAY CIRCUIT
6. REAL TIME CLOCK
7. DC MOTOR
SOFTWARE USED:
1. ASSEMBLY LANGUAGE/ EMBEDDED C
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BASIC COMPONENTS AND THEIR FUNCTIONS
1. MICROCONTROLLER(AT89S52)
Architecture of 8051 family:-
The figure – 1 above shows the basic architecture of 8051 family of microcontroller.
Features
• Compatible with MCS-51™ Products
• 4K Bytes of In-System Reprogrammable Flash Memory
• Endurance: 1,000 Write/Erase Cycles
• Fully Static Operation: 0 Hz to 24 MHz
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• Three-Level Program Memory Lock
• 128 x 8-Bit Internal RAM
• 32 Programmable I/O Lines
• Two 16-Bit Timer/Counters
• Six Interrupt Sources
• Programmable Serial Channel
• Low Power Idle and Power Down Modes
DESCRIPTION
The AT89S52 is a low-power, high-performance CMOS 8-bit microcomputer with 4K
bytes of Flash Programmable and Erasable Read Only Memory (PEROM). The device is
manufactured using Atmel’s high density nonvolatile memory technology and is
compatible with the industry standard MCS-51™ instruction set and pinout. The on-chip
Flash allows the program memory to be reprogrammed in-system or by a conventional
nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a
monolithic chip, the Atmel AT89S52 is a powerful microcomputer which provides a
highly flexible and cost effective solution to many embedded control applications. The
AT89S52 provides the following standard features: 4K bytes of Flash, 128 bytes of
RAM, 32 I/O lines, two 16-bit timer/counters, five vector two-level interrupt architecture,
a full duplex serial port, and on-chip oscillator and clock circuitry.
In addition, the AT89S52 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes. The Idle Mode
stops the CPU while allowing the RAM, timer/counters, serial port and interrupt system
to continue functioning. The Power down Mode saves the RAM contents but freezes the
oscillator disabling all other chip functions until the next hardware reset.
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PIN DESCRIPTION
VCC Supply voltage.
GND Ground.
Port 0
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port each pin can sink
eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high
impedance inputs. Port 0 may also be configured to be the multiplexed low order
address/data bus during accesses to external program and data memory. In this mode P0
has internal pull-ups. Port 0 also receives the code bytes during Flash programming, and
outputs the code bytes during program verification.
External pull-ups are required during program verification.
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Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers
can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high
by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are
externally being pulled low will source current (IIL) because of the internal pull-ups. Port
1 also receives the low-order address bytes during Flash programming and verification.
Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers
can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high
by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are
externally being pulled low will source current (IIL) because of the internal pull-ups. Port
2 emits the high-order address byte during fetches from external program memory and
during accesses to external data memory that uses 16-bit addresses (MOVX @ DPTR). In
this application it uses strong internal pull-ups when emitting 1s. During accesses to
external data memory that uses 8-bit addresses (MOVX @ RI); Port 2 emits the contents
of the P2 Special Function Register. Port 2 also receives the high-order address bits and
some control signals during Flash programming and verification.
Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers
can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high
by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are
externally being pulled low will source current (IIL) because of the pull-ups. Port 3 also
serves the functions of various special features of the AT89C51 as listed below:
Port 3 also receives some control signals for Flash programming and verification.
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RST
Reset input. A high on this pin for two machine cycles while the oscillator is running
resets the device.
ALE/PROG
Address Latch Enable output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during
Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the
oscillator frequency, and may be used for external timing or clocking purposes. Note,
however, that one ALE pulse is skipped during each access to external Data Memory. If
desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit
set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in
external execution mode.
PSEN
Program Store Enable is the read strobe to external program memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to
fetch code from external program memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset.
EA should be strapped to VCC for internal program executions. This pin also receives the
12-volt programming enable voltage (VPP) during Flash programming, for parts that
require 12-volt VPP.
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XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier
which can be configured for use as an on-chip oscillator, as shown in Figure 1. Either a
quartz crystal or ceramic resonator may be used. To drive the device from an external
clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in
Figure 2.There are no requirements on the duty cycle of the external clock signal, since
the input to the internal clocking circuitry is through a divide-by-two flip-flop, but
minimum and maximum voltage high and low time specifications must be observed.
.
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2) LCD DISPLAY CIRCUIT
We have used 16x2 LCD display for displaying the value of measured distance. The
detail of the LCD is given in separate document.
LCD SECTION DETAILS
Frequently, an 8051 program must interact with the outside world using input and output
devices that communicate directly with a human being. One of the most common devices
attached to an 8051 is an LCD display. Some of the most common LCDs connected to
the 8051 are 16x2 and 20x2 displays. This means 16 characters per line by 2 lines and 20
characters per line by 2 lines, respectively.
Fortunately, a very popular standard exists which allows us to communicate with the vast
majority of LCDs regardless of their manufacturer. The standard is referred to as
HD44780U, which refers to the controller chip which receives data from an external
source (in this case, the 8051) and communicates directly with the LCD.
If an 8-bit data bus is used, the LCD will require a total of 11 data lines (3 control lines
plus the 8 lines for the data bus).
The three control lines are referred to as EN, RS, and RW.
The EN line is called "Enable." This control line is used to tell the LCD that you are
sending it data. To send data to the LCD, your program should first set this line high (1)
and then set the other two control lines and/or put data on the data bus. When the other
lines are completely ready, bring EN low (0) again. The 1-0 transition tells the 44780 to
take the data currently found on the other control lines and on the data bus and to treat it
as a command.
The RS line is the "Register Select" line. When RS is low (0), the data is to be treated as
a command or special instruction (such as clear screen, position cursor, etc.). When RS is
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high (1), the data being sent is text data which should be displayed on the screen. For
example, to display the letter "T" on the screen you would set RS high.
The RW line is the "Read/Write" control line. When RW is low (0), the information on
the data bus is being written to the LCD. When RW is high (1), the program is effectively
querying (or reading) the LCD. Only one instruction ("Get LCD status") is a read
command. All others are write commands--so RW will almost always be low.
Finally, the data bus consists of 4 or 8 lines (depending on the mode of operation selected
by the user). In the case of an 8-bit data bus, the lines are referred to as DB0, DB1, DB2,
DB3, DB4, DB5, DB6, and DB7.
INITIALIZING THE LCD
Before you may really use the LCD, you must initialize and configure it. This is
accomplished by sending a number of initialization instructions to the LCD.
The first instruction we send must tell the LCD whether we'll be communicating with it
with an 8-bit or 4-bit data bus. We also select a 5x8 dot character font. These two options
are selected by sending the command 38h to the LCD as a command. As you will recall
from the last section, we mentioned that the RS line must be low if we are sending a
command to the LCD. Thus, to send this 38h command to the LCD we must execute the
following 8051 instructions:
SETB EN
CLR RS
MOV DATA,#38h
CLR EN
LCALL WAIT_LCD
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CLEARING THE DISPLAY
When the LCD is first initialized, the screen should automatically be cleared by the
44780 controller. However, it's always a good idea to do things yourself so that you can
be completely sure that the display is the way you want it. Thus, it's not a bad idea to
clear the screen as the very first opreation after the LCD has been initialiezd.
An LCD command exists to accomplish this function. Not suprisingly, it is the command
01h. Since clearing the screen is a function we very likely will wish to call more than
once, it's a good idea to make it a subroutine:
CLEAR_LCD:
SETB EN
CLR RS
MOV DATA,#01h
CLR EN
LCALL WAIT_LCD
RET
WRITING TEXT TO THE LCD
Now we get to the real meat of what we're trying to do: All this effort is really so we can
display text on the LCD. Really, we're pretty much done.
Once again, writing text to the LCD is something we'll almost certainly want to do over
and over--so let's make it a subroutine.
WRITE_TEXT:
SETB EN
SETB RS
MOV DATA,A
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CLR EN
LCALL WAIT_LCD
RET
PINWISE DETAIL OF LCD
1. Vss GROUND
2. Vcc +5VOLT SUPPLY
3 Vee POWER SUPPLY TO CONTROL CONTRAST
4. RS RS = 0 TO SELECT COMMAND REGISTER
RS = 1 TO SELECT DATA REGISTER
5. R/W R/W = 0 FOR WRITE
R/W = 1 FOR READ
6 E ENABLE
7 DB0
8 DB1
9. DB2
10. DB3
11. DB4
12 DB5
13 DB6
14 DB7
15 16 FOR BACK LIGHT DISPLAY
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3) REAL TIME CLOCK
Introduction
In this project we show that how we control the distribution control system with real time
application. In this project we provide a smart solution for perfect distribution system. .
In this project we program the 4 different output for different time with real time clock.
Assume that we want to distribute the line 1 to from 6 of clock to 9 0 clock in Monday,
and from 6 o clock to 8 o clock on Tuesday. The we save this data in the memory. This
data is to be store in the memory for long time unless we change the data. In future it is
possible to program the 4 different output for particular day and particular time.
In this project we design a digital calendar with the help of the RTC. In this digital
calendar data is to be store in the RTC for a long l time with CMOS battery back up
circuit.
In this project we use one 89s51 controller to control all the function and relate with the
memory and RTC automatically and program the 4 different output .
First of all when supply is on then circuit is on and takes few second to intialize and
RTC and take a data from the RTC automatically.
Now on the LCD show the RTC CLOCK in first line and 4 CHANNEL TIMER in the
second line, after few second RTC provide a pulse to the controller and controller the day
on the first line with data with month and year.
TUE 11/03/2008
In the second line
CLOCK 13:35:01
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Time is display in the 24 hour system .this time is display , if you want to change the any
detail then with the Menu button and up –down key we change the detail of the digital
clock automatically.
With the help of the up-down key it is possible to change the detail of the clock. We
change the day , second time or whatever we want
Now with the help of CH switch we go the menu of on off time for four different
channel. Whatever want to enter a time then with the help of the up-down key we change
the time and save this data in the memory automatically. This memory is a non- voltaic
memory and save the data for a long time without battery.
Four output is connected to the load through relay driver circuit. In this relay driver
circuit we use four relay with 5 ampere socket. To control a relay we connect two
transistor circuit with NPN and pnp transistor. To control the relay.
General description
The PCF8563 is a CMOS real time clock/calendar optimized for low power consumption.
A programmable clock output, interrupt output and voltage-low detector are also
provided. All address and data are transferred serially via a two-line bidirectional I2C-
bus. Maximum bus speed is 400 kbit/s. The built-in word address register is incremented
automatically after each written or read data byte.
Features
1) Provides year, month, day, weekday, hours, minutes and seconds based on
32.768 kHz quartz crystal
2) Century flag
3) Clock operating voltage: 1.8 V to 5.5 V
4) Low backup current; typical 0.25 μA at VDD =and Tamb = 25 °C
5) 400 kHz two-wire I2C-bus interface (at VDD =
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6) Programmable clock output for peripheral devices (32.768 kHz, 1 024 Hz,
32 Hz and 1 Hz)
7) Alarm and timer functions
8) Integrated oscillator capacitor
9) Internal power-on reset
10) I2C-bus slave address: read A3h and write A2h
11) Open-drain interrupt pin
12) Electrostatic Discharge (ESD) protection exceeds 2 000 V Human Body Model
(HBM) per JESD22-A114, 200 V Machine Model (MM) per JESD22-A115 and 2
000 V Charged Device Model (CDM) per JESD22-C101
13) Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA
Applications
1) Mobile telephones
2) Portable instruments
3) Electronic metering
4) Battery powered products
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OSCI 1 1 oscillator input
OSCO 2 2 oscillator output
n.c - 3 not connected
INT 3 4 interrupt output (open-drain; active LOW)
VSS 4 5 ground
SDA 5 6 serial data input and output
SCL 6 7 serial clock input
CLKOUT 7 8 clock output, open-drain
VDD 8 9 positive supply voltage
n.c - 10 not connected
Pin no 25 and 24 is connected to the non voltaic memory. Pin no 8 is connected to the positive
supply. Pin no 7 is connected to the ground.
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Here in this project we connect pin no 5 and 6 is to the controller directly. Pin no 1to 4 is
connected to the ground. Here we ground all the address of the ic. Pin no 8 is also connected to
the positive 5 volt supply. Pin no 7 is wp pin. Here pin no 7 is also grounded.
SERIAL CLOCK (SCL):
The SCL input is used to positive edge clock data into each
EEPROM device and negative edge clock data out of each device.
When we want to enter a data in the memory then we provide a low to high pulse and when we
get a data from the memory then we provide a high to low signal.
SERIAL DATA (SDA):
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be
wire-ORed with any number of other open-drain or open collector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0):
The A2, A1 and A0 pins are device address inputs that are hard wired for the AT24C01A and the
AT24C02. As many as eight 1K/2K devices may be addressed on a single bus system (device
addressing is discussed in detail under the Device Addressing section). The AT24C04 uses the
A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a
single bus system. The A0 pin is a no connect. The AT24C08 only uses the A2 input for
hardwire addressing and a total of two 8K devices may be addressed on a single bus system. The
A0 and A1 pins are no connects.
WRITE PROTECT (WP): The AT24C01A/02/04/16 has a Write Protect pin that provides
hardware data protection. The Write Protect pin allows normal read/write operations when
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connected to ground (GND). When the Write Protect pin is connected to VCC, the write
protection feature is enabled and operates as shown in the following table.
Operation CLOCK and DATA TRANSITIONS:
The SDA pin is normally pulled high with an external device. Data on the SDA pin may change
only during SCL low time periods (refer to Data Validity timing diagram). Data changes during
SCL high periods will indicate a start or stop condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition
which must precede any other command (refer to Start and Stop Definition timing diagram).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After
a read sequence, the stop command will place the EEPROM in a standby power mode (refer to
Start and Stop Definition timing diagram).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the
EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each
word. This happens during the ninth clock cycle.
STANDBY MODE: The AT24C01A/02/04/08/16 features a low-power standby mode which is
enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the completion of any
internal operations.
AT24C01A/02/04/08/16
Device Addressing The 1K, 2K, 4K, 8K and 16K EEPROM devices all require an 8-bit device
address word following a start condition to enable the chip for a read or write operation (refer to
Figure1 ) The device address word consists of a mandatory one, zero sequence for the first four
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most significant bits as shown. This is common to all the EEPROM devices. The next 3 bits are
the A2, A1 and A0 device address bits for the 1K/2K EEPROM. These 3 bits must compare to
their corresponding hard-wired input pins. The 4K EEPROM only uses the A2 and A1 device
address bits with the third bit being a memory page address bit. The two device address bits must
compare to their corresponding hard-wired input pins. The A0 pin is no connect. The 8K
EEPROM only uses the A2 device address bit with the next 2 bits being for memory page
addressing. The A2 bit must compare to its corresponding hard-wired input pin. The A1 and A0
pins are no connect. The 16K does not use any device address bits but instead the 3 bits are used
for memory page addressing. These page addressing bits on the 4K, 8K and 16K devices should
be considered the most significant bits of the data word address which follows.
The A0, A1 and A2 pins are not connect.
The eighth bit of the device address is the read/write operation select bit. A read operation is
initiated if this bit is high and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a zero. If a compare is not
made, the chip will return to a standby state
.
Write Operations BYTE WRITE: A write operation requires an 8-bit data word address
following the device address word and acknowledgment. Upon receipt of this address, the
EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following
receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such as
a microcontroller, must terminate the write sequence with a stop condition.
At this time the EEPROM enters an internally timed write cycle, WR, to the non volatile
memory. All inputs are disabled during this write cycle and the EEPROM will not respond until
the write is complete (refer to Figure 2).
PAGE WRITE: The 1K/2K EEPROM is capable of an 8-byte page write, and the 4K, 8K and
16K devices are capable of 16-byte page writes.
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A page write is initiated the same as a byte write, but the microcontroller does not send a stop
condition after the first data word is clocked in. Instead, after the EEPROM acknowledges
receipt of the first data word, the microcontroller can transmit up to seven (1K/2K) or fifteen
(4K, 8K, 16K) more data words. The EEPROM will respond with a zero after each data word
received. The microcontroller must terminate the page write sequence with a stop condition.
The data word address lower three (1K/2K) or four (4K, 8K, 16K) bits are internally incremented
following the receipt of each data word. The higher data word address bits are not incremented,
retaining the memory page row location. When the word address, internally generated, reaches
the page boundary, the following byte is placed at the beginning of the same page. If more than
eight (1K/2K) or sixteen (4K, 8K, 16K) data words are transmitted to the EEPROM, the data
word address will “roll over” and previous data will be overwritten.
ACKNOWLEDGE POLLING: Once the internally timed write cycle has started and the
EEPROM inputs are disabled, acknowledge polling can be initiated. This involves send-
AT24C01A/02/04/08/16
3256D–SEEPR–11/03
The read/write bit is representative of the operation desired. Only if the internal write cycle has
completed will the EEPROM respond with a zero allowing the read or write sequence to
continue.
Read Operations Read operations are initiated the same way as write operations with the
exception that the read/write select bit in the device address word is set to one. There are three
read operations: current address read, random address read and sequential read.
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CURRENT ADDRESS READ: The internal data word address counter maintains the last
address accessed during the last read or write operation, incremented by one. This address stays
valid between operations as long as the chip power is maintained. The address “roll over” during
read is from the last byte of the last memory page to the first byte of the first page. The address
“roll over” during write is from the last byte of the current page to the first byte of the same
page. Once the device address with the read/write select bit set to one is clocked in and
acknowledged by the EEPROM, the current address data word is serially clocked out. The
microcontroller does not respond with an input zero but does generate a following stop
condition.
RANDOM READ: A random read requires a “dummy” byte write sequence to load in the data
word address. Once the device address word and data word address are clocked in and
acknowledged by the EEPROM, the microcontroller must generate another start condition. The
microcontroller now initiates a current address read by sending a device address with the
read/write select bit high. The EEPROM acknowledges the device address and serially clocks out
the data word. The microcontroller does not respond with a zero but does generate a following
stop condition (refer to Figure 5).
SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a
random address read. After the microcontroller receives a data word, it responds with an
acknowledgement. As long as the EEPROM receives an acknowledgement, it will continue to
increment the data word address and serially clock out sequential data words. When the memory
address limit is reached, the data word address will “roll over” and the sequential read will
continue. The sequential read operation is terminated when the microcontroller does not respond
with a zero but does generate a following stop condition (refer to Figure 6).
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10 AT24C01A/02/04/08/16
(* = DON’T CARE bit for 1K)
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4) RELAYS
In order to enable a circuit to be isolated from the system only under faulty conditions, protective
relays are used. In normal cases, it is open circuit relay. The relay is usually provided with 4
terminals, two of which are connected to relay winding and other two are connected to the circuit
to be controlled. It has following characteristics :
Sensitivity
Speed
Selectivity
TYPES OF RELAYS :
Electromagnetic Attraction Type : These relays are actuated by DC or AC quantities.
Electromagnetic Induction Type : It’s operation depends upon EMI phenomena.
Thermal Relays : It’s operation depends upon the heating effect of electric Current.
Distance Relays : It’s operation depends upon the ratio of voltage to current.
ELECTROMAGNETIC RELAY :
These relays are electromagnetically operated. The parts of these relays are an iron core & its
surrounding coil of wire. An iron yoke provides a low reluctance path for magnetic flux, the
yoke being shaped so that the magnetic circuit can be closed by a movable piece of iron called
the armature, and a set of contacts. The armature is hinged to the yoke and is held by a string in
such a way that there is an air gap in the magnetic circuit. Figure shows the principle of
operation of this relay. When an electric current flows in the coil, the armature is attracted to the
iron core. Electrical switching contacts are mounted on the armature. When the armature coil is
energized, these movable contacts break their connections with one set of fixed contacts and
close a connection to a previously open contact. When electric power is removed from the relay
coil, spring returns the armature to its original position.
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Standard voltages for D.C. relay are 6,12,24,48 & 110 volts and for A.C. relays are
6,12,24,48,120 & 240 volts.
Fig. Basic Diagram Showing the Operating Principle of a Relay
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5) MEMORY INTERFACE
AT24C02 is an electrically erasable and programmable ROM. It has a 2Kbits of memory size
arranged in 32 pages of 8 byte each. There are 256 (32 x 8) words each of one byte. The data is
transferred and received serially through serial data (SDA) pin.
The SCL is clock input and is used to synchronize EEPROM with microcontroller for various
operations. When data is to be read or write, first a start condition is created followed by device
address, byte address and the data itself. Finally a stop condition is provided. The start condition
occurs when SDA and SCL get high to low simultaneously. The stop condition is when SDA
remains low while SCL goes from high to low. The data is read or written between the start and
stop conditions on every transition of SCL from high to low. For more details on different
operations and addressing, refer interfacing 24C02 with 8051.
A total of eight EEPROMs can be connected through a bus. There are three address pins in
AT24C02 for selecting a particular chip. The device can be addressed serially by the software. It
makes use of an internal register of the EEPROM whose 4 MSB bits are 1010, the next three are
the EEPROM address bits and the LSB signifies whether data is to be read or written. This last
bit is 1 for write and 0 for read operation.
For example, if in an EEPROM all address bits are grounded, then for write operation a hex
value 0xA1 (1010 0001) will be sent. Here 000, in last bits, addresses the EEPROM and 1 in
LSB indicates a write operation. Similarly for read operation the device address to be sent is
0xA0 (1010 0000).
Next, the byte or page address is sent followed by the data byte. This data byte is to be written on
or read by the microcontroller.
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PIN DIAGRAM :
Pin No Function Name
1 Address input pins; Provide addresses when more than one EEPROM is interfaced to a single microcontroller;
Ground when only one EEPROM is used
AD0
2 AD1
3 AD2
4 Ground (0V) Ground
5 Bi-directional pin for serial data transfer Serial Data
6 Provides clock signals Serial Clock
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7 Ground allows normal read/write functions;
Vcc enables write protection
Write protect
8 Supply voltage; 5V (up to 5.5V) Vcc
EEPROM stands for electrically erasable programmable read only memory. It is a secondary
storage device that once written (programmed) can hold data even when the power is removed.
The EEPROM is a class of read only memory that can be electrically erased and reprogrammed.
AT24C02 is a two wire 2Kbits serial EEPROM by Atmel. The memory is organized in 256
words of single byte each arranged in 32 pages of 8 bytes each. The addressing of memory
locations requires eight bit addresses.
AT24C02 is two-wire serially programmable i.e., for programming, the data and control signals
are provided serially along with clock signals from the other wire. The read-write operations are
accomplished by sending a set of control signals including the address and/or data bits. The
control signals must be accompanied with proper clock signals.
The AT24C02 has hard wire addressing of 3 bit length. This facilitates interfacing of a
maximum of eight (23) 24C02 devices to a system thereby, incorporating a maximum 16Kbits
memory. Multiple 24C02 devices can be connected to a microcontroller/microprocessor based
system using I2C interface.
The project demonstrates interfacing of a single 24C02 IC with AT89C51 (8051)
microcontroller. The microcontroller is programmed to perform write operation of a single byte
and read the same. The byte written and read is displayed on a LCD display.
Of the two wire serial EEPROMs from ATMEL, 24C02 is one of them and comes in different
packages. No matter what the package type, following are the pins of 24C02 IC.
32
PIN DETAIL :
A0-A2: Pins 1-3 are the address pins. Since multiple 24C02 and other similar devices can be
connected to a system, they require addressing. These devices are hard wire addressed i.e. the
address pins are permanently grounded and/or connected to Vcc. It is notable that in other two-
wire serial EEPROMs from Atmel, all the address pins may not be used.
In this circuit all address pins are grounded, so the device will have an address 000.
WP: Pin7 is the Write Protect pin. When it is kept low (ground), normal read and write
operations are allowed. When it is given a high, 24C02 is protected from any write operation.
In the circuit WP pin has been grounded to allow write operation.
Vcc: A 5V DC supply is required to power the AT24C02. This is same as the power supply of
the microcontroller. So a separate supply to power 24C02 is not required.
GND: Pin4 is Ground pin (0V)
SDA: Pin5 is serial data pin. The data and control bits are read and write serially from this
bidirectional pin.
SCL: Pin6 is serial clock pin. A clock signal is required every time a bit is transferred to or from
the SDA pin. A positive edge clock, i.e., a low to high, transfers data to the EEPROM and a
negative edge trigger, i.e., a high to low, carries data from the EEPROM.
In the circuit SDA and SCL are connected to bits 0 and 1 of port P1, respectively.
The data pins of the LCD are connected to port 2 of the microcontroller. The RS, RW and enable
pins of the LCD are interfaced to bit 0, 1 and 6 of port P3, respectively.
As many 24C02 devices can be used in a system using a two wire serial (I2C) interface. The
controller needs to send a device address to select a particular 24C02 device. Also whether a read
or write operation is to be done must be specified. This is done by device addressing.
Since 24C02 devices understand 8 bit words the device addresses are also single byte long. The
first four MSBs are a fixed sequence of high and low (1010). The next three bits are the device
33
address bits which must match with the hard wire address of the 24C02 device. The LSB
specifies whether a write or read operation is to be done. If this bit is high (1), a read operation is
initiated; and if it is low (0), write is initiated.
Any read or write operation in 24C02 requires a sequence of interaction with the controller. This
involves the following steps:
1. To set Start condition to initiate any Read or Write operation.
2. To transfer a bit to/from EEPROM.
3. A superset of these is used to transfer a word to/ from EEPROM.
4. To monitor acknowledgements for the receipt or transfer of each word.
5. A superset of signals for transferring words perform Read or Write operations.
6. Setting the Stop condition to terminate the operation.
These steps are explained in more detail in following sections.
34
Start condition:
Any read or write operation in EEPROM is initiated by Start condition. This occurs when there
is a high to low transition of SDA while SCL is high. (Refer the following diagram) This tells the
EEPROM that words from the controller are ready for it. SCL is set low at the end of start
condition. This is because any read or write operation first involves transfer of some words to
EEPROM. That requires a low to high transition of clock corresponding to each bit of the word.
Transfer a bit of a word to/from EEPROM:
First of all, it must be noted that transferring a bit to/from EEPROM is not the same as write/read
operation and so they should not be confused with each other. A read or write operation is the
whole process that takes place only after a start condition and before stop condition. Transfer of
bits to/from an EEPROM is a part of transferring 8 bit word(s) in between the start and stop
conditions because every byte is transferred serially bit by bit. SDA is normally pulled high by
the device it is interfaced with. When SCL is high the signal changes (H-L or L-H) at SDA are
35
considered as start or stop condition. A low to high transition at SCL transfers a bit to the
EEPROM, i.e., at a low to high transition of SCL, SDA pin of EEPROM behaves as input for
bits of word(s). If the data changes when the SCL is high, it will be misinterpreted as start or stop
condition. At high to low transition of SCL a bit is transferred from the EEPROM i.e.
the SDA pin behaves as output for bits of word(s) or acknowledgement at high to low transition
of the SCL. When SCL is low again the data change is valid, i.e., when bits of a word are to be
read or write, they are differentiated by the low of the SCL.
Transfer of a word to/from EEPROM :
By sending or receiving eight bits, a complete word is sent to or received by the EEPROM.
When sending a word, the acknowledgement from the EEPROM must be checked. There should
a clock (high to low transition from an initial low) between two words.
Monitoring acknowledgement bit:
When a word is sent to the EEPROM, it sends back a zero (0) to tell the controller that the word
has been received successfully by it. The controller reads this acknowledgement bit by sending a
high to low transition at SCL. Acknowledgement bit must be checked every time a word is sent
to the EEPROM.
Read/ Write operations:
A sequential transfer of words from/to the EEPROM constitutes the read/write. Thus any read or
write operation supported by the EEPROM can be accomplished by sending and/or receiving a
36
sequence of words to/from the EEPROM. There is a fixed set of words which need to be sent to
and/or received by the EEPROM corresponding to each read and write operation.
Stop condition:
A stop condition is provided to terminate a read or write operation. A low to high transition of
SDA when SCL is high sets the stop condition.
37
Memory Addressing in 24C02:
In 24C02, the 8 bit words are arranged in 32 pages of 8 bytes each. The word/page address
should be sent to the EEPROM to identify the location of memory to be read or written. The
word location is specified by three bits since the total number of available words/bytes is 8 (23).
Similarly, the page location is given by five bits since the total number of available pages is 32
(25). The lower three bits (D0-D2) of the word address identify the word location in a page,while
the higher five bytes (D3-D7) identify the page location.
Clocking:
When a sequence of words is transferred to EEPROM, a clock is needed to be sent by the
controller after transmission of each word. This is required so that the controller can receive its
acknowledgement. Clock is just a high transition followed by a low transition of SCL when the
initial clock signal is low.
38
Byte Write Operation:
The Byte Write operation programs a single byte of the EEPROM memory. It involves following
sequences of instructions to be sent to the EEPROM by the microcontroller:
1. Set start condition
2. Send device address byte (specify write operation)
3. Clock
4. Send word address
5. Clock
6. Send data byte
7. Clock
8. Set stop condition
9. Clock
39
Random read Operation:
The random read operation reads the data from a word address clocked in by the microcontroller.
Any random location can be read by this operation. This involves the following sequence of
instructions to be sent to/from the EEPROM by/to the controller.
1. Set start condition
2. Send device address byte (specify write operation)
3. Clock
4. Send word address
5. Clock
6. Set start condition
7. Send device address byte (specify read operation)
8. Clock
40
9. Read data byte
10. Clock
11. Stop condition
6) CURRENT SENSOR / TRANSFORMER
41
Current transformers can perform circuit control, measure current for power measurement and
control, and perform roles for safety protection and current limiting. They can also cause circuit
events to occur when the monitored current reaches a specified level. Current monitoring is
necessary at frequencies from the 50 Hz/60 Hz power line to the higher frequencies of switch
mode transformers that range into the hundreds of kilohertz.
The object with current transformers is to think in terms of current transformation rather than
voltage ratios. Current ratios are the inverse of voltage ratios. The thing to remember about
transformers is that Pout = (Pin — transformer power losses). With this in mind, let's assume we
had an ideal loss-less transformer in which Pout = Pin. Since power is voltage times current, this
product must be the same on the output as it is on the input. This implies that a 1:10 step-up
transformer with the voltage stepped up by a factor of 10 results in an output current reduced by
a factor of 10. This is what happens on a current transformer. If a transformer had a one-turn
primary and a ten-turn secondary, each amp in the primary results in 0.1A in the secondary, or a
10:1 current ratio. It's exactly the inverse of the voltage ratio — preserving volt times current
product.
Fig. 1 shows an ideal transformation ratio. In this analysis, the secondary dc resistance (RDCR)
doesn't become part of the calculation. When considering the secondary current, only the actual
current affects V. How well that current can be determined controls the accuracy of the
prediction of V. The secondary dc resistance is best analyzed by reflecting it to the primary by
RDCR/N2.
A burden resistor connected across the secondary produces an output voltage proportional to the
resistor value, based on the amount of current flowing through it. With our 1:10 turns ratio
42
transformer that produces a 10:1 current ratio, a burden resistor can be selected to produce the
voltage we want. If 1A on the primary produces 0.1A on the secondary, then by Ohm's law, 0.1
times the burden resistor will result in an output voltage per amp.
When choosing the burden resistor, the engineer can create any output voltage per amp, as long
as it doesn't saturate the core. Core saturation level is an important consideration when
specifying current transformers. The maximum volt-microsecond product specifies what the core
can handle without saturating. The burden resistor is one of the factors controlling the output
voltage. There's a limit to the amount of voltage that can be achieved at a given frequency. Since
frequency = 1/cycle period, if the frequency is too low (cycle period too long) so that voltage-
time product exceeds the core's flux capacity, saturation will occur. The flux that exists in a core
is proportional to the voltage times cycle period. Most specifications provide a maximum volt-
microsecond product that the current transformer can provide across the burden resistor.
Exceeding this voltage with too large a burden resistor will saturate the transformer and limit the
voltage.
What happens if the burden resistor is left off or opens during operation? The output voltage will
rise trying to develop current until it reaches the saturation voltage of the coil at that frequency.
At that point, the voltage will cease to rise and the transformer will add no additional impedance
to the driving current. Therefore, without a burden resistor, the output voltage of a current
transformer will be its saturation voltage at the operating frequency.
There are factors in the current transformer that affect efficiency. For complete accuracy, the
output current must be the input current divided by the turns ratio. Unfortunately, not all the
current is transferred. Some of the current isn't transformed to the secondary, but is instead
shunted by the inductance of the transformer and the core loss resistance. Generally, it's the
inductance of the transformer that contributes the majority of the current shunting that detracts
from the output current. This is why it's important to use a high-permeability core to achieve the
maximum inductance and minimize the inductance current. Accurate turns ratio must be
maintained to produce the expected secondary current and the expected accuracy. Fig. 2 shows
the current transformed is smaller than the input current by:
43
ITRANSFORMED=IINPUT-ICORE-jIMAG (1)
The burden resistor on the secondary is reflected to the primary by (1/N2), which provides a
resistance in series with the current on the primary. This usually has minimal effect and is
usually only important when you are concerned about the current that would exist when the
transformer isn't in the circuit, such as when it's used as a temporary measuring device.
Notice the four loss components in the circuit of Fig. 2. The resistance of the primary loop
(PRIDCR), the core loss resistance (RCORE), the secondary DCR (RDCR) is reduced by 1/N2, and the
secondary burden resistor RBURDEN is also reduced by a factor of N2. These are losses that affect
current source (I). The resistances have an indirect effect on the current transformer accuracy. It's
their effect on the circuit that they are monitoring that alters its current. The primary dc
resistance (PRIdcr) and the secondary DCR/N2 (RDCR/N2) don't detract from the Iinput that is read or
is affecting the accuracy of the actual current reading. Rather, they alter the current from what it
would be if the current transformer weren't in the circuit. With the exception of the burden
resistor, these loss resistors are the components that contribute to the loss in the transformer and
heating.
This wasted energy is usually small compared with the power in the circuit it's monitoring.
Usually, the design of the transformer and choice of the burden resistor will be within the
maximum energy loss the end user can allow. As battery-operated devices come into wider use
and power consumption contributes to the energy crisis — even this power may be of concern.
Under these circumstances, it may require special design attention to power consumption.
Current transformers are an efficient way to measure current. Since the burden resistor is
reflected to the primary by 1/N2, the resistance seen in the circuit being monitored can be very
44
small. This allows a larger voltage to be created on the output with minimal effect on the circuit
being measured. A simpler and lower-cost method to measure current is to use a sense resistor
connected in series with the current. However, this method can only be used when power
consumption is of secondary concern. With the more frequent use of battery-powered devices
and the prevailing need to reduce power consumption, the extra expense of a current transformer
can soon be recovered with use. Also, with high current or when a voltage of any magnitude is
required, a sense resistor would be impractical.
WORKING
45
First of all we use step down transformer to step down the voltage from 220 volt ac to 9 volt ac.
For this purpose we use step down transformer. Output of the transformer is converted into dc
with the help of the bridge rectifier diode. Here we use IN 4007 diode. Output of the rectifier is
pulsating dc. So to convert pulsating dc into smooth dc, we use 1000mfd capacitor filter. Output
of the capacitor is connected to the three pin regulator. Here in this project we use IC 7805
regulator. Output of the regulator is 5 volt dc. This dc is further connected to the microcontroller
pin no 40. Pin no 31 is also connected to the positive supply. Pin no 20 is connected to the
ground pin. Pin no 31 is a excess enable pin. If we use external memory for program code then
we connect pin no 31 to ground pin. Otherwise Pin no 31 is connected to the positive supply. Pin
no 9 is connected to the one capacitor and resistor circuit. This circuit is for the auto reset circuit
for the controller. When the power is on then pin no 9 is auto reset by this RC network circuit.
Pin no 18 and 19 is connected to the 12 Mhz crystal. With the help of this crystal, we provide a
constant frequency to the internal oscillator of the IC. If we use 12 Mhz crystal then it means
internal speed of the controller is approx 1 microsecond for one instruction cycle.
Pin no 12, 22 and 21 is connected to the real time clock. Here in this project we use serial RTC
for time base. Pin no 1 and 2 of the IC is connected to the 32 khz crystal oscillator to provide a
exact time delay. This RTC is serial time signal provider. For the real time clock we use 8563 IC.
8563 is a 8 pin IC. Pin no 8 connected to the positive supply. Pin no 4 is connected to the ground
pin. Pin no 1 and 2 is connected to the external crystal to provide a constant frequency for long
time. External battery from battery backup is connected to the pin no8 to provide a battery
backup for long time.
PROGRAM CODE
46
LCD_DATA equ P0
lcd_rs bit P2.7
lcd_rw bit P2.6
lcd_en bit P2.5
flag equ 20h
flag0 bit flag.0
flag1 bit flag.1
flag2 bit flag.2
flag3 bit flag.3
flag4 bit flag.4
flag5 bit flag.5
flag6 bit flag.6
flag7 bit flag.7
flagg equ 21h
flag8 bit flagg.0
flag9 bit flagg.1
flag10 bit flagg.2
flag11 bit flagg.3
flag12 bit flagg.4
flag13 bit flagg.5
flag14 bit flagg.6
flag15 bit flagg.7
flaggl equ 22h
flag16 bit flaggl.0
47
flag17 bit flaggl.1
flag18 bit flaggl.2
flag19 bit flaggl.3
flag20 bit flaggl.4
flag21 bit flaggl.5
flag22 bit flaggl.6
flag23 bit flaggl.7
flaggh equ 23h
flag24 bit flaggh.0
flag25 bit flaggh.1
flag26 bit flaggh.2
flag27 bit flaggh.3
flag28 bit flaggh.4
flag29 bit flaggh.5
flag30 bit flaggh.6
flag31 bit flaggh.7
ch0_on_seconds equ 25h
ch0_on_minutes equ 26h
ch0_on_hours equ 27h
ch0_off_seconds equ 28h
ch0_off_minutes equ 29h
ch0_off_hours equ 2ah
ch1_on_seconds equ 2bh
ch1_on_minutes equ 2ch
ch1_on_hours equ 2dh
48
ch1_off_seconds equ 2eh
ch1_off_minutes equ 2fh
ch1_off_hours equ 30h
ch2_on_seconds equ 31h
ch2_on_minutes equ 32h
ch2_on_hours equ 33h
ch2_off_seconds equ 34h
ch2_off_minutes equ 35h
ch2_off_hours equ 36h
ch3_on_seconds equ 37h
ch3_on_minutes equ 38h
ch3_on_hours equ 39h
ch3_off_seconds equ 3ah
ch3_off_minutes equ 3bh
ch3_off_hours equ 3ch
seconds equ 3dh
minutes equ 3eh
hours equ 3fh
days equ 40h
weekdays equ 41h
months equ 42h
years equ 43h
RTC_ADD equ 44h
RTC_ADD_DATA equ 45h
key0 bit p1.0
49
key1 bit p1.1
key2 bit p1.2
key3 bit p1.3
OUT0 bit p1.4
OUT1 bit p1.5
OUT2 bit p1.6
OUT3 bit p1.7
WRITE_C EQU 0a2h
READ_C EQU 0a3h
ACK_READ EQU 8ah
main:
lcall DELAY11
mov psw,#00h
mov sp,#070h
mov tmod,#00h
mov tcon,#00h
mov scon,#00h
mov ie,#81h
mov ip,#00h
mov tl1,#00h
50
mov th1,#00h
mov p0,#0ffh
mov p1,#0ffh
mov p2,#0ffh
mov p3,#0ffh
mov ch0_on_seconds,#00h
mov ch0_on_minutes,#00h
mov ch0_on_hours,#00h
mov ch0_off_seconds,#00h
mov ch0_off_minutes,#00h
mov ch0_off_hours,#00h
mov ch1_on_seconds,#00h
mov ch1_on_minutes,#00h
mov ch1_on_hours,#00h
mov ch1_off_seconds,#00h
mov ch1_off_minutes,#00h
mov ch1_off_hours,#00h
mov ch2_on_seconds,#00h
mov ch2_on_minutes,#00h
mov ch2_on_hours,#00h
mov ch2_off_seconds,#00h
mov ch2_off_minutes,#00h
mov ch2_off_hours,#00h
mov ch3_on_seconds,#00h
mov ch3_on_minutes,#00h
51
mov ch3_on_hours,#00h
mov ch3_off_seconds,#00h
mov ch3_off_minutes,#00h
mov ch3_off_hours,#00h
mov seconds,#00h
mov minutes,#00h
mov hours,#00h
mov days,#00h
mov weekdays,#00h
mov months,#00h
mov years,#00h
setb OUT0
setb OUT1
setb OUT2
setb OUT3
clr flag0
clr flag1
clr flag2
clr flag3
clr flag4
clr flag5
clr flag6
clr flag7
setb flag8
clr flag9
52
clr flag10
clr flag11
clr flag12
clr flag13
clr flag14
clr flag15
setb flag16
setb flag17
clr flag18
clr flag19
clr flag20
clr flag21
clr flag22
clr flag23
clr flag24
clr flag25
clr flag26
clr lcd_rs
clr lcd_rw
clr lcd_en
MOV RTC_ADD,#0DH
MOV RTC_ADD_DATA,#83h
lcall WRITBYTE
lcall INIT_LCD
lcall CLR_LCD
53
lcall data_read_eeprom
mov dptr,#MSG0
lcall LINE_1
mov dptr,#MSG1
lcall LINE_2
lcall DELAY11
lcall DELAY11
mov dptr,#MSG2
lcall LINE_1
mov dptr,#MSG3
lcall LINE_2
setb flag0
mov dptr,#MSG12
MOV RTC_ADD,#02H
lcall READBYTE
MOV seconds,RTC_ADD_DATA
MOV RTC_ADD,#03H
lcall READBYTE
MOV minutes,RTC_ADD_DATA
MOV RTC_ADD,#04H
lcall READBYTE
MOV a,RTC_ADD_DATA
ANL a,#3fh
MOV hours,a
54
MOV RTC_ADD,#05H
lcall READBYTE
MOV a,RTC_ADD_DATA
ANL a,#3fh
MOV days,a
MOV RTC_ADD,#06H
lcall READBYTE
MOV a,RTC_ADD_DATA
ANL a,#07h
MOV weekdays,a
MOV RTC_ADD,#07H
lcall READBYTE
MOV a,RTC_ADD_DATA
ANL a,#1fh
MOV months,a
MOV RTC_ADD,#08H
lcall READBYTE
MOV years,RTC_ADD_DATA
lcall OUTPUT_ON_OFF
ljmp WAIT
OUTPUT_ON_OFF:
mov a,seconds
cjne a,ch0_on_seconds,ch0_on_nxt
mov a,minutes
55
cjne a,ch0_on_minutes,ch0_on_nxt
mov a,hours
cjne a,ch0_on_hours,ch0_on_nxt
clr OUT0
ch0_on_nxt:
mov a,seconds
cjne a,ch0_off_seconds,ch0_off_nxt
mov a,minutes
cjne a,ch0_off_minutes,ch0_off_nxt
mov a,hours
cjne a,ch0_off_hours,ch0_off_nxt
setb OUT0
INIT_LCD:
mov LCD_DATA,#038h
lcall COMMAND_BYTE
lcall DELAY1
mov LCD_DATA,#038h
lcall COMMAND_BYTE
lcall DELAY1
mov LCD_DATA,#038h
lcall COMMAND_BYTE
lcall DELAY1
mov LCD_DATA,#038h
lcall COMMAND_BYTE
56
lcall DELAY1
mov LCD_DATA,#008h
lcall COMMAND_BYTE
lcall DELAY1
mov LCD_DATA,#00ch
lcall COMMAND_BYTE
lcall DELAY1
mov LCD_DATA,#006h
lcall COMMAND_BYTE
lcall DELAY1
ret
CLR_LCD:
mov LCD_DATA,#001h
lcall COMMAND_BYTE
lcall DELAY1
ret
WRITE_MSG:
mov a,#00h
movc a,@a+dptr
cjne a,#'$',WRITE_CONT
ret
WRITE_CONT:
mov LCD_DATA,a
lcall DATA_BYTE
inc dptr
57
ljmp WRITE_MSG
COMMAND_BYTE:
clr lcd_rs
lcall DELAY
ljmp CMD10
DATA_BYTE:
setb lcd_rs
lcall DELAY
CMD10:
clr lcd_rw
lcall DELAY
setb lcd_en
lcall DELAY
clr lcd_en
lcall DELAY
ret
DELAY:
mov r0,#10d
DEL:
djnz r0,DEL
ret
DELAY1:
mov r0,#0d
mov r1,#20d
DELAY10:
58
djnz r0,DELAY10
djnz r1,DELAY10
ret
DELAY41:
mov r0,#0d
mov r1,#15d
DLP410:
djnz r0,DLP410
djnz r1,DLP410
ret
DELAY11:
mov r0,#0d
mov r1,#0d
mov r2,#10d
DLP11:
djnz r0,DLP11
djnz r1,DLP11
djnz r2,DLP11
ret
data_read_eeprom:
mov 1bh,#0d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
59
mov ch0_on_seconds,19h
mov 1bh,#1d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch0_on_minutes,19h
mov 1bh,#2d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch0_on_hours,19h
mov 1bh,#3d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch0_off_seconds,19h
mov 1bh,#4d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch0_off_minutes,19h
60
mov 1bh,#5d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch0_off_hours,19h
mov 1bh,#6d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch1_on_seconds,19h
mov 1bh,#7d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch1_on_minutes,19h
mov 1bh,#8d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch1_on_hours,19h
mov 1bh,#9d
61
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch1_off_seconds,19h
mov 1bh,#10d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch1_off_minutes,19h
mov 1bh,#11d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch1_off_hours,19h
mov 1bh,#12d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch2_on_seconds,19h
mov 1bh,#13d
mov r6, #00h
62
djnz r6,$
djnz r6,$
lcall read
mov ch2_on_minutes,19h
mov 1bh,#14d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch2_on_hours,19h
mov 1bh,#15d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch2_off_seconds,19h
mov 1bh,#16d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch2_off_minutes,19h
mov 1bh,#17d
mov r6, #00h
djnz r6,$
63
djnz r6,$
lcall read
mov ch2_off_hours,19h
mov 1bh,#18d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch3_on_seconds,19h
mov 1bh,#19d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch3_on_minutes,19h
mov 1bh,#20d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch3_on_hours,19h
mov 1bh,#21d
mov r6, #00h
djnz r6,$
djnz r6,$
64
lcall read
mov ch3_off_seconds,19h
mov 1bh,#22d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch3_off_minutes,19h
mov 1bh,#23d
mov r6, #00h
djnz r6,$
djnz r6,$
lcall read
mov ch3_off_hours,19h
ret
MSG0: db ' RTC CLOCK $'
MSG1: db ' 4 CHANEL TIMER $'
MSG2: db ' 00/00/2000 $'
MSG3: db 'CLOCK 00:00:00 $'
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MSG4: db 'CH0ON 00:00:00 $'
MSG5: db 'CH0OFF 00:00:00 $'
MSG6: db 'CH1ON 00:00:00 $'
MSG7: db 'CH1OFF 00:00:00 $'
MSG8: db 'CH2ON 00:00:00 $'
MSG9: db 'CH2OFF 00:00:00 $'
MSG10: db 'CH3ON 00:00:00 $'
MSG11: db 'CH3OFF 00:00:00 $'
MSG12: db 'SUNMONTUEWEDTHUFRISAT$'
ADVANTAGES AND CONCLUSIONS
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1. It is a very reliable circuit and also there s a complete elimination of
manpower.
2. It uses high technology, products, core devices are intelligent controllers and
the time control of the braker can be set in advance in long durations
depending upon the need of the locality.
3. It has a long life and its operation can be set for an year in advance.
4. It leads to the conservation of the natural resources particularly the fuel which
is consumed by vehicles.
5. Leads to more organized traffic on roads and hence considerably reduces
number of accidents.
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FUTURE PROSPECTS
Solar powered brakers
Since our original system uses ac power supply which is generated from a renewable source of
energy, we can always replace it with a solar powered system as they are green form of energy.
Other applications
The system can also be coupled with sensors which provides instant information about any
natural calamities like land slides which can affect the traffic on roads. Now the brakers
installed a kilometer away from the affected area are switched on giving them prior information
about any detours ahead.
REFERENCES
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1) The 8051 Microcontroller and Embedded Systems using Assembly
and C, Muhammad Ali Mazidi, Janice Gillispie Mazidi, Rolin
D.McKinlay.
2) http://www.keil.com/dd/docs/datashts/atmel/at89s52_ds.pdf
(Microcontroller)
3) http://www.dfrobot.com/image/data/FIT0127/datasheet.pdf ( LCD)
4) http://www.google.co.in
5) http://www.wikipedia.org
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