Integration-aware Modeling,Simulation and Design Techniques
for Smart Electronic Systems
Politecnico di Torino
Scuola di DottoratoPh.D. in Control and Computer Engineering – XXVII cycle
Alessandro Sassone
Advisors: Prof. Enrico Macii, Prof. Massimo Poncino
2EDA group
Politecnico di Torino
Outline
Context
Challenges
Methods
Simulation and Design of Digital Components
Automation of Battery Modeling
Modeling and Simulation of Power in Smart Systems
Conclusions
3EDA group
Politecnico di Torino
Context Smart electronic systems:
Involve components from different technological domains Analog/RF, digital, discrete and power devices, MEMS, power sources
Incorporate multiple functions, technologies, materials
Harvesting device
Energy storage Power mgmt
SensorsAnalog
front/back endLow power processing
Wireless transmission
Power actuators
4EDA group
Politecnico di Torino
Challenges Increasing system complexity
Integration issues
Components are traditionally designed separately with different flows
Interaction effects between components and environment
Interferences and variability issues
General problem: integration of design flows
Functionality of digital subsystems
Modeling of batteries functionality
Non-functional properties
Power, temperature, reliability, etc.
5EDA group
Politecnico di Torino
Design of Digital Components Additional integration-aware constraints
Detection and correction design paradigm
Multiple physical issues (e.g., PVT variability, device aging) essentially cause performance degradation
Monitored metric: Performance (propagation delay)
Different sensors according to the target scenario
Detection only
Detection and correction
Digital IP
Metrics Sensor
Inputs Outputs
Metrics
Metrics OK
Wrapper
6EDA group
Politecnico di Torino
Design of Augmented Digital IP Augment the functionality of a given IP
Automatic insertion of delay sensors in appropriate locations of the IP, i.e., critical paths
Different on-chip timing monitors implemented at RTL
Counter-based monitor
Razor flip-flop monitor
Delay measurement circuit based on a TDC
Verification moved to TLM to speedup simulation
Counter-based and Razor monitors allow a full TLM simulation scenario
TDC-based monitor allow a TLM-physical level co-simulation scenario
Sassone A. et al., “A Fully Standard-Cell Delay Measurement Circuit for Timing Variability Detection”, PATMOS 2013, pp. 239-242.
7EDA group
Politecnico di Torino
Cross-Level Verification1. RTL-to-TLM
abstraction of the digital IP augmented with timing monitors
2. Injection of mutants in the abstracted digital IP to reproduce delay effects
3. Mutation analysis: activate the injected mutants for testing the detection and correction mechanism
Digital IP
Metric Sensor
Inputs/Outputs
Metric
Metric OK
m1m2
m3
mn
m4
2. Injection of mutants
1. RTL to TLM abstraction
Digital IP
Metric Sensor
Inputs Outputs
Metric OK
Metric
VHDL/Verilog to SystemC TLM
RTL IP
TLM simulation platform
3. Mutationanalysis
Automatic stimuli
generator and sensor
monitor
8EDA group
Politecnico di Torino
Experimental Results Application to a FIR filter
described in VHDL RTL
Razor monitors inserted on the 64 most critical paths
Counter-based monitor inserted on the most critical path
Simulation performance compared with traditional RTL simulation
PI PO FF Gates Processes
Fir + razor 75 80 425 10,698 1,102
Fir + counter-based 12 27 462 10,324 86
RTL sim. (s) Injected
Mutants
TLM sim. (s)
Fir + razor 241.05 128 68.08
Fir + counter-based 381.68 3 75.90
TLM is on avg.
4.28x faster than
RTL simulation
Guarnieri, V. et al., “A Cross-Level Verification Methodology for Digital IPs Augmented with Embedded Timing Monitors”, DATE 2014, pp. 1-6.
9EDA group
Politecnico di Torino
Automation of Battery Modeling Batteries are critical elements in smart systems
Finite reservoirs
Behavior affected by several non-idealities
Modeling requires extracting data via costly and time-consuming measurements
Proposed approach
Use only “public” data of battery datasheets
The data available determine which degree of accuracy can be obtained by the model
10EDA group
Politecnico di Torino
Conceptual Flow Model generation
Ⓐ data sheet information selection
Ⓑmodel level template selection
Ⓒ automated model population
Ⓓmodel simulation by actual workloads
Model validation Ⓐmodel validation
through datasheet
Ⓑmodel validation through measurementsand actual workloads
* = conventional, via measurements
11EDA group
Politecnico di Torino
Modeled Effects Discharge characteristics
I order effects
Discharge time, SOC, steady-state response, transient response
II order effects
Temperature effects on battery voltage and capacity
Capacity fading due to cycling and storage (aging)
Charge characteristics
Charge time, SOC, steady-state response
Battery model templates
Functional: based on analytical equations
Equivalent electrical circuit
Preferred model for system-level simulation
12EDA group
Politecnico di Torino
Experimental Results
Discharge steady-state response ST thin film EFL700A39
Discharge transient response Energizer CR2032 coin cell
Charge profileSAFT MP 174565
prismatic cell
[GLSVLSI 2014], [ISLPED 2014]
13EDA group
Politecnico di Torino
Power Modeling and Simulation Single simulation framework
Modular system architecture
Smart System = set of sub-systems with identical structure
Subsystems and their interconnections described using IP-XACT standard
Virtual bus-based architecture
Bus implements charge transfer interconnect andincorporates “control” operations
Definition of standardized interfaces for each of the elements
Signals and relative types
Models have to comply with interface regardless of abstraction level
Implemented as SystemC models
14EDA group
Politecnico di Torino
LOAD(S)
STORAGE DEVICE(S)
POWER SOURCE(S)
CONV
l
CTI BUS
CONV
CONVs p`
Component Classification
15EDA group
Politecnico di Torino
Power Sources
CONV
LOADsV I
Energy Storage Devices
BRIDGE
CTI + “Control”V I V I
V I
CONVV I
EnV I
CONVV I
EnESOC
V ILOADs
Power SourcesPower SourcesEnergy Storage Devices
Energy Storage Devices
Component Classification
Component # Interface
Load l (V, I)
ESD s (V, I, SOC, C, En)
Power Source
P (V, I, En)
CTI Bus 1((SOC, C, En)s, (En)p, (V, I)c)
Converter l+s+p (V, I, V, I)
V, I: voltage/currentC: ESD capacitySOC: State of ChargeEn: control signal
16EDA group
Politecnico di Torino
Power Sources
CONV
LOADsV I
Energy Storage Devices
BRIDGE
CTI + “Control”V I V I
V I
CONVV I
EnV I
CONVV I
EnESOC
V ILOADs
Power SourcesPower SourcesEnergy Storage Devices
Energy Storage Devices
Component Classification
Component # Interface
Load l (V, I)
ESD s (V, I, SOC, C, En)
Power Source
P (V, I, En)
CTI Bus 1((SOC, C, En)s, (En)p, (V, I)c)
Converter l+s+p (V, I, V, I)
V, I: voltage/currentC: ESD capacitySOC: State of ChargeEn: control signal
IN ADDITION:ESD can have an environmental parameter • T = temperature
PS can have two environmental parameters• T = temperature• G = physically harvested quantity (e.g., irradiance)
17EDA group
Politecnico di Torino
Technologies
Simulation engine
SystemC
Hardware description language
Blocks implemented as SystemC-AMS modules
Interface description
IP-XACT extended to formalize power model interface
Model population
Only requirement is that implemented models respect the pre-defined interface
SystemC-AMS naturally allows the simultaneous use of multiple abstraction levels
Useful for “localized” optimization via design exploration
18EDA group
Politecnico di Torino
Simulation Results Application to smart system case study
Comparison with Matlab/Simulink
High accuracy: error <0.01% on average
Significant speedup: 28X on average
Efficient design space exploration/integration validation
High degree of modularity
accuracy/simulation performance trade-offs thanks to different abstraction levels supported
High scalability
Simulation of energy flows in generic systems of various scales, i.e., Electrical Energy Systems
[PRIME 2014], [ISLPED 2014], [PATMOS 2014]
19EDA group
Politecnico di Torino
Conclusions
Modeling, simulation and design of smart heterogeneous embedded systems
Methodology to enhance the verification of performance of digital subsystems
Automated flow for the generation of battery models from datasheet for fast and low-cost battery performance analysis
Modeling and simulation framework for early estimation of power and energy flows
Future works will target
automated model construction flow to other components of the “power domain”, e.g., converters, power sources
other non-functional properties, e.g., temperature, reliability
20EDA group
Politecnico di Torino
Publications M. Crepaldi, A. Sanginario, P. Motto Ros, M. Grosso, A. Sassone, M.
Poncino, E. Macii, S. Rinaudo, G. Gangemi, and D. Demarchi, “Towards Multi-Domain and Multiphysics Smart System Co-Design,” under review at IEEE Circuits and Systems Magazine.
S. Vinco, A. Sassone, D. Lasorsa, E. Macii, M. Poncino., “A Framework for Efficient Evaluation and Comparison of EES Models”, in IEEE PATMOS 2014, pp. 1-8.
D. Shin, A. Sassone, A. Bocca, A. Macii, E. Macii, M. Poncino., “A Compact Macromodel for the Charge Phase of a Battery with Typical Charging Protocol”, in ACM/IEEE ISLPED’14, pp. 267-270.
S. Vinco, A. Sassone, F. Fummi, E. Macii, M. Poncino., “An Open-Source Framework for Formal Specification and Simulation of Electrical Energy Systems”, in ACM/IEEE ISLPED’14, pp. 287-290.
A. Sassone, S. Vinco, M. Poncino, E. Macii., “An Efficient Simulation Methodology for Electrical Energy Systems”, in PRIME 2014, pp. 1-4.
A. Sassone, D. Shin, A. Bocca, A. Macii, E. Macii, M. Poncino. “Modeling of the Charging Behavior of Li-Ion Batteries based on Manufacturer’s Data”, in ACM GLSVLSI’14, pp. 39-44.
21EDA group
Politecnico di Torino
Publications (cont’d) Guarnieri V., Petricca M., Sassone A., Vinco S., Bombieri N., Fummi F.,
Macii E., Poncino M., “A Cross-Level Verification Methodology for Digital IPs Augmented with Embedded Timing Monitors”, in DATE 2014, pp. 1-6.
Crepaldi M., Grosso M., Sassone A., Gallinaro S., Rinaudo S., Poncino M., Macii E., Demarchi D., “A Top-down Constraint-driven Methodology for Smart System Design”, IEEE Circuits and Systems Magazine, vol.14, no.1, pp. 37–57, Feb. 2014.
Sassone A., Petricca M., Poncino M., Macii E., “A Fully Standard-Cell Delay Measurement Circuit for Timing Variability Detection”, in PATMOS 2013, pp. 239-242.
Sassone A., Liu W., Calimera A., Macii A., Macii E., Poncino M., “Modeling and Characterization of Thermally-Induced Skew on Clock Distribution Networks of Nanometric ICs”, Microelectronics Journal, vol. 44, no. 11, pp. 970-976, Nov. 2013.
Sassone A., Calimera A., Macii A.; Macii E., Poncino M., Goldman R., Melikyan V., Babayan E., Rinaudo S., “Investigating the effects of Inverted Temperature Dependence (ITD) on clock distribution networks”, in DATE 2012, pp. 165-166.