Cost effective RF MEMS wafer test solution Presto Engineering – Caen, France
E. de Lédinghen, N. Loiseau
Agenda
• Industrial test development cycle
• RF MEMS specifics
• Where are we today ?
• Solution
• Conclusion
Industrial test development cycle (1)
Device
datasheet
Characterization
results
FMEA
Test Specification
Industrial test development cycle (2)
Test
Specification
Volume
estimation
Sales price
target
Implementation choice
RF MEMS specifics
• A New technology = gap to bridge
– More characterization required
– Technology yield & product validation
• A High Volume / Short TTM
– Cellular phones market
• Market competitive ASP
– Competitive mature technology set ref ASP
– ASP must be at least similar, or lower
Test development today
Characterisation
results
Bench test
solution
Test
Specification
Volume test
solution
Test development today
Application bench
Test Production IC Test TOTAL
Labview, Custom
Visual Basic, …
Tester proprietary
language
2 different code
environments to maintain
and correlate
Several discrete
instruments
Rack and stacks, per
testsets
Automatic Test
Equipment
Integrating multi
instrument resources
2 different CAPEX, limiting
re-use of test capabilities
Application board
reference HW
EWS Probe card
FT Loadboard
3 reference HW to be
designed, validated
What if we could merge both at
lower NRE and shortening TTM ?
Our solution
Device
datasheet
Characterization
results
Volume test
solution
More constraints
• RF MEMS switches come with various flavors:
– 3 SPST
– 5 SPST
– Dual: SP5T + SP3T
– SP12T
– Etc…
• More measurement processes:
– Small resistor close to 1Ω
– RF to 6GHz
The tester choice
• PXI backplane
• Test environment open to bench, and flexible
– Same software = Labview + Teststand
– Able to easily connect to more bench instruments
• Fast execution and data transfer
– PXIe able to transfer @ 1Gb/s
– Embedded controller
• Limited or 0 footprint: can be installed on the prober.
• Low CAPEX
PXI: Flexible & low cost for HP-RF
• Single platform can handle characterization + volume
– More different options for characterization
– More parallelism for volume
• Re-usable
– Same software
– TestStand able to quickly switch to parallelism
• Low cost
– 1/10 of standard ATE CAPEX
– Maintenance & operating cost also 1/10 lower
PXI is production friendly for those ICs
• Equivalent throughput
– Standard acquisition + FFT at 1ms
– High end ATE also at 1 or 2ms
• Reduced down time
– Replace full tester instead of single board
– PXI tester price = 2 or 3 ATE boards
• Higher parallelism can be achieved
– PXI can be chained, ATE cannot.
PXI for production
• As a National Instruments Alliance Partner we are also considering the new NI-STS (Semiconductor Test System) as an alternative
Our hardware solution
• Mother board + daughter board
– Flexibility
• Up to 16 MEMS switches
• Any configuration: SPST, SPnT, etc…
– Lower NRE per configuration <2k€
• Mother board connects to standard instrumentation
– 100V high voltage managed locally
– Kelvin resistor measurements local
Hardware solution
16 RF connections
50Ω signal path through 2 PCB
Hardware structure
DUT
RF
src
DC
src
RF
out
A
V
• 16 RF or DC channels
• 16 independent activation signals
Test results
• Capability to watch for low resistance
• Low NRE proved:
– CAPEX of 35 k€ only
– Probe card at < 2 k€ per new pad ring configuration
• Even lower for duplication
• Operation ready for volume:
– Reference probe card exists
• Automatic checker
– Automatic wafer contact detection
0
1
2
3
4
5
6
7
8
9
0.0
E+
00
5.0
E-0
6
1.0
E-0
5
1.5
E-0
5
2.0
E-0
5
2.5
E-0
5
3.0
E-0
5
R (Ω
)
t (s)
Specification / Features
• RF up to 6GHz
• 16 MEMS channels
• Kelvin Resistor measurements at +/- 0.1Ω
• Dynamic R measurement at 4MS/s
• pF Capacitance measurement capability
• Programmable actuation voltage up to 130V
• Programmable actuation shape (AWG)
– Bipolar, bipolar RZ, triangle…
Conclusion
• New system approach
• New answer for new economics
• Target prices already achieved for characterisation
• System ready for volume