Post on 06-Aug-2020
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IntroductionThe STEVAL-PMIC1K1 evaluation board is designed for testing and evaluation of the STPMIC1 power management IC forapplication processors requiring low power and high efficiency. The STPMIC1 integrates a range of regulators, converters, andswitches to manage the power requirements of STM32MP1 series microprocessors as well as other application processors andperipherals such as DDR, Flash, USB and other system devices.
The evaluation board is highly configurable and can be programmed via I²C to suit many power supply requirements of MPU-based applications such as IoT, human machine interfaces, Smart Home, etc.
The 6.1x7.2cm evaluation board is provided with 2.54mm header for each regulators output, some jumpers are present on theboard for fast and easy setup accordingly to the application needs. For each output a TP is present for sensing the outputvoltage. User management buttons, Reset, Wakeup and Ponkey, are available for easy work. Dedicated connectors for digitalsection are present for I/O and I²C communication up to 1Mb/s
Figure 1. Evaluation board with STPMIC1APQR device
RELATED LINKS For more details, see the STPMIC1 datasheet on the ST website
How to use the evaluation board for the STPMIC1x high integration power management IC
UM2634
User manual
UM2634 - Rev 1 - November 2019For further information contact your local STMicroelectronics sales office.
www.st.com
1 PMIC evaluation board overview
1.1 STEVAL-PMIC1K1 board ordering information
Table 1. Evaluation board order code
Evaluation board order code STPMIC1 part number Marking
STEVAL-PMIC1K1 STPMIC1APQR STPMIC1A
RELATED LINKS For more details, see the STPMIC1 datasheet on the ST website
1.2 STEVAL-PMIC1K1 output voltages
Table 2. Output voltage of each regulator
Header Regulator Output Voltage (V) Programming step (mV) Output current (mA)
H2 LDO1 1.7 to 3.3 100 350
H6 LDO2 1.7 to 3.3 100 350
H9
LDO3 Normal mode 1.7 to 3.3 100 100
LDO3 Sink/Source mode VOUT2 / 2 (BUCK2) - ±120 (±200peak)
LDO3 Bypass mode LDO3IN-VDROP_LDO3 - 50
H12 LDO4 3.3 (fixed) - 50
H14 LDO5 1.7 to 3.9 100 350
H15 LDO6 0.9 to 3.3 100 150
H17 REFDDR VOUT2 / 2 (BUCK2) - ±5
H1 BUCK1 0.725 to 1.5 25 1500
H5 BUCK2 1 to 1.5 50 1000
H8 BUCK3 1 to 3.4 100 500
H11 BUCK4 0.6 to 3.9
25 (0.6V to 1.3V)
50 (1.3V to 1.5V)
100 (1.5 to 3.9V)
2000
- BOOST 5.2V (fixed) - 1100
H18 VBUSOTG_SW ~BSTOUT - 100/500 mA(1)
H20 PWR_SW ~SWIN - 1000
1. depending on USB configuration
UM2634PMIC evaluation board overview
UM2634 - Rev 1 page 2/22
1.3 STEVAL-PMIC1K1 interfaces
1.3.1 Jumper configurations
J1, J4: LDO3 input source
Figure 2. J1, J4 LDO3 input source selection
VBUCK_2
VBAT
VBAT
VBUCK_2 J4 VBUCK_3
J1 VIN
Vout_BK2
LDO3_IN
1 2 3
1 2 3
The J1 and J4 settings depend on application needs, user can choose the appropriate value in terms of powerdissipation.
Table 3. Jumper configuration for LDO3 input source
J1 position J4 position LDO3 input
2-1 - VIN
2-3 2-1 BUCK2 out
2-3 2-3 BUCK3 out
J2: VIO input source
Figure 3. J2 VIO input source selection
J2 VBUCK_3Vout_BK3
VIO
VIO_ext
1 2 3
This jumper selects the input source of VIO. If a jumper is located in position 2-1, external voltage is selected fromH16 connector, if it is located in position 2-3, the output voltage of BUCK3 is selected.
J3: PWR_SW input source selection
Figure 4. J3 PWR_SW input source selection
J3SWIN_ext
Vout_BOOST
SWIN1 2 3
This jumper selects the input source of internal switch PWR_SW. If a jumper is located in position 2-1, externalvoltage is selected from H13 connector, if is located in position 2-3, output of BOOST is selected.
UM2634STEVAL-PMIC1K1 interfaces
UM2634 - Rev 1 page 3/22
J5: Power control mode
Figure 5. J5 power control mode jumper
J2
J3
AGND
VBUCK_3
1 2 3 SWIN_ext
Vout_BK3
VIO
Vout_BOOST
SWIN
WAKEUPRST_NPONKEY_NPWRCTRLINT_N
VIO_ext
J5
This jumper selects the power control mode. If a jumper is located in position 2-1, PWCTRL pin is forced to zero,if is located in position 2-3, PWCTRL pin is forced to VIO.
1.3.2 User interface buttons• B1 pulls RESETn pin of PMIC to GND level:
– this button allow tying the RSTn signal to GND to perform a Reset operation• B2 pulls PONKEYn pin of PMIC to GND level:
– this button allows tying the PONKEYn signal to GND to perform a Turn ON operation• B3 pulls WAKEUP pin of PMIC to VIN:
– this button allows tying the WAKEUP signal to High to perform a WAKEUP operation
UM2634STEVAL-PMIC1K1 interfaces
UM2634 - Rev 1 page 4/22
1.4 Schematic diagrams
Figure 6. STEVAL-PMIC1K1 board schematic
J2
VOTG
B3
WAKEUP
Vout_OTG
21
H2
21
H1312
21
AGNDVBUCK_2
21
H6
654321
VBAT
J3
100µFC7 1k
R1AGND
VBUCK_4
VBUCK_2H15
AGND
21
H11
21
H1
H17
321
AGND
D1
VBAT
AGND
AGND
VBUCK_1
FB2
B1
RESET
21
21
H9
AGND
12
H16
H19
B2
PONKEY
Vout_SW AGNDVSW
VBAT
VREF
VLDO_1
600zDNP
FB1
2K2R5
AGND
VBUCK_1VBUCK_4
VLDO_1VLDO_2VLDO_3VLDO_4VLDO_5VLDO_6
VREF
VBUCK_2 J4
H21
VBUCK_3
AGNDVLDO_4
AGND
AGND
VBUCK_3
VOTG
21
H20
J1
AGNDVLDO_2
SWIN_ext
VBAT
1 2 3
21
H18
H1012
AGNDVLDO_5
12
H7
600zDNP
21
H8
SWIN_ext
AGND
VIN
Vout_BK2
LDO3_IN
Vout_BK3
VIO
Vout_BOOST
SWIN
WAKEUPRST_NPONKEY_NPWRCTRLINT_N
SCLSDA
Vout_LDO1Vout_LDO2Vout_LDO3Vout_LDO4Vout_LDO5Vout_LDO6
Vout_VREF
AGNDVLDO_3
AGND
H12
VIO_ext
AGND
AGND
AGND
VIO_ext
AGNDVLDO_6
AGNDVBUCK_3
VSW
VBAT
J5
H5
21
Vout_BK1Vout_BK4
21
H14
AGND
AGND
STPMIC1
UM
2634 - Rev 1
page 5/22
UM
2634Schem
atic diagrams
Figure 7. STEVAL-PMIC1K1 power management IC schematic
AGND
INT_LDO
10 PGND
VREF 16
VOUT_3 31
AGND
10uFC22
VLX_4 25
Voltage Sensing
30
4.7uFC29
AGND
1uFC26
LX5
2K2R3
WAKEUPPONKEY_NINT_N43
Voltage Sensing
AGND12
22uFC19
P26
32GND
Vout_BK3
VIO
SCL
BUCK2_IN
28
PWRCTRL44
37SW_IN
Voltage Sensing
PONKEY_N
RST_N
Vout_LDO3
PWRCTRL
2K2R4
Vout_BK4
4.7uFC33
AGND
6 PGND
INT_N
2
PP
GNDGND
SW_OUT 38
7VLX_1
11VLX_2
AGND
LDO2_OUT 18
Voltage Sensing
IC1STPMIC1
SDA
1uFC37
4.7uFC34
AGND
Vout_SW
AGND
4.7uFC39
1.0uH
LX3
AGND
AGND
Vout_LDO6
Vout_BOOST
17
10uFC24 SWIN
BST_OUT 34
SCL4
10KR2
VOUT_2 9
14LDO3_OUT
Voltage Sensing
220uFC38
Voltage Sensing
4.7uFC35
Voltage Sensing
AGND
WAKEUP
AGND
AGND
AGND
AGND
Voltage Sensing
AGND
10uFC16
AGND41
AGND
39LDO4_OUT
AGND
13
24 BUCK4_IN
AGND
Vout_BK1LX1
22uFC23
Voltage Sensing
Voltage Sensing
LX4AGND
4.7uFC36
1.0uH
AGND
VBUS_OTG 35
Vout_LDO4
LDO3_IN
VIN
10uFC20
SDA3
LDO16_IN
36 VIN
Voltage Sensing
10uFC18
1.0uH
LX2
Vout_VREF
20LDO5_OUT
AGND
4.7uFC32
22uFC17
22uFC21
4.7uFC27
29VLX_3
1uFC28
Vout_BK2
VLX_BST33
Voltage Sensing
VOUT_1 5
Voltage Sensing
VIO42
LDO25_IN
22
22uFC25
LDO6_OUT 21
Vout_OTGGNDLDO15
23LDO1_OUT
AGND
BUCK3_IN
19
Vout_LDO5
VOUT_4 27
10uFC30
8 BUCK1_IN
AGND
AGND
Vout_LDO1
Vout_LDO2
RST_N1
40
1.0uH
Voltage Sensing
10uFC31
LDO3_IN
45 EXPPAD
1.0uH
UM
2634 - Rev 1
page 6/22
UM
2634Schem
atic diagrams
2 Board power supply setups
The STEVAL-PMIC1K1 can be configured to be powered from different sources. Follow the instructions below forthe correct jumper settings associated with the different power supply options.When using an external VIO voltage, all the digital information remains available for status readings, but whenusing a single power supply, the VIO also goes OFF when the device changes status to OFF, and an I²C erroroccurs.
2.1 Single 3.6VIN to 5VIN power supply
Step 1. Supply LDO3 input voltage from the BUCK2 output:Step 1a. set J1 to position 2-3
Step 1b. set J4 to position 1-2
Step 2. Supply SW_IN input voltage from the BOOST output:Step 2a. set J3 to position 2-3
Step 3. Supply VIO input voltage from the BUCK3 output:Step 3a. set J2 to position 2-3
Step 4. Supply input power supply on H7 and H10 connectors (parallel):Step 4a. set J5 to for power control polarity input
1-2 = active 0; 2-3 = active 1
Step 4b. supply 3.6V to 5V on H7 and H10
Figure 8. Jumper setup for single power supply 3.6VIN to 5VIN
UM2634Board power supply setups
UM2634 - Rev 1 page 7/22
2.2 5VIN and external 3.3VIO power supply
Step 1. Supply LDO3 input voltage from the BUCK3 output:Step 1a. set J1 to position 2-3
Step 1b. set J4 to position 2-3
Step 2. Supply SW_IN input voltage from the BOOST output:Step 2a. set J3 to position 2-3
Step 3. Supply VIO_EXT through H16:Step 3a. set J2 to position 1-2
Step 3b. supply 3.3V at H16
Step 4. Supply input power supply on H7 and H10 connectors (parallel):Step 4a. set J5 to for power control polarity input
1-2 = active 0; 2-3 = active 1
Step 4b. supply 5V on H7 and H10
Figure 9. Jumper setup for single power supply 3.6VIN to 5VIN
UM26345VIN and external 3.3VIO power supply
UM2634 - Rev 1 page 8/22
3 STPMIC1 configuration registers
The configuration registers in the STPMIC1 non-volatile Flash can be programmed to suit different applicationrequirements. The parameters that can be modified include VOUT, rank order in turn-on and turn-off sequences,VINOK threshold and hysteresis, etc.The following register tables show the memory addresses in the STPMIC1 NVM for the configurable parametersof the corresponding STPMIC configuration A.After loading the values into the NVM shadow register, writing the value 0x01 into the address 0xB9 renders thechanges effective on the next power-on of the device.Below is an example of using commands via I²C interface:1. set device address to 0x332. read address 0xF8 = 0xEE
– LOCK_OCP[0] → 0 = Short-circuit does not turn OFF PMIC– AUTO_TURN_ON[1] → 1 = PMIC starts automatically on VIN rising– PEKYLKP_OFF[2] → 1 = Turn OFF on long key press active– FORCE_LDO4[3] → 1 = LDO4 follows normal ranking– VINOK_THRES[5:4] → 1:0 = VINOK threshold voltage 3.5V– VINOK_HYS[7:6] → 1:1 = 500mV VINOK hysteresis voltage
To change VINOK threshold from 3.5 V to 4.5 V, you need to change:– VINOK_THRES[5:4] → 1:1=VINOK threshold voltage 4.5V
3. write address 0xF8 = 0xFE4. write address 0xB9 = 0x015. after cycle power OFF and power ON, the changes will take effect
Table 4. Default NVM data STPMIC1A
ADDRESS DATA NVM shadow register
0xF8 0xEEVINOK_HYS[1:0] VINOK_THRES[1:0] FORCE_LDO4 PEKYLKP_OFF AUTO_TURN_ON LOCK_OCP
1 1 1 0 1 1 1 0
0xF9 0x92BUCK4_RANK[1:0] BUCK3_RANK[1:0] BUCK2_RANK[1:0] BUCK1_RANK [1:0]
1 0 0 1 0 0 1 0
0xFA 0xC0LDO4_RANK[1:0] LDO3_RANK[1:0] LDO2_RANK[1:0] LDO1_RANK[1:0]
1 1 0 0 0 0 0 0
0xFB 0x02BUCK4_CLAP LDO3_BYPASS REFDDR_RANK[1:0] LDO6_RANK[1:0] LDO5_RANK[1:0]
0 0 0 0 0 0 1 0
0xFC 0xF2BUCK4_VOUT[1:0] BUCK3_VOUT[1:0] BUCK2_VOUT[1:0] BUCK1_VOUT[1:0]
1 1 1 1 0 0 1 0
0xFD 0x80SWOUT_BOOST_OVP reserved LDO3_VOUT[1:0] LDO2_VOUT[1:0] LDO1_VOUT[1:0]
1 0 0 0 0 0 0 0
0xFE 0x02reserved reserved reserved reserved LDO6_VOUT[1:0] LDO5_VOUT[1:0]
0 0 0 0 0 0 1 0
0xFF 0x33LOCK_NVM I2C_ADDR[6:0]
0 0 1 1 0 0 1 1
UM2634STPMIC1 configuration registers
UM2634 - Rev 1 page 9/22
RELATED LINKS Refer to the STPMIC1 datasheet for more information regarding the NVM shadow register
UM2634STPMIC1 configuration registers
UM2634 - Rev 1 page 10/22
4 Power on/off sequence
The table below shows the configurations for the power management IC with different setups in terms of rankingand output voltage values; the ranking feature only impacts the LDO and buck converter regulators.
Table 5. Default output voltage configuration
Header OutputSTEVAL-PMIC1K1
Voltage Rank
H2 LDO1 0V 0
H6 LDO2 0V 0
H9 LDO3 0V 0
H12 LDO4 3.3V 3
H14 LDO5 2.9V 2
H15 LDO6 0V 0
H1 BUCK1 1.2V 2
H5 BUCK2 0V 0
H8 BUCK3 3.3V 1
H11 BUCK4 3.3V 2
The following waveforms show the turn-on and turn-off sequences of the STPMIC1A configuration. The delaybetween each rank is 3.0 ms typical. The same applies for the power-down sequence, but in reverse order.The following figure shows the auto turn-on waveforms when power is first applied to the PMIC. In the STPMIC1Aconfiguration, BUCK3 is programmed to start first (rank 1), followed by LDO5, BUCK1 and BUCK4 (rank 2), andfinally LDO4 (rank 3).The 3 ms delay between each is clearly shown. RSTn signal goes HIGH after all rails are ON.
Figure 10. Auto turn-on VIN 0 to 5V for STPMIC1A configuration
UM2634Power on/off sequence
UM2634 - Rev 1 page 11/22
The following figure shows the same sequence after pressing the PONKEYn button.
Figure 11. Turn-on with PONKEYn for STPMIC1A configuration
The following figure shows the power-off sequence triggered via the STPMIC1 I²C interface. Following the reverseranking order for the turn-off sequence in the STPMIC1A configuration, LDO4 (rank 3) turns off first, followed byBUCK4, BUCK1 and LDO5 (rank 2), and finally BUCK3 (rank 1).The RSTn signal goes LOW when the STPMIC1 device starts the turn-off sequence.
Figure 12. Turn-off sequence for STPMIC1A configuration
The following figure shows a reset sequence triggered by the RESET button. The turn-off and turn-on sequencesfollow the converter rank numbers in the STPMIC1A configuration.The reset pin RSTn is bidirectional open-drain (internal pull-up), so the STPMIC1 maintains the reset lineasserted during the reset phase until the turn-on sequence is completed.
UM2634Power on/off sequence
UM2634 - Rev 1 page 12/22
Figure 13. Reset sequence for STPMIC1A configuration
Reset signal by push button
Reset signal maintainedby STPIMIC1
UM2634Power on/off sequence
UM2634 - Rev 1 page 13/22
5 Bill of materials
Table 6. Bill of materials
Item Q.ty Ref. Part / Value Description Manufacturer Order code
1 1 B1 0.05A 12VSWITCH TACTILESPST-NO,TactButton
C&K PTS645SM43SMTR92LFS
2 1 B2 0.05A 12VSWITCH TACTILESPST-NO,TactButton
C&K PTS645SM43SMTR92LFS
3 1 B3 0.05A 12VSWITCH TACTILESPST-NO,TactButton
C&K PTS645SM43SMTR92LFS
4 1 C7 100µF, 6.3V,±20%
CAP ALUM SMD,CAP_5.3x5.3mm
PanasonicElectronicComponents
EEE-0JA101WR
5 7C16, C18, C20,C22, C24, C30,C31
10µF, 10V CAP CER X5R0603, C-0603
MurataElectronics NorthAmerica
GRM188R61A106KE69D
6 5 C17, C19, C21,C23, C25 22µF, 6.3V CAP CER X5R
0603, C-0603
MurataElectronics NorthAmerica
GRM188R60J226MEA0
7 3 C26, C28, C37 1µF, 6.3V CAP CER X5R0402, C-0402
MurataElectronics NorthAmerica
GRM155R61E105KA12
8 7C27, C29, C32,C33, C34, C35,C36
4.7µF, 6.3V CAP CER X5R0402, C-0402
MurataElectronics NorthAmerica
GRM155R60J475ME47D
9 1 C38 220µF, 6.3V CAP CER X5R1206, C-1206
MurataElectronics NorthAmerica
GRM31CR60J227ME11L
10 1 C39 4.7µF, 16V CAP CER X5R0603, C-0603
MurataElectronics NorthAmerica
GRM188R61C475KE11D
11 1 D1 -MINI-MOLD CHIPLED (IVRANKREDUC, LED-0603
RohmSemiconductor SML-D12U1WT86
12 2 FB1, FB2 200Ω FERRITE BEAD0805 1LN, L-0805
MurataElectronics NorthAmerica
BLM21PG221SN1D
13 17
H1, H2, H5, H6,H7, H8, H9, H10,H11, H12, H13,H14, H15, H16,H17, H18, H20
- Header, 2-Pin,Header_2x_100mils
WurthElectronics Inc. 61300211121
14 1 H19 -CONN HEADER 6POS 2.54,Header_6x_100mils
WurthElectronics Inc. 61300611121
15 2 H21, J5 -CONN HEADER 3POS 2.54mm,Header_3x_100mils
WurthElectronics Inc. 61300311121
16 1 IC1 - Power ManagementIC, QFN44_5x6 ST STPMIC1A
UM2634Bill of materials
UM2634 - Rev 1 page 14/22
Item Q.ty Ref. Part / Value Description Manufacturer Order code
17 4 J1, J2, J3, J4 -CONN HEADER 3POS 2.54mm,Header_3x_100mils
WurthElectronics Inc. 61300311121
18 5 LX1, LX2, LX3,LX4, LX5
1.0µH, 3.5A,42mΩ
FIXED IND SMD,L-2512 Murata DFE252012P-1R0M=P2
19 1 R1 1K, 1/4W, ±5% RES SMD 0603,R-0603
RohmSemiconductor ESR03EZPJ102
20 1 R2 10K, 1/4W, ±5% RES SMD 0603,R-0603
RohmSemiconductor ESR03EZPJ103
21 3 R3, R4, R5 2K2, 1/10W,±1%
RES SMD 0603,R-0603
RohmSemiconductor KTR03EZPF2201
22 4J1, J2, J3, J4 J1,J2 - pin 1-2 J2,J3 - pin 2-3
- JUMPER SKTOPEN TOP BLACK Harwin Inc. M7582-46
UM2634Bill of materials
UM2634 - Rev 1 page 15/22
6 PCB layout
The following table shows the layer stack-up for the signals and power tracks.
Table 7. Four-layer Stack-UP
Layer Stack-up
Top Layer Component and signal
Mid Signal 1 GND
Mid Signal 2 POWER and GND
Bottom Layer Small signal and feedback
The following figures show the layouts of the various layers in the STEVAL-PMIC1K1 evaluation board.
Figure 14. STEVAL-PMIC1K1 assembly layer
Figure 15. STEVAL-PMIC1K1 top layer
UM2634PCB layout
UM2634 - Rev 1 page 16/22
Figure 16. STEVAL-PMIC1K1 mid layer 1
Figure 17. STEVAL-PMIC1K1 mid layer 2
Figure 18. STEVAL-PMIC1K1 bottom layer
UM2634PCB layout
UM2634 - Rev 1 page 17/22
Revision history
Table 8. Document revision history
Date Version Changes
12-Nov-2019 1 Initial release.
UM2634
UM2634 - Rev 1 page 18/22
Contents
1 PMIC evaluation board overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
1.1 STEVAL-PMIC1K1 board ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 STEVAL-PMIC1K1 output voltages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 STEVAL-PMIC1K1 interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3.1 Jumper configurations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3.2 User interface buttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Schematic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Board power supply setups. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
2.1 Single 3.6VIN to 5VIN power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 5VIN and external 3.3VIO power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 STPMIC1 configuration registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4 Power on/off sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
5 Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
6 PCB layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
UM2634Contents
UM2634 - Rev 1 page 19/22
List of figuresFigure 1. Evaluation board with STPMIC1APQR device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1Figure 2. J1, J4 LDO3 input source selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Figure 3. J2 VIO input source selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Figure 4. J3 PWR_SW input source selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Figure 5. J5 power control mode jumper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4Figure 6. STEVAL-PMIC1K1 board schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5Figure 7. STEVAL-PMIC1K1 power management IC schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6Figure 8. Jumper setup for single power supply 3.6VIN to 5VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7Figure 9. Jumper setup for single power supply 3.6VIN to 5VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Figure 10. Auto turn-on VIN 0 to 5V for STPMIC1A configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Figure 11. Turn-on with PONKEYn for STPMIC1A configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 12. Turn-off sequence for STPMIC1A configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 13. Reset sequence for STPMIC1A configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 14. STEVAL-PMIC1K1 assembly layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Figure 15. STEVAL-PMIC1K1 top layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Figure 16. STEVAL-PMIC1K1 mid layer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Figure 17. STEVAL-PMIC1K1 mid layer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Figure 18. STEVAL-PMIC1K1 bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
UM2634List of figures
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List of tablesTable 1. Evaluation board order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Table 2. Output voltage of each regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2Table 3. Jumper configuration for LDO3 input source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3Table 4. Default NVM data STPMIC1A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Table 5. Default output voltage configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Table 6. Bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Table 7. Four-layer Stack-UP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Table 8. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
UM2634List of tables
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