Power Issues in On-chip Interconnection Networks

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Power Issues in On-chip Interconnection Networks. Mojtaba Amiri Nov. 5, 2009. Why Interconnection Networks?. Interconnection Networks Issues. Performance, Reliability Power Consumption. Papers. - PowerPoint PPT Presentation

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Power Issues in On-chip Interconnection Networks

Mojtaba AmiriNov. 5, 2009

2ECE692 2009

Why Interconnection Networks?

3ECE692 2009

Interconnection Networks Issues

– Performance, Reliability– Power Consumption

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Papers

• PowerHerd: A distributed scheme for dynamic satisfying peak power constraints in interconnection networks

• Dynamic voltage scaling with links for power optimization of interconnection networks

By L. Shang, L.-S. Peh, and N. K. Jha

ECE, University of Princeton

PowerHerd: A Distributed Scheme for Dynamically Satisfying Peak-Power

Constraints in Interconnection Networks

By

L. Shang, L.-S. Peh, and N. K. JhaDepartment of Electrical Engineering

Princeton University

6ECE692 2009

Introduction (1)

• Problem • Peak-power constrains

• Solution• PowerHerd

– Distributed and run-time– Modified router

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Introduction (2)– An Example

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PoweHerd Router Architecture

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PoweHerd Router MechanismPLPB =PGPB/# Routers

Estimate PLPB Predict PLPB

Calculate Shared power

Negotiation with neighbors and share power

Update PLPB

Throttle switch

allocator

Update routing decision

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Dynamic Power Estimation

• Power dominators:– Input Buffer– Crossbar Switch– Link

Based on Switching activity,

Number,Coefficients from linear

regression

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Estimation Error

• Orion error 2-3% Total 10%

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Leakage Power Estimation

• Leakage Power is about 10%. (Critique)

Based on• Switching activity,• Number,• Coefficients from linear regression

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Dynamic Power Prediction

W around 4 3 Hardware Simplification

By shift and add

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Dynamic Power Sharing (Protocol)

TGPB/N

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Dynamic Power Sharing (2)

1/2

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Dynamic Power ThrottlingNear the local power budget Simple gating (Critique)

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Power-aware Routing

• Previous routing algorithms– Performance– Fault-tolerance

• This routing algorithm considers power consumption of neighbors– Low overhead

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Result Comparison-IdealMaxPower

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Result Comparison-StaticAllocPower

Global

Power

budget

136.3 W

27.3 W

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Effect of Power-Sharing Interval

Global

Power

budget

136.3 W

53.3W

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Effect of Local Power Constraints

PGPB = 136.3 W

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Different Topologies

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Summary

• PowerHerd– Distributed Scalable– Online (Dynamic) Efficient– Guarantee Peak-Power Constrain The Issue– Help other techniques

Dynamic Voltage Scaling with Links for Power Optimization of Interconnection

Networks

By

L. Shang, L.-S. Peh, and N. K. JhaDepartment of Electrical Engineering

Princeton University

25ECE692 2009

Introduction

• Power saving technique– Employs DVFS Links (the first attempt)

• How? Based on history of previous actions• Performance penalty– 2.5 throughput– 15.2 average latency

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DVFS Link

C= 5usn = .9

• Characteristics of a DVFS link– Transition time (100 link clock cycles)– Transition energy– Transition status– Transition step

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Communication Traffic Charc.

Link Utilization (LU)

Congestion

What is the Problem with this model?

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CTC- Input Buffer Utilization

Congestion

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Input Buffer Age

Congestion

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Prediction Policy

• LU & BU together is enough• DVFS based on two steps

• First Link Utilization• Second congestion

• Simple Implementation

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Hardware Implementation

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Effect of DVS on power-performance

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Effect of thresholds on power-performance

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Effect of DVFS links with varying Char.

Task

Duration

1ms

0.1 us

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Summary

• Appling DVFS to Interconnection networks• History-based DVFS (LU, BU)• Power saving HUGH!• First study

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Critiques to PoweHerd

• Consider static power 10% now is much more!

• Gate-level design for traffic throttling is not realistic.

• Completely Distributed; suggestion hybrid!

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Critiques to DVFS Link

• There is no 100% guarantee to find the optimum for History-Based Policy

• This method works because the link is supposed to be power dominator! Inconsistent with first paper.

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Comparisons of the Two Papers

PowerHerd DVFS Link

Target Peak Power Constrain Power Consumption

Performance Penalty Yes Yes

Power Technique Power –aware routing, Dynamic power throttling

DVFS

Improvement 100% guarantee 6 times saving

Inconsistent Assumptions(most power dominator)

Input Buffers Links