Short Pulse Reading for STT-RAM

transcript

fren@ee.ucla.edu

Background• STT-RAM

– Storage element: MTJ• Represents “0/1” by the configuration of magnetization direction

– Read/Write operations: CMOS circuits

• CMOS and MTJ variability are increasing – Resulting in more stringent constraints on CMOS design

Parallel Anti-parallel

Low RP - ”0” High RAP - ”1”

Ferro-magnetic

layers

• Sense the RMTJ (RAP / RP) through IREAD

– Without disturbing the cell (0% switching prob.)

• Two ways to get 0% switching probability– Low current reading (LCR)– Short pulse reading (SPR)

(2) Short Pulse Reading

(1) Low Current ReadingRead

Read Circuit Design

• JC scaling will eventually create difficulty for LCR

• How to implement SPR?– What is the circuit structure?

(2) Short Pulse Reading

(1) Low Current Reading

2 ways to get 0% switching prob.

Read Circuit Design

How to implement SPR?• When can we turn off sensing circuit?

– When a safe read margin (VMTJ-VREF > VOS_latch + NM) is established

– VOS_latch < 15 mV

• How fast that read margin can be established?

• The best SPR circuit should be able to establish the largest read margin with the least time.

• Current Sensing– Speed is limited by the IMTJ

• VMTJ is fixed, between VMTJ_P and VMTJ_AP

– VMTJ-VREF is limited

#1: Current-Mirror Sense Amp (CMSA)

6[1] D. Gogl, et al., JSSC, Vol. 40, No. 4, Apr. 2005[2] J.P. Kim, et al., VLSI, 2011[3] J. Kim, et al., JVLSI, 2011

• Current Sensing– Speed is limited by the IMTJ

• VMTJ is reverse to VMTJ

– Larger VMTJ-VREF

#2: Split-Path Sense Amp (SPSA)

7[1] S.O. Jing, et al., US Patent, Pub. No. US 2010/0321976 A1

-0.5 0 0.50

Voltage (V)

SMTJ,P

-SREF,P

SMTJ,AP

-SREF,AP

RMP = -29.8mV

• Body Voltage Sensing– Body-connected load is better

than diode connected load– Speed is no longer limited by

#3: Body-Voltage Sense Amp (BVSA)

8[My proposal]

• VMTJ is reverse to VMTJ

– Even larger VMTJ-VREF

– Benefiting from gain of the sense amp

-0.5 0 0.50

Voltage (V)

Vmtj-Vref, R/ RP

Vmtj-Vref, R/ RAP

RMP = -268mV

=303mV

+3σ -3σ

RMP RMAP

RM Definition• RMP = μ(VMTJ,P − VREF,P) + 3σ(VMTJ,P − VREF,P) should be < 0

• RMAP = μ(VMTJ,AP − VREF,AP) − 3σ(VMTJ,AP − VREF,AP) should be > 0

We compare 3 sensing circuits at ISO reading current:

•#1: Current-Mirror Sense Amp (CMSA)– Qualcomm design [VLSI’11]

•#2: Split-Path Sense Amp (SPSA)– Qualcomm design [US Patent 2010/0321976 A1]

•#3: Body-Voltage Sense Amp (BVSA)– UCLA proposal

to demonstrate the read margin and speed advantage of our approach

RM and performance Comparison

Currentsensing

Voltagesensing

Simulation Setup• MTJ

– Size: 40x100 nm

– RA = 9 Ω∙um2, TMR = 110%, Rp = 2.9 kΩ

– Iread,P ~ 50 uA, Iread,ap ~ 30 uA

– 5σ MTJ variation• 1 σRA = 4%, 1 σTMR = 5%

• CMOS– 65-nm– Process Variation

• Chip-to-chip + across chip local variation (ACLV)• Monte Carlo Run # = 5000

– Temp and VDD are kept the same in comparison

• room temp

• VDD = 1V

IMTJ Distribution

0 20 40 60 80 100 1200

Current (uA)

IMTJ,P

IMTJ,AP

(IMTJ,P

)=36.5uA(I

MTJ,P)=2.61uA

(IMTJ,AP

)=26.9uA(I

MTJ,AP)=2.08uA

0 20 40 60 80 100 1200

Current (uA)

IMTJ,P

IMTJ,AP

(IMTJ,P

)=49.1uA(I

MTJ,P)=3.19uA

(IMTJ,AP

)=31.4uA(I

MTJ,AP)=2.27uA

0 20 40 60 80 100 1200

Current (uA)

IMTJ,P

IMTJ,AP

(IMTJ,P

)=53.3uA(I

MTJ,P)=3.16uA

(IMTJ,AP

)=33.5uA(I

MTJ,AP)=2.17uA

(uA) CMSA SPSA BVSA

μ (IMTJ,P) 36.5 49.1 53.5

σ (IMTJ,P) 2.61 3.19 3.16

μ (IMTJ,AP) 26.9 31.4 33.5

σ (IMTJ,AP) 2.08 2.27 2.17

SMTJ − SREF Distribution

VBIASN VBIASN

VMTJVREF

SREFSMTJVBIASP VBIASP

-0.5 0 0.50

Voltage (V)

SMTJ,P

-SREF,P

SMTJ,AP

-SREF,AP

RMP = -38.3mV

=74.7mV

-0.5 0 0.50

Voltage (V)

cySPSA

SMTJ,P

-SREF,P

SMTJ,AP

-SREF,AP

RMP = -29.8mV

VMTJ and VREF Distribution

0 0.2 0.4 0.6 0.8 10

Voltage (V)

cyCMSA

VMTJ,P

VREF,P

VMTJ,AP

VREF,AP

RMP = -234mV

=277mV

0 0.2 0.4 0.6 0.8 10

Voltage (V)

VMTJ,P

VREF,P

VMTJ,AP

VREF,AP

RMP = -574mV

=382mV

0 0.2 0.4 0.6 0.8 10

Voltage (V)

VMTJ,P

VREF,P

VMTJ,AP

VREF,AP

RMP = -806mV

=680mV

After VMTJ and VREF are settledAfter VMTJ and VREF are settled

VMTJ − VREF Distribution and RM

(mV) CMSA SPSA BVSA

RMP −268 −596 −829

RMAP 303 432 696

-1 -0.5 0 0.5 10

Voltage (V)

cyCMSA

VMTJ,P

-VREF,P

VMTJ,AP

-VREF,APRM

P = -268mV

=303mV

-1 -0.5 0 0.5 10

Voltage (V)

VMTJ,P

-VREF,P

VMTJ,AP

-VREF,AP

RMP = -596mV

=432mV

-1 -0.5 0 0.5 10

Voltage (V)

VMTJ,P

-VREF,P

VMTJ,AP

-VREF,AP

RMP = -829mV

=696mV

After VMTJ and VREF are settledAfter VMTJ and VREF are settled

RM vs. Sensing Time (Pulse Width)

RM (mV)

CMSA SPSA BVSA

100 2.17 1.94 0.60

200 3.54 2.80 0.67

300 N/A 3.84 0.74

400 N/A 5.78 0.82

500 N/A N/A 0.93

600 N/A N/A 1.25

650 N/A N/A 1.58

700 N/A N/A N/A

Sensing time (ns) required to achieve a given RM

0.5 1 1.5 2 2.5 3 3.5 4 4.5 5-1000

Sensing Time (ns)

CMSA, R/ RP

CMSA, R/ RAP

SPSA, R/ RP

SPSA, R/ RAP

BVSA, R/ RP

BVSA, R/ RAP

Summary and Conclusions

Methodology:•Proposed body-voltage sense amp (BVSA) reading circuit is compared with two existing current-sense reading circuits. Read margin and sensing time are compared at the same reading current.

Observations:•Our circuit shows the biggest read margin

– > 400 mV improvement as compared CMSA– > 250 mV improvement as compared to SPSA

•Our circuit achieves high read margin with much shorter pulse width (sensing time)

Short Pulse Reading for STT-RAM

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