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1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)
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Page 1: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

1

Microprocessor-based Systems

Course 10 Design of Input/Output interfaces (continuation)

Page 2: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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USB – Universal Serial Bus

Goal: a communication standard for a wide range of

peripheral devices, connectable to a PC Mouse, keyboard, joy-stick – input devices Printer – output device Scanner, Digital camera, Webcam –

multimedia devices Memory-stick – storage devices

replaces traditional serial and parallel interfaces Solution:

multilayer protocol with master-slave functionality

Page 3: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Performance features

Very high speed Wide bandwidth (12 Mbs) PnP (Plag and Play) facilities One interface handle many devices in the same

time Many communication channels on the same

physical support Transmission modes adapted to different dataflow

types: sporadic data periodic data high volume of data

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Physical characteristics

Transmission on standard cable: 4 wires:

2 for power supply: Vcc (red), GND (brown) => 5V, 500mA

2 for data (blue and yellow ), twisted Cable length:

maximum 5 m extensible with HUBs until 30 m

Standard connectors: type “A” – for the computer (host or master) type “B” – for devices

Connectable during normal work (hot-swappable)

Page 5: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Physical topology of the USB (network)

Host (computer)Root Hub

Device

HubHub

Compound Device

Star topology

DeviceDeviceDevice

Device

Device

Device

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Device types:

“Host” (master) – usually a computer the device that controls the communication on the USB

network distributes network access rights to the other devices moditors the USB network topology

“Device” – peripheral device connected to the computer offers a given “functionality” for the host (ex: mouse,

printer, scanner, etc.) when it is connected the device gets a unique address from

the host the format of data depends on the type of the device information exchanged between the host and the device

may be: general information information specific for a given type of devices

Page 7: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Device types (cont.):

“Hub” – amplifying and branching device

“Compound Device” – contains a HUB and some devices every device has its own address

(including the HUB) “Composite Device” –

contains a number of functionalities but under a single address

Page 8: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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The USB protocol model the protocol is organized on three hierarchical

layers: USB bus interface layer – the physical layer

handles the physical transmission of data (on the cable)

USB device layer – assures the logical connection between the host and

the devices it is the operating system’s vision over the USB

interface Function layer –

assures the connection between the “client software” in the host and the “function” in the device

Page 9: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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The USB protocol model

Client software

System software

USB controller

Host

Function

Logical device

Bus interface

Physical connection

Logical connection

Device

Page 10: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Logical topology (layer 2)

Host

Logical Device

Logical Device

Logical Device

Logical Device

• Direct connections between the host and the logical devices

• the physical connections (including HUBs) are ignored

Page 11: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Application level topology (layer 3)

Client softwar

e

Function Functio

n

Function

Function

Host

Dispozitiv

Client softwar

e

Client softwar

e

Client softwar

e

Page 12: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Communication channels

Client software

Host

Device

Buffers

Channels (Pipes)Communication flows

EndpointsFunction

Page 13: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Communication channels communication channel: a logical connection

between a device and a software that runs on the host

a device may have a number of communication channels

the host allocates a given bandwidth for every channel according with: the type of the data transmission and the available bandwidth

Every channel ends with an endpoint, used to: configure the data channel address the channel

Page 14: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Endpoints

Endpoint: a part of a USB device: it is uniquely identified through a number ends a communication channel stores the parameters of a channel:

bus access frequency required bandwidth endpoint’s number behavior in case of an error maximum length of accepted packages transfer type transfer direction

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Endpoints

an USB device is a collection of endpoints every device have two predefined endpoints, one

for input and one for output, both on address 0; the other endpoints are not defined

the other endpoints are configured by the host, when the device is connected

the endpoints are for input or for output a communication channel is identified through:

device address, the endpoint number and the dataflow direction

Page 16: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Communication on the USB bus communication is made through frames of 1

millisecond (1000 cadre/s) a frame contains a number of transactions a given transfer may be performed through a

number of transactions Transfer types on the USB bus:

control transfer isochronous transfer, or periodic interrupt transfer or a-periodic bulk transfer or on blocks

Page 17: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Control transfer

initiated by the host, non-periodic used for configuring and dialog with the device a control transfer contains:

a “setup” transaction – through which the device is interrogated

zero ore more data transfers transactions a status transaction – to find the state of the device

the control transfer is performed on a standard channel present in every USB device

the standard channel is used for configuration and for device interrogation

through this channel the host configures all the other channels (including endpoints)

Page 18: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Control transfer

maximum dimension of the control packet may be 8, 16, 32 or 64 bytes

the “setup” packet has a fixed dimension of de 8 bytes

the device descriptor specifies the maximum accepted length for the data packets

the control transfers have lower priority than isochronous or interrupt transfers

at most 10% of a frame is allocated for control transfers, the rest is allocated for isochronous or interrupt transfers

the control transfer used “handshake” in order to guarantee the correctness of the transfer the erroneous packets are re-transmited

Page 19: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Isochronous transfer (periodical)

assures a guaranteed bandwidth for periodic transfers

the format is not specified by the USB standard; it depends on the type of the device, the content is interpreted only at the client software level

the transfer is continuous, it ends only on an explicit request

a reduced error detection mechanism, the erroneous frames are not re-transmitted

the transfer through an endpoint is made in a single direction; for bidirectional transfer two endpoints must be defined

Page 20: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Isochronous transfer (periodical)

the maximum dimension of a packet is 1023 bytes

if more isochronous devices are used in the same time the the packet dimension is divided accordingly

the system allocates 90% of the bandwidth for isochronous and interrupt transfers

every device will specify the required transfer rate, which may be between 1 and 216 , (one packet per several frames)

Page 21: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Interrupt transfers

used for sporadic, small data transfers examples: mouse, keyboard, multiple channel

devices maximum packet dimension: 64 bytes a channel has a guaranteed bandwidth assured

through the allocation of a frame portion during configuration, a minimum appearance

period is specified between 1-255 microseconds during configuration the system verifies if the

required bandwidth necessary for a given frequency can be assured

Page 22: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Bulk transfer

used for transferring blocks of data without time restrictions

transfers are non-periodical examples: printer, digital camera the transfer will use the maximum available

bandwidth the erroneous packets are re-transmitted maximum packet dimensions: 8,16, 32, or 64 pt.

USB1.1 or 512 for USB 2.0 the bandwidth is not guaranteed the priority is minimum

Page 23: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Communication on USB

Client softwareUSB Driver

Host Controller Driver

Host Controller

Transaction

Transfers

Data

Transactions

Packets

USB

USBD interfaceHCD interface

Hardware interface

Transaction listTransacti

ons

Page 24: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Components involved in the communication

Client software determines the type of the transfer for each

device it does not handle communication channels for communication uses the drivers offered by

the operating system USB driver (USBD)

handles the configuration and normal transfer requests received from the client software

establish and configure communication channels based on the received requests; some requests may be rejected because of bandwidth limitations

Page 25: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Components involved in the communication

Host controller’s driver (HCD) receives transfer requests and handles their

transmission puts the received data in the buffer checks the transmission limits (requests v.s

bandwidth) announce the end of the transmission

Transaction list contains the list of transactions in progress

Host controller transforms the waiting transactions in activities on

the bus handles the frames and send and receive packets

Page 26: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Parallel interface Transfer is made through a number of lines:

Data lines (ex: 8) – for data transmission Control lines – for synchronization and dataflow

control Features:

High speed Small distances Usually unidirectional transfers

Types of parallel transfers: a) without control signals b) asynchronous protocol without confirmation c) asynchronous protocol with confirmation (hand -

shaking)

Page 27: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Transfer typesa) Without control signals

- only data lines are used- useful for reading status lines or generating command signals- cannot be used for sequential data transfer – there are no signals for synchronization or flow control- examples: testing digital sensors, control of actuators

b) asynchronous protocol without confirmation- an extra control signal is used (besides data lines); it may be generated by the emitter or by the receiver - a sequence of data may be transmitted- the transmission speed is controlled by the device generating the control signal- there is no feedback signal (confirmation) from the other partner; the speed should be enough small to cover any possible delays; so the transmission is slow

Data Valid data Data Valid data RDY RQ

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Parallel transferc) Asynchronous protocol with confirmation (hand - shaking)

- two control signals are used: one from the emitter and one from the receiver- transmission with “feed-back”- it may be adapted to the variable speed of the emitter or receiver devices; the result is a higher speed- if the correlation between control signals is not good errors may occur

Data Valid data Data Valid data RDY RDY ACK ACK (a) (b) Data Data 1 Data 2 RDY ACK (c)

Correct Error

Error

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Parallel transfer

c) asynchronous protocol (hand - shaking), with inter-conditioning between control signals- solves the correct transmission of data- the control signals are inter-conditioned

Data RDY ACK

Page 30: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Parallel transfer

The I8255 circuit – controller for parallel transfers 3 data ports of 8 bits (A, B and C) Working modes:

Inputs Outputs Bidirectional transfer Port C divided in 2 in order to serve as control signals for

ports A and B A si B

Port PA0-7 Control A group A Data

D0-7 Amp ½ PC4-7 C ½ PC0-3

RD\ C WR\ Control Control

A0 block group B A1 Port

CS\ B PB0-7

Page 31: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Counter/Timer circuits Used for:

counting external events generate different frequencies

by dividing a base clock frequency

delaying signals (mono-stable)

generate periodic interrupts Specialized controller: I8253

3 counters of 16 bits different working modes

Use in a PC: to generate interrupts in

order to measure the time periodical memory refresh

cycles to generate simple sounds

Counter Out0 D0-7 Data 0 Clk0 amp Gate0 Counter Out1 RD\ 1 Clk1 WR\ Ctrl Gate1 CS\ block A0,1 Counter Out2 2 Clk2 Cmd Gate2 reg

Page 32: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Design of an Input/Output interface

Steps Define the functional block scheme select circuits for special interface functionalities (controllers) allocate addresses for registers from the I/O space establish the selection/decoding mode design circuits for selection and control.

Functional blocks: selection/decoding block Input/Output registers (ports) Command device Command register Status register Adaptation circuit for the peripheral device

Page 33: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Design of an Input/Output interface

Selection block: Role: Select the interface and the registers inside it Selection mode:

Total – all the address lines are considered (rarely used)

Partial – a limited number of address lines are used (most often used)

Linear – every address line is considered a selection lie (used for small, dedicated systems)

A9 A0 A O0 CS0R\

A8\ A1 B O1 A7 A2 C O2 A6 DEC. CS0W\

A5\ E\ A4 E\ A3 E O7 CS1R\ 5V 74138

AEN IOR\ CSI\ CS1W\

IOW\

Page 34: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Design of an Input/Output interface Register block:

Data registers/ports – for data transmission: for Input for Output

Control register(s) generate control signals to the peripheral device or determine the

working mode of the interface Status register(s):

show the state of the interface or of the device Data amplifier:

assures the proper fan-out Data bus IOR\ Dir 74LS245 Bidirectional data CSI\ CS\ amplifier Internal bus CS0W\ Stb 74LS374 CS0R\ G\ 74LS244 CS1R\ G\ 74LS244 CS\ G\ G\ Output R Input R Status R Output sign. Input sign. Status sign.

Page 35: 1 Microprocessor-based Systems Course 10 Design of Input/Output interfaces (continuation)

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Circuits specialized for different interfaces

Parallel interface controller PIO – parallel I/O: I8255

Serial interface controller SIO – serial I/O, or USART – universal serial

asynchronous receiver and transmitters: I8251 Counter/Timer controller:

CTC – counter/timer controller: I8253 Floppy disk controller: I8272 DMA controller: I8237 Interrupt controller: I8259A


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