5. MOSFET Transistrors & Circuits - II · 3/5/2016 · MOSFET Transistors & Circuits - II...

Small-Signal Model MOSFET Amplifiers High Frequency Modeling Frequency Response of CS Amplifier Summary

5. MOSFET Transistrors & Circuits - II

S. S. Dan and S. R. Zinka

Department of Electrical & Electronics EngineeringBITS Pilani, Hyderbad Campus

March 16, 2016

5. MOSFET Transistors & Circuits - II ECE/EEE/INSTR F244, Dept. of EEE, BITS Pilani Hyderabad Campus


Outline

1 Small-Signal Model

2 MOSFET Amplifiers

3 High Frequency Modeling

4 Frequency Response of CS Amplifier

5 Summary



Outline


2 MOSFET Amplifiers



5 Summary



LTI System



LTI System

Frequency domain

Time domain

LaplaceLaplace InverseLaplace

Do we study any LTI components in this course?



LTI System

Frequency domain

Time domain

LaplaceLaplace InverseLaplace

Do we study any LTI components in this course?



Taylor Series – Recap

-4

-3.5

-3

-2.5

-2

-1.5

-1

-0.5

0

0.5

1

1.5

2

-1.5 -1 -0.5 0 0.5 1 1.5

T4T7T11T16

log(1+x)

f (x) ≈ f (a) +f ′(a)

1!(x− a) +

f ′′(a)2!

(x− a)2 +f ′′′(a)

3!(x− a)3 + · · · .



Taylor Series – Recap

-4

-3.5

-3

-2.5

-2

-1.5

-1

-0.5

0

0.5

1

1.5

2

-1.5 -1 -0.5 0 0.5 1 1.5

T4T7T11T16

log(1+x)

f (x) ≈ f (a) +f ′(a)

1!(x− a) +

f ′′(a)2!

(x− a)2 +f ′′′(a)

3!(x− a)3 + · · · .



Symbol Convention – Recap

0t

iC

iC

IC

icIc

iC (t) = IC + ic (t) (1)

ic (t) = Ic sin ωt (2)

VCC, VEE, VDD, VSS, ICC, · · · (3)




0t

iC

iC

IC

icIc

iC (t) = IC + ic (t) (1)






0t

iC

iC

IC

icIc

iC (t) = IC + ic (t) (1)






0t

iC

iC

IC

icIc

iC (t) = IC + ic (t) (1)






0t

iC

iC

IC

icIc

iC (t) = IC + ic (t) (1)





Let’s Revisit Basic CS Amplifier ...

iD

vDS

RD

VDD

vgs+

vGS

VGS

+-

iD =12

kn (vGS −Vt)2 =

12

knv2OV

vDS = VDD − RDiD



Let’s Revisit Basic CS Amplifier ...

iD

vDS

RD

VDD

vgs+

vGS

VGS

+-

iD =12

kn (vGS −Vt)2 =

12

knv2OV

vDS = VDD − RDiD



Superimpose the AC Signal ...

The total instantaneous gate-to- source voltage, vGS = VGS + vgs, results in a total in-stantaneous drain current

iD =12

kn(VGS + vgs −Vt

)2

=12

kn (VGS −Vt)2︸︷︷︸

dc bias current

+ kn (VGS −Vt) vgs︸︷︷︸desired small signal current

+12

knv2gs︸︷︷︸

undesired small signal current

. (4)

So, to reduce non-linear distortion

12

knv2gs � kn (VGS −Vt) vgs

⇒ vgs� 2VOV . (5)

The above equation represents small-signal condition.

Equation (4) is nothing but Taylor series approximation right!





iD =12

kn(VGS + vgs −Vt

)2

=12


dc bias current


+12

knv2gs︸︷︷︸


. (4)


12


⇒ vgs� 2VOV . (5)







iD =12

kn(VGS + vgs −Vt

)2

=12


dc bias current


+12

knv2gs︸︷︷︸


. (4)


12


⇒ vgs� 2VOV . (5)







iD =12

kn(VGS + vgs −Vt

)2

=12


dc bias current


+12

knv2gs︸︷︷︸


. (4)


12


⇒ vgs� 2VOV . (5)







iD =12

kn(VGS + vgs −Vt

)2

=12


dc bias current


+12

knv2gs︸︷︷︸


. (4)


12


⇒ vgs� 2VOV . (5)







iD =12

kn(VGS + vgs −Vt

)2

=12


dc bias current


+12

knv2gs︸︷︷︸


. (4)


12


⇒ vgs� 2VOV . (5)







iD =12

kn(VGS + vgs −Vt

)2

=12


dc bias current


+12

knv2gs︸︷︷︸


. (4)


12


⇒ vgs� 2VOV . (5)





The Transconductance Parameter (gm)

If the small-signal condition is satisfied,

iD ≈12

kn (VGS −Vt)2 + kn (VGS −Vt) vgs = ID + id. (6)

So, the transconductance parameter is given as

gm =∆iD

∆vGS=

idvgs

= knVOV . (7)





iD ≈12



gm =∆iD

∆vGS=

idvgs

= knVOV . (7)





iD ≈12



gm =∆iD

∆vGS=

idvgs

= knVOV . (7)





iD ≈12



gm =∆iD

∆vGS=

idvgs

= knVOV . (7)



The Voltage Gain

Total instantaneous voltage is given by

vDS = VDD − RDiD.

Under the small-signal condition, we have

vDS = VDD − RD (ID + id) = VDS − RDid︸︷︷︸vds

.

So, the small-signal voltage gain is given by

Av =vdsvgs

= −RDidvgs

= −RDgmvgs

vgs= −gmRD. (8)



The Voltage Gain


vDS = VDD − RDiD.



.


Av =vdsvgs

= −RDidvgs

= −RDgmvgs

vgs= −gmRD. (8)



The Voltage Gain


vDS = VDD − RDiD.



.


Av =vdsvgs

= −RDidvgs

= −RDgmvgs

vgs= −gmRD. (8)



The Voltage Gain


vDS = VDD − RDiD.



.


Av =vdsvgs

= −RDidvgs

= −RDgmvgs

vgs= −gmRD. (8)



Separating the DC Analysis and the Signal Analysis

vGS

(gmRD ) V

0

vDSmax

VDS

min vGSmax - Vt

vDS

0

vGS

VGS

V

t

t

(VGS - Vt)V2 2

VDD

vDS

<<

<

<



Separating the DC Analysis and the Signal Analysis

vGS

(gmRD ) V

0

vDSmax

VDS

min vGSmax - Vt

vDS

0

vGS

VGS

V

t

t

(VGS - Vt)V2 2

VDD

vDS

<<

<

<



Why Small-Signal Models?

VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-

Do we need to repeat this Taylor series analysis for each and every type of MOSFETamplifiers?




VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-





VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-




Differential (Small-Signal) Model of MOSFET




+

+

How small-signal current, id, is related to small-signal voltages, vgs and vds?




+

+





+

+





Since in saturation mode

iD =12

kn (vGS −Vt)2 (1 + λvDS) ,

using partial differential equation, we get

∂iD∂vGS

∣∣∣∣vGS=VGS

= kn (VGS −Vt) (1 + λvDS) = gm

and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .

Using the theory of partial differentiation,

∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds = gmvgs +vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS


and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds = gmvgs +vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS

=

kn (VGS −Vt) (1 + λvDS) = gm

and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds = gmvgs +vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS

= kn (VGS −Vt) (1 + λvDS)

= gm

and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds = gmvgs +vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS


and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds = gmvgs +vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS


and∂iD

∂vDS

∣∣∣∣vDS=VDS

=

12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds = gmvgs +vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS


and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ

= r−1o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds = gmvgs +vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS


and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds = gmvgs +vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS


and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =

∂iD∂vGS

∆vGS +∂iD

∂vDS∆vDS =

∂iD∂vGS

vgs +∂iD

∂vDSvds = gmvgs +

vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS


and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =

∂iD∂vGS

vgs +∂iD

∂vDSvds = gmvgs +

vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS


and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds

= gmvgs +vdsr0

. (9)





iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS


and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds = gmvgs +vdsr0

. (9)



So, Small-Signal Equivalent-Circuit Model is ...

G D

S

rovgs vgsgm

+

-

ig

is

id

ig = 0

id = is = gmvgs +vdsr0




G D

S

rovgs vgsgm

+

-

ig

is

id

ig = 0





G D

S

rovgs vgsgm

+

-

ig

is

id

ig = 0





G D

S

rovgs vgsgm

+

-

ig

is

id

ig = 0




Physical Interpretation of gm and ro




Triode Saturation

0

Slope

VOV

=1ro

vDS-VA = 1/

iD

-




Triode Saturation

0

Slope

VOV

=1ro

vDS-VA = 1/

iD

-

vDS vGS –Vtn

vGS

vOV

Vtn

iD

0

0

= gmSlope



The T Equivalent-Circuit Model ... Neglecting ro




G D

S

is

ig = 0 id

vgs gmvgs

+

-




G D

S

is

ig = 0 id

vgs gmvgs

G D

S

is

ig = 0

id

vgs

gmvgs

gmvgs

X

+

-

+

-




gmvgs

G D

S

is

ig = 0 id

vgs gmvgs

X

G D

S

is

ig = 0

id

vgs

gmvgs

gmvgs

X

G D

S

is

id

vgs gmvgs

ig = 0

+

-

+

-

+

-




is

ig = 0

id

vgs

gmvgs

G D

S

is

ig = 0 id

vgs gmvgs

gmvgs

X

G D

S

is

ig = 0

id

vgs

gmvgs

gmvgs

X

G D

S

is

id

vgs gmvgs

1/gm

ig = 0

+

-

+

-

+

-

+

-



The T Equivalent-Circuit Model ... Including ro




ro

g

G

S

D

m

1/gm

vgs

vgs

+

-

ro

1 i

G

S

D

i

1/gm

+



Using Small-Signal Model for Circuit Analysis

DC Analysis:

First of all, external capacitors are open circuited and inductors are short circuited.

AC voltage sources are replaced by short circuits and AC current sources are replacedby open circuits.

Perform DC analysis on the rest of the circuit to find DC operating point (i.e.,(VGS, VDS, ID)) and calculate gm and ro at that operating point.

AC Analysis:

Once DC analysis is done, DC voltage sources are replaced by short circuits and DCcurrent sources are replaced by open circuits.

All external capacitors are short circuited and inductors are open circuited.

Replace MOSFET with its small-signal circuit model.




DC Analysis:




AC Analysis:







DC Analysis:




AC Analysis:







DC Analysis:




AC Analysis:







DC Analysis:




AC Analysis:







DC Analysis:




AC Analysis:







DC Analysis:




AC Analysis:







DC Analysis:




AC Analysis:







DC Analysis:




AC Analysis:






DC & AC Analyses – Example

VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-



DC & AC Analyses – Example

VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-



DC Analysis

VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-



AC Analysis

viRo

ii 0

Rin

vgs = vi

vd

(0 V)

VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-

(0 V)

+



AC Analysis ... Cont’d

RG

S

Rsig

vsig

ig= 0 Gii

gmvgs

Rin= RG Ro = RD ro

vi vgs ro RD

D

RL

vo = gm vgs (RD RL ro)

+-

+

Rin = RG

Rout = RD‖ro

Gv = − RG

RG + Rsig× gm (RD‖RL‖ro)




RG

S

Rsig

vsig

ig= 0 Gii

gmvgs

Rin= RG Ro = RD ro

vi vgs ro RD

D

RL


+-

+

Rin = RG

Rout = RD‖ro

Gv = − RG





RG

S

Rsig

vsig

ig= 0 Gii

gmvgs

Rin= RG Ro = RD ro

vi vgs ro RD

D

RL


+-

+

Rin = RG

Rout = RD‖ro

Gv = − RG





RG

S

Rsig

vsig

ig= 0 Gii

gmvgs

Rin= RG Ro = RD ro

vi vgs ro RD

D

RL


+-

+

Rin = RG

Rout = RD‖ro

Gv = − RG





RG

S

Rsig

vsig

ig= 0 Gii

gmvgs

Rin= RG Ro = RD ro

vi vgs ro RD

D

RL


+-

+

Rin = RG

Rout = RD‖ro

Gv = − RG




Outline


2 MOSFET Amplifiers



5 Summary



Basic Configurations (Stripped Down Versions)

Common Source (CS) Common Gate (CG)

Common Drain (CD)

vo

vi

RL

+- +

RDvi

vo+-

+ RD vo

vi +-

+





Common Drain (CD)

vo

vi

RL

+- +

RDvi

vo+-

+ RD vo

vi +-

+



Various Definitions of Gain – Recap

+vi

+

vo

+

R0

RiAvovi+vs RL

RSii io

Avo =vo

vI

∣∣∣∣RL→∞

Av = AvoRL

RL + Ro

Gv =vo

vs= Avo

(Ri

Ri + RS

)(RL

RL + Ro

)



Various Definitions of Gain – Recap

+vi

+

vo

+

R0

RiAvovi+vs RL

RSii io

Avo =vo

vI

∣∣∣∣RL→∞

Av = AvoRL

RL + Ro

Gv =vo

vs= Avo

(Ri

Ri + RS

)(RL

RL + Ro

)



First Let’s Analyze CS Amplifier ...



1. The Common-Source (CS) Amplifier

iD

vDS

RD

VDD

vgs+

vGS

VGS

+-



1. The Common-Source (CS) Amplifier

iD

vDS

RD

VDD

vgs+

vGS

VGS

+-



1. The Common-Source (CS) Amplifier – AC Analysis

Rin

vivo

Ro

vsig

Rsig

RD+-

+

+



1. The Common-Source (CS) Amplifier – AC Analysis

vovgs= vi gmvgsvsig

Rsig

RDro

+

+-

+

Rin

vivo

Ro

vsig

Rsig

RD+-

+

+



1. The Common-Source (CS) Amplifier ... Ri

vo

Rin

vgs= vi gmvgsvsig

Rsig

RDro

+

+-

+

=

Obviously,Ri = ∞. (10)




vo

Rin

vgs= vi gmvgsvsig

Rsig

RDro

+

+-

+

=





vo

Rin

vgs= vi gmvgsvsig

Rsig

RDro

+

+-

+

=




1. The Common-Source (CS) Amplifier ... Ro

vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=

The output resistance Ro is the resistance seen looking back into the output terminalwith vi set to zero. So,

Ro = RD ‖ ro ≈ RD. (11)




vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=


Ro = RD ‖ ro ≈ RD. (11)




vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=

The output resistance Ro is the resistance seen looking back into the output terminalwith vi set to zero.

So,

Ro = RD ‖ ro ≈ RD. (11)




vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=


Ro = RD ‖ ro ≈ RD. (11)



1. The Common-Source (CS) Amplifier ... Avo

vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=

Since vo = −gmvgs (ro ‖ RD), and vi = vgs,

Avo = −gm (ro ‖ RD) ≈ −gmRD. (12)




vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=


Avo = −gm (ro ‖ RD) ≈ −gmRD. (12)




vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=


Avo = −gm (ro ‖ RD) ≈ −gmRD. (12)



1. The Common-Source (CS) Amplifier ... Av and Gv

vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=

When load resistance RL is attached to the output, overall impedance seen by the sourcegmvgs is (ro ‖ RD ‖ RL).So,

Av = −gm (ro ‖ RD ‖ RL) . (13)

Since Ri → ∞,

Gv = Av = −gm (ro ‖ RD ‖ RL) . (14)




vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=


Av = −gm (ro ‖ RD ‖ RL) . (13)

Since Ri → ∞,

Gv = Av = −gm (ro ‖ RD ‖ RL) . (14)




vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=

When load resistance RL is attached to the output, overall impedance seen by the sourcegmvgs is (ro ‖ RD ‖ RL).

So,

Av = −gm (ro ‖ RD ‖ RL) . (13)

Since Ri → ∞,

Gv = Av = −gm (ro ‖ RD ‖ RL) . (14)




vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=


Av = −gm (ro ‖ RD ‖ RL) . (13)

Since Ri → ∞,

Gv = Av = −gm (ro ‖ RD ‖ RL) . (14)




vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=


Av = −gm (ro ‖ RD ‖ RL) . (13)

Since Ri → ∞,

Gv = Av = −gm (ro ‖ RD ‖ RL) . (14)




vo

Rin

vgs= vi gmvgs

Ro=RD|| ro

vsig

Rsig

RDro

+

+-

+

=


Av = −gm (ro ‖ RD ‖ RL) . (13)

Since Ri → ∞,

Gv = Av = −gm (ro ‖ RD ‖ RL) . (14)



Now ... Common Gate (CG) Amplifier ...



2. The Common Gate Amplifier

Rin

vi

Rsig

vsig

voRD

Ro+-

+

+

In the right hand side of the above figure, the effect of ro is neglected.




Rin

vi

Rin

vivsig

Rsig

Rsigvsig Ro= RD

vo voRD

G

D

RD

1/gm

1/gm

Ro

i

iS+

-

+

+-

+

+

+

=





Rin

vi

Rin

vivsig

Rsig

Rsigvsig Ro= RD

vo voRD

G

D

RD

1/gm

1/gm

Ro

i

iS+

-

+

+-

+

+

+

=




2. The Common Gate Amplifier ... Ri

Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=

Ri = 1/gm (15)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=

Ri = 1/gm (15)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=

Ri = 1/gm (15)



2. The Common Gate Amplifier ... Ro

Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=

Ro = RD (16)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=

Ro = RD (16)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=

Ro = RD (16)



2. The Common Gate Amplifier ... Avo

Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=

Since i = gmvgs, vo = −gmvgsRD. Also, input voltage is vi = vsg = −vgs. So, we get

Avo = gmRD. (17)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=


Avo = gmRD. (17)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=

Since i = gmvgs, vo = −gmvgsRD.

Also, input voltage is vi = vsg = −vgs. So, we get

Avo = gmRD. (17)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=

Since i = gmvgs, vo = −gmvgsRD. Also, input voltage is vi = vsg = −vgs.

So, we get

Avo = gmRD. (17)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=


Avo = gmRD. (17)



2. The Common Gate Amplifier ... Av and Gv

Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=

Similar to the previous configurations

Av = gm (RD ‖ RL) . (18)

However, Gv is given by

Gv =1/gm

Rsig + 1/gmAv. (19)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=


Av = gm (RD ‖ RL) . (18)


Gv =1/gm

Rsig + 1/gmAv. (19)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=


Av = gm (RD ‖ RL) . (18)


Gv =1/gm

Rsig + 1/gmAv. (19)




Rin

vivsig

RsigRo= RD

voRD

G

D

1/gm

1/gm

i

iS

+

+-

+

=


Av = gm (RD ‖ RL) . (18)


Gv =1/gm

Rsig + 1/gmAv. (19)



Next, Common Drain (CD) Amplifier / Source Follower ...



Need For Voltage Buffers - Recap

sigR =1 MΩ

vsig=1VRL

1 kΩ+

Rsig=1 M

vsig=1V v 1 mVRL

1 k

Ω

Ω o~

++

Rin very large

Ro=100

RL1 k vo~ 0.9V

~~1VAvo=1

vsig=1V

sigR =1 MΩΩ

Ω+

+



Need For Voltage Buffers - Recap

sigR =1 MΩ

vsig=1VRL

1 kΩ+

Rsig=1 M

vsig=1V v 1 mVRL

1 k

Ω

Ω o~

++

Rin very large

Ro=100

RL1 k vo~ 0.9V

~~1VAvo=1

vsig=1V

sigR =1 MΩΩ

Ω+

+



3. The Common-Drain Amplifier or Source Follower

RoRin

vi

vo

vsig

Rsig

RL

+-

+

+




RoRin

vi

vo

vsig

Rsig

RL

+-

+

+

RL

ro

vo

vi gm1 i

i

vsig

Rsig 0

+-

+

+




RoRin

vi

vo

vsig

Rsig

RL

+-

+

+

RL

ro

vo

vi gm1 i

i

vsig

Rsig 0

+-

+

+

RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =



3. The Common-Drain Amplifier ... Ri

RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =

From the above figure,Ri = ∞. (20)




RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =





RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =




3. The Common-Drain Amplifier ... Ro

RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =

Excluding RL (i.e., RL → ∞), and setting vi = 0 (i.e., by grounding the gate), we get

R0 = 1/gm. (21)




RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =


R0 = 1/gm. (21)




RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =


R0 = 1/gm. (21)



3. The Common-Drain Amplifier ... Avo

RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =

Excluding RL (i.e., RL → ∞), we get

Av0 = 1. (22)




RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =


Av0 = 1. (22)




RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =


Av0 = 1. (22)



3. The Common-Drain Amplifier ... Av and Gv

RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =

If we include RL, we get vo = viRL

RL+1/gm.So,

Av =RL

RL + 1/gm. (23)

Since Ri → ∞, we have Gv = Av.




RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =


RL+1/gm.So,

Av =RL

RL + 1/gm. (23)





RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =


RL+1/gm.

So,

Av =RL

RL + 1/gm. (23)





RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =


RL+1/gm.So,

Av =RL

RL + 1/gm. (23)





RL

Ro=

vo

vi

gm1

gm1

i

i

vsig

Rsig 0

+-

+

+

Rin =


RL+1/gm.So,

Av =RL

RL + 1/gm. (23)




Finally, CS Amplifier with a Source Resistance ...



4. The CS Amplifier with a Source Resistance




Rin

vivsig

Rsig

voRDRs

Ro

+-

+

+

In the above figure, the effect of ro is neglected.




vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

Rin

vivsig

Rsig

voRDRs

Ro

+-

+

+

+

+

+

Rin =





vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

Rin

vivsig

Rsig

voRDRs

Ro

+-

+

+

+

+

+

Rin =




4. CS Amplifier with a Source Resistance ... Ri

vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =

Again, from the above figure,Ri = ∞. (24)




vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =





vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =




4. CS Amplifier with a Source Resistance ... Ro

vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =

When vi = vsig = 0, i = 0. So,

Ro = RD. (25)




vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =


Ro = RD. (25)




vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =


Ro = RD. (25)



4. CS Amplifier with a Source Resistance ... Avo

vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =

Since i = vi1/gm+RS

, and vo = −iRD,

Avo = −gmRD

1 + gmRS. (26)




vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =

Since i = vi1/gm+RS

, and vo = −iRD,

Avo = −gmRD

1 + gmRS. (26)




vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =

Since i = vi1/gm+RS

, and vo = −iRD,

Avo = −gmRD

1 + gmRS. (26)



4. CS Amplifier with a Source Resistance ... Av and Gv

vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =

Av can be obtained simply by replacing RD by (RD ‖ RL). So,

Av = − gm (RD ‖ RL)

1 + gmRS. (27)

Also, since vi = vsig, Gv = Av.




vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =



1 + gmRS. (27)





vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =



1 + gmRS. (27)




4. CS Amplifier with a Source Resistance ... Why RS?

vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =

�

�RS introduces negative feedback, which provides bias stabilization and improves the

performance of the amplifier.




vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =

�






vgs

vivsig

Rsig

Ro=RD

0vo

RD

Rs

G

D

S

i

i

gm1

+-

+

+

+

Rin =

�





4. CS Amplifier with a Source Resistance ***

Since the resistor Rs is introducing negative feedback, let’s use the concept offeedback to understand CS amplifier with source resistance better!!




Since the resistor Rs is introducing negative feedback, let’s use the concept offeedback to understand CS amplifier with source resistance better!!



Feedback – Recap

Source LoadA

β

xs xi

xf

xo

+−

β =xf

x0

xo

xs=

A1 + Aβ



Feedback – Recap

Source LoadA

β

xs xi

xf

xo

+−

β =xf

x0

xo

xs=

A1 + Aβ



Amplifiers – Recap



Amplifiers – Recap

+vi

+

vo

+

R0

RiAvovi

ii io

vi

+

vo

+

R0RiAisii

ii io

+vi

+

vo

+

R0

RiRmii

ii io

vi

+

vo

+

R0RiGmvi

ii io

Voltage

Current

Transconductance

Transresistance







+

−

vgsgmvgs




+

−

vgsgmvgs

+

−

vs+

−

vf




+

−

vsg'mvs

whereg′m =

gm

1 + gmRs. (28)




+

−

vsg'mvs

whereg′m =

gm

1 + gmRs. (28)




+

−

vsg'mvs

whereg′m =

gm

1 + gmRs. (28)




+

−

vsg'mvgs

RD

So,vo

vs= −g′mRD = − gm

1 + gmRsRD =

−gmRD1 + gmRs

. (29)




+

−

vsg'mvgs

RD

So,vo


1 + gmRsRD =

−gmRD1 + gmRs

. (29)




+

−

vsg'mvgs

RD

So,vo


1 + gmRsRD =

−gmRD1 + gmRs

. (29)



MOSFET Amplifiers – Summary

Type Ri Ro Avo Av Gv

CS ∞ RD −gmRD −gm (RD ‖ RL) −gm (RD ‖ RL)

CG 1/gm RD gmRD gm (RD ‖ RL)RD‖RL

Rsig+1/gm

CD ∞ 1/gm 1 RLRL+1/gm

RLRL+1/gm

CS with Rs ∞ RD − gmRD1+gmRs

− gm(RD‖RL)1+gmRs








Rsig+1/gm


RLRL+1/gm






Outline


2 MOSFET Amplifiers



5 Summary



MOSFET in Saturation Mode

Oxide (SiO2)

Gate electrode

Depletion region

n+

p-type substrate

n+

S G D

vGS

B

+

-

--------------------- - - - - - -

- - - ------ - -

- - - - - - - - - ---------------------- -

- -

--

-- - - -

--- - - -

-

vDS+

-

iD



MOSFET in Saturation Mode

Oxide (SiO2)

Gate electrode

Depletion region

n+

p-type substrate

n+

S G D

vGS

B

+

-

--------------------- - - - - - -

- - - ------ - -

- - - - - - - - - ---------------------- -

- -

--

-- - - -

--- - - -

-

vDS+

-

iD



The MOSFET Internal Capacitances









The SS Circuit Model with Internal Capacitances




Vbs Csb

S B

Cdb

Vbs

Cgd

Cgsgmb

ro

G D

VgsVgsgm

_

+

_

+




Vbs Csb

S B

Cdb

Vbs

Cgd

Cgsgmb

ro

G D

VgsVgsgm

_

+

_

+

CdbVgs

Cgd

Cgs gm ro

G D

Vgs

S

_

+




Vbs Csb

S B

Cdb

Vbs

Cgd

Cgsgmb

ro

G D

VgsVgsgm

_

+

_

+

CdbVgs

Cgd

Cgs gm ro

G D

Vgs

S

_

+

VgsVgs

Cgd

Cgs gm ro

G D

S

_

+



The MOSFET Unity-Gain Frequency (fT)

A figure of merit for the high-frequency operation of the MOSFET as anamplifier is the unity-gain frequency, fT , also known as the transition

frequency, which gives rise to the subscript T.

This is defined as the frequency at which the short-circuit current-gain of thecommon-source configuration becomes unity.



















Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+

Applying KCL at drain node gives,

IO = gmVgs +Vdsro− sCgdVgd = gmVgs +

Vdsro− sCgdVgs = gmVgs − sCgdVgs ≈ gmVgs.

Since Ii = sCgsVgs + sCgdVgd = sCgsVgs + sCgdVgs,

Io

Ii=

gm

s(Cgs + Cgd

) . (30)

Thus unity-gain frequency, fT , at which |Io/Ii| = 1 is

fT =1

2π

gm

Cgs + Cds. (31)




Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+





Io

Ii=

gm

s(Cgs + Cgd

) . (30)


fT =1

2π

gm

Cgs + Cds. (31)




Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+


IO = gmVgs +Vdsro− sCgdVgd

= gmVgs +Vdsro− sCgdVgs = gmVgs − sCgdVgs ≈ gmVgs.


Io

Ii=

gm

s(Cgs + Cgd

) . (30)


fT =1

2π

gm

Cgs + Cds. (31)




Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+



Vdsro− sCgdVgs

= gmVgs − sCgdVgs ≈ gmVgs.


Io

Ii=

gm

s(Cgs + Cgd

) . (30)


fT =1

2π

gm

Cgs + Cds. (31)




Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+



Vdsro− sCgdVgs = gmVgs − sCgdVgs

≈ gmVgs.


Io

Ii=

gm

s(Cgs + Cgd

) . (30)


fT =1

2π

gm

Cgs + Cds. (31)




Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+





Io

Ii=

gm

s(Cgs + Cgd

) . (30)


fT =1

2π

gm

Cgs + Cds. (31)




Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+





Io

Ii=

gm

s(Cgs + Cgd

) . (30)


fT =1

2π

gm

Cgs + Cds. (31)




Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+





Io

Ii=

gm

s(Cgs + Cgd

) . (30)


fT =1

2π

gm

Cgs + Cds. (31)




Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+





Io

Ii=

gm

s(Cgs + Cgd

) . (30)


fT =1

2π

gm

Cgs + Cds. (31)




Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+





Io

Ii=

gm

s(Cgs + Cgd

) . (30)


fT =1

2π

gm

Cgs + Cds. (31)



The MOSFET Unity-Gain Frequency (fT) ***

Vgsgm ro

Io

Ii Vgs Cgs_

+

From the above diagram, input voltage Vgs is

Vgs = Ii1

jωCeq= Ii

1jω(Cgs + Cgd

)because gmR′L = 0 (since RL = 0). So,

Io = gmVgs = gmIi1

jω(Cgs + Cgd

) .

Finally, we getIo

Ii=

gm

jω(Cgs + Cgd

) . (32)

The above equation is nothing but equation (30) given in the previous slide.




Vgsgm ro

Io

Ii Vgs Cgs_

+


Vgs = Ii1

jωCeq= Ii

1jω(Cgs + Cgd


Io = gmVgs = gmIi1

jω(Cgs + Cgd

) .

Finally, we getIo

Ii=

gm

jω(Cgs + Cgd

) . (32)

The above equation is nothing but equation (30) given in the previous slide.



Outline


2 MOSFET Amplifiers



5 Summary



Frequency Response of CS Amplifier

VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-




VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-




Vo(dB)

Low-frequencyband

ViMidband

All capacitances can be neglected

High-frequency band

Gain falls offdue to the effectof Ci , CSand Co

3 dB

20 log |AM| (dB)

fL fH f (Hz)

Gain falls offdue to the internalcapacitive effectsof the MOSFET




Vo(dB)

Low-frequencyband

ViMidband


High-frequency band


3 dB

20 log |AM| (dB)

fL fH f (Hz)




Low Frequency Analysis

Vo(dB)

Low-frequencyband

ViMidband


High-frequency band


3 dB

20 log |AM| (dB)

fL fH f (Hz)




Low Frequency Analysis

Vo(dB)

Low-frequencyband

ViMidband


High-frequency band


3 dB

20 log |AM| (dB)

fL fH f (Hz)




Lower Cutoff Frequency – fL

i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o

vi = vsig ×RG

Rsig + RG + 1sCc1

i =vi

1gm

+ 1sCs

v′o = −i[

RD ‖(

RL +1

sCc2

)]vo = v′o ×

RL

RL +1

sCc2




i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o

vi = vsig ×RG

Rsig + RG + 1sCc1

i =vi

1gm

+ 1sCs

v′o = −i[

RD ‖(

RL +1

sCc2

)]vo = v′o ×

RL

RL +1

sCc2




i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o

vi = vsig ×RG

Rsig + RG + 1sCc1

i =vi

1gm

+ 1sCs

v′o = −i[

RD ‖(

RL +1

sCc2

)]vo = v′o ×

RL

RL +1

sCc2




i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o

vi = vsig ×RG

Rsig + RG + 1sCc1

i =vi

1gm

+ 1sCs

v′o = −i[

RD ‖(

RL +1

sCc2

)]vo = v′o ×

RL

RL +1

sCc2




i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o

Clubbing all the equation given in the previous slide gives,

vo

vsig=

−RL

RL +1

sCc2

[RD ‖

(RL +

1sCc2

)]1

1gm

+ 1sCs

RG

Rsig + RG + 1sCc1

=−gmRLRGRD

(RD + RL)(Rsig + RG

) sCC2 (RD + RL)

1 + sCc2 (RD + RL)

s Csgm

1 + s Csgm

sCC1(Rsig + RG

)1 + sCc1

(Rsig + RG

)




i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o


vo

vsig=

−RL

RL +1

sCc2

[RD ‖

(RL +

1sCc2

)]1

1gm

+ 1sCs

RG

Rsig + RG + 1sCc1

=−gmRLRGRD

(RD + RL)(Rsig + RG

) sCC2 (RD + RL)

1 + sCc2 (RD + RL)

s Csgm

1 + s Csgm

sCC1(Rsig + RG

)1 + sCc1

(Rsig + RG

)




i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o


vo

vsig=

−RL

RL +1

sCc2

[RD ‖

(RL +

1sCc2

)]1

1gm

+ 1sCs

RG

Rsig + RG + 1sCc1

=−gmRLRGRD

(RD + RL)(Rsig + RG

) sCC2 (RD + RL)

1 + sCc2 (RD + RL)

s Csgm

1 + s Csgm

sCC1(Rsig + RG

)1 + sCc1

(Rsig + RG

)




i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o


vo

vsig=

−RL

RL +1

sCc2

[RD ‖

(RL +

1sCc2

)]1

1gm

+ 1sCs

RG

Rsig + RG + 1sCc1

=−gmRLRGRD

(RD + RL)(Rsig + RG

) sCC2 (RD + RL)

1 + sCc2 (RD + RL)

s Csgm

1 + s Csgm

sCC1(Rsig + RG

)1 + sCc1

(Rsig + RG

)




i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o


vo

vsig=

−RL

RL +1

sCc2

[RD ‖

(RL +

1sCc2

)]1

1gm

+ 1sCs

RG

Rsig + RG + 1sCc1

=−gmRLRGRD

(RD + RL)(Rsig + RG

) sCC2 (RD + RL)

1 + sCc2 (RD + RL)

s Csgm

1 + s Csgm

sCC1(Rsig + RG

)1 + sCc1

(Rsig + RG

)




i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o


vo

vsig=

−RL

RL +1

sCc2

[RD ‖

(RL +

1sCc2

)]1

1gm

+ 1sCs

RG

Rsig + RG + 1sCc1

=−gmRLRGRD

(RD + RL)(Rsig + RG

) sCC2 (RD + RL)

1 + sCc2 (RD + RL)

s Csgm

1 + s Csgm

sCC1(Rsig + RG

)1 + sCc1

(Rsig + RG

)5. MOSFET Transistors & Circuits - II ECE/EEE/INSTR F244, Dept. of EEE, BITS Pilani Hyderabad Campus



VoVsig

(dB)

f (Hz)(log scale)

20 dB/decade

fL

20 log AM

40 dB/decade

60 dB/decade

0fP1 fP3 fP2




VoVsig

(dB)

f (Hz)(log scale)

20 dB/decade

fL

20 log AM

40 dB/decade

60 dB/decade

0fP1 fP3 fP2



High Frequency Analysis

Vo(dB)

Low-frequencyband

ViMidband


High-frequency band


3 dB

20 log |AM| (dB)

fL fH f (Hz)




High Frequency Analysis

Vo(dB)

Low-frequencyband

ViMidband


High-frequency band


3 dB

20 log |AM| (dB)

fL fH f (Hz)




Upper Cutoff Frequency – fH

RG

Rsig

vsig +-

VgsVgs

Cgd

Cgs gm ro_

+

RD RL

Vgs = Vsig

RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)

Vo = −gm (ro ‖ RD ‖ RL)Vgs

Vo

Vsig= −gm (ro ‖ RD ‖ RL)

RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)




RG

Rsig

vsig +-

VgsVgs Cgs gm ro_

+

RD RL

Ceq = Cgs + Cgd(1 + gmR′L

)

Vgs = Vsig

RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)Vo = −gm (ro ‖ RD ‖ RL)Vgs

Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)




RG

Rsig

vsig +-

VgsVgs Cgs gm ro_

+

RD RL


)

Vgs = Vsig

RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq


Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)




RG

Rsig

vsig +-

VgsVgs Cgs gm ro_

+

RD RL


)

Vgs = Vsig

RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq


Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)




From the previous slide,

Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)= −gm (ro ‖ RD ‖ RL)

1

1 +Rsig

(RG+

1sCeq

)RG

1sCeq

= −gm (ro ‖ RD ‖ RL)1

1 +RsigRG

RG1

sCeq+

RsigRG

= −gm (ro ‖ RD ‖ RL)1

RG+RsigRG

+sCeqRsigRG

RG

= −gm (ro ‖ RD ‖ RL)RG

RG + Rsig

1

1 +sCeqRsigRG

RG+Rsig

. (33)





Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)

= −gm (ro ‖ RD ‖ RL)1

1 +Rsig

(RG+

1sCeq

)RG

1sCeq

= −gm (ro ‖ RD ‖ RL)1

1 +RsigRG

RG1

sCeq+

RsigRG

= −gm (ro ‖ RD ‖ RL)1

RG+RsigRG

+sCeqRsigRG

RG


RG + Rsig

1

1 +sCeqRsigRG

RG+Rsig

. (33)





Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)= −gm (ro ‖ RD ‖ RL)

1

1 +Rsig

(RG+

1sCeq

)RG

1sCeq

= −gm (ro ‖ RD ‖ RL)1

1 +RsigRG

RG1

sCeq+

RsigRG

= −gm (ro ‖ RD ‖ RL)1

RG+RsigRG

+sCeqRsigRG

RG


RG + Rsig

1

1 +sCeqRsigRG

RG+Rsig

. (33)





Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)= −gm (ro ‖ RD ‖ RL)

1

1 +Rsig

(RG+

1sCeq

)RG

1sCeq

= −gm (ro ‖ RD ‖ RL)1

1 +RsigRG

RG1

sCeq+

RsigRG

= −gm (ro ‖ RD ‖ RL)1

RG+RsigRG

+sCeqRsigRG

RG


RG + Rsig

1

1 +sCeqRsigRG

RG+Rsig

. (33)





Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)= −gm (ro ‖ RD ‖ RL)

1

1 +Rsig

(RG+

1sCeq

)RG

1sCeq

= −gm (ro ‖ RD ‖ RL)1

1 +RsigRG

RG1

sCeq+

RsigRG

= −gm (ro ‖ RD ‖ RL)1

RG+RsigRG

+sCeqRsigRG

RG


RG + Rsig

1

1 +sCeqRsigRG

RG+Rsig

. (33)





Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)= −gm (ro ‖ RD ‖ RL)

1

1 +Rsig

(RG+

1sCeq

)RG

1sCeq

= −gm (ro ‖ RD ‖ RL)1

1 +RsigRG

RG1

sCeq+

RsigRG

= −gm (ro ‖ RD ‖ RL)1

RG+RsigRG

+sCeqRsigRG

RG


RG + Rsig

1

1 +sCeqRsigRG

RG+Rsig

. (33)



Mid-band Analysis

Vo(dB)

Low-frequencyband

ViMidband


High-frequency band


3 dB

20 log |AM| (dB)

fL fH f (Hz)




Mid-band Analysis

Vo(dB)

Low-frequencyband

ViMidband


High-frequency band


3 dB

20 log |AM| (dB)

fL fH f (Hz)




Mid-band Gain – AM

From the previous slides where we have derived the expressions for gain in low andhigh frequency regions , mid-band gain is given by

AM = −gm (ro ‖ RD ‖ RL)RG

RG + Rsig. (34)

We don’t even have to derive the above expression ... Simply remove the effect of allthe capacitors (external & internal) then get the gain value, which is nothing but AM.






RG + Rsig. (34)




Outline


2 MOSFET Amplifiers



5 Summary



Definitions – gm & ro


iD =12



∂iD∂vGS

∣∣∣∣vGS=VGS


and∂iD

∂vDS

∣∣∣∣vDS=VDS

=12

kn (vGS −Vt)2 × λ = r−1

o .


∆iD = id =∂iD

∂vGS∆vGS +

∂iD∂vDS

∆vDS =∂iD

∂vGSvgs +

∂iD∂vDS

vds = gmvgs +vdsr0

.



Small-Signal Equivalent-Circuit Model

G D

S

rovgs vgsgm

+

-

ig

is

id

ig = 0





Triode Saturation

0

Slope

VOV

=1ro

vDS-VA = 1/

iD

-

vDS vGS –Vtn

vGS

vOV

Vtn

iD

0

0

= gmSlope




is

ig = 0

id

vgs

gmvgs

G D

S

is

ig = 0 id

vgs gmvgs

gmvgs

X

G D

S

is

ig = 0

id

vgs

gmvgs

gmvgs

X

G D

S

is

id

vgs gmvgs

1/gm

ig = 0

+

-

+

-

+

-

+

-




ro

g

G

S

D

m

1/gm

vgs

vgs

+

-

ro

1 i

G

S

D

i

1/gm

+




DC Analysis:




AC Analysis:






DC Analysis

VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-



AC Analysis

viRo

ii 0

Rin

vgs = vi

vd

(0 V)

VSS

VDD

CC1

CS

Rsig

vsig

RL

CC2

RG

RD

vo

+-

(0 V)

+




RG

S

Rsig

vsig

ig= 0 Gii

gmvgs

Rin= RG Ro = RD ro

vi vgs ro RD

D

RL


+-

+

Rin = RG

Rout = RD‖ro

Gv = − RG






Common Drain (CD)

vo

vi

RL

+- +

RDvi

vo+-

+ RD vo

vi +-

+







Rsig+1/gm


RLRL+1/gm







Vbs Csb

S B

Cdb

Vbs

Cgd

Cgsgmb

ro

G D

VgsVgsgm

_

+

_

+

CdbVgs

Cgd

Cgs gm ro

G D

Vgs

S

_

+

VgsVgs

Cgd

Cgs gm ro

G D

S

_

+




Ii Vgs Vgs

Cgd sCgd Vgs

Cgs gm ro

Io

_

+


IO = gmVgs +Vdsro− sCgdVgd = gmvgs +

Vdsro− sCgdVgs ≈ gmVgs − sCgdVgs ≈ gmVgs.


Io

Ii=

gm

s(Cgs + Cgd

) .


fT =1

2π

gm

Cgs + Cds.




Vgsgm ro

Io

Ii Vgs Cgs_

+


Vgs = Ii1

jωCeq= Ii

1jω(Cgs + Cgd


Io = gmVgs = gmIi1

jω(Cgs + Cgd

) .

Finally, we getIo

Ii=

gm

jω(Cgs + Cgd

) .



Frequency Response of CS Amplifier ... fL

i

i

1gm

CS

CC1Rsig

vsig RG+-

vi

RL

CC2

vo

RD

v'o

vo

vsig=

−RL

RL +1

sCc2

[RD ‖

(RL +

1sCc2

)]1

1gm

+ 1sCs

RG

Rsig + RG + 1sCc1

=−gmRLRGRD

(RD + RL)(Rsig + RG

) sCC2 (RD + RL)

1 + sCc2 (RD + RL)

s Csgm

1 + s Csgm

sCC1(Rsig + RG

)1 + sCc1

(Rsig + RG

)5. MOSFET Transistors & Circuits - II ECE/EEE/INSTR F244, Dept. of EEE, BITS Pilani Hyderabad Campus


Frequency Response of CS Amplifier ... fH

RG

Rsig

vsig +-

VgsVgs Cgs gm ro_

+

RD RL

Vgs = Vsig

RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)

Vo = −gm (ro ‖ RD ‖ RL)Vgs

Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)



Frequency Response of CS Amplifier ... fH


Vo


RG ‖ 1sCeq

Rsig +(

RG ‖ 1sCeq

)= −gm (ro ‖ RD ‖ RL)

1

1 +Rsig

(RG+

1sCeq

)RG

1sCeq

= −gm (ro ‖ RD ‖ RL)1

1 +RsigRG

RG1

sCeq+

RsigRG

= −gm (ro ‖ RD ‖ RL)1

RG+RsigRG

+sCeqRsigRG

RG


RG + Rsig

1

1 +sCeqRsigRG

RG+Rsig

.






RG + Rsig.



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