APLAC®

QPSK receiver analyzed usingAPLAC’s MRHB.

Overview

APLAC high-frequency circuit simulation technology brings the benefits of

harmonic balance (HB) analysis to the design of complex, extremely nonlinear

circuits. Finely tuned and consistently enhanced for more than 15 years, it is

no wonder APLAC technology is used extensively for iC design at Nokia and

many device manufacturers throughout the world. in fact, APLAC has aided

in the design of more than 30 percent of all mobile phone rFiCs. This unique

implementation of harmonic balance and transient analysis gives you extremely

fast and exceptionally accurate results using far less computer memory than

traditional microwave harmonic balance techniques.

FeATures AT A gLANCe

seamless integration within Microwave Office® and Analog Office® design environments

Harmonic balance simulators for highly nonlinear and complex designs

• transient-assisted harmonic balance (TAHB)

• multi-rate harmonic balance (MrHB™)

Time-domain simulations including frequency-dependent components

Linear and nonlinear noise analysis

Dynamic oscillator analysis

Comprehensive set of convergence aids for DC, AC, HB, and transient simulations

verilog-A model support as well as iBis model for i/O driver circuits

APLAC modeling language supports user-defined linear and nonlinear models as well as measurements

Fully exploits the power of multi-core PCs

Circuit Simulation Technology for Highly Nonlinear and Complex Designs

We strongly believe APLAC offers one

of the most advanced analog design

platforms available, and plays a crucial

role in helping us live up to our ‘right first

time’ design philosophy.

Erkki kuisma, Fellow

Nokia

Copyright © 2010 Awr Corporation. All rights reserved. Awr and the Awr logo, Microwave Office, Analog Office and APLAC are registered trademarks and unified Data Model is trademark of Awr Corporation.

APLAC

APLAC usage is fully transparent to the user. Choose the APLAC simulator from the simulator list and run the simulation.

wHAT is APLAC?

Multi-Domain Analysis APLAC’s multi-domain analysis enables the

simulation of any rF or analog circuit with a selection of analysis

methods, including DC operation point, linear frequency-domain,

time-domain, HB, phase noise, linear/nonlinear noise, and accurate

yield predictions. each circuit can be analyzed in multiple ways simply

by altering the analysis definitions. Optimization, tuning, and a Monte

Carlo statistical feature (for design yield) are available with every

method. Leveraging Awr’s unified Data Model™, APLAC HB and

time-domain can be driven from the same schematic, with the same

sources and the same models.

High-Capacity Harmonic Balance and Time-domain Simulators

APLAC’s HB algorithm has been developed to minimize memory

requirements and simulation time while maintaining a high degree of

accuracy. APLAC technology embodies multiple HB engines, including

an enhanced HB method, a transient-assisted HB method (TAHB),

and a multi-rate HB method (MrHB). The enhanced HB method

enables simulation of larger circuits faster than traditional microwave

HB techniques. TAHB is for digital divider circuits and accurate

nonlinear phase noise measurements for analog and rF applications.

MrHB is a reformulation of the basic HB technique. it identifies the

harmonic needs of the individual nonlinear components or signal

paths and reduces the harmonic solution matrix accordingly. The

overall effect is several orders of magnitude reduction in memory

requirements by solving only the required harmonics for each

component or signal path.

The APLAC time-domain simulator complements the Awr solver

family with a microwave-compatible transient engine, which provides

several capabilities essential in high-frequency design:

Fully compatible with all Awr-developed Microwave Office and Analog Office advanced, distributed rF-elements

support for gaAs MesFeT transistor models

scattering parameters accurately simulated in time-domain

PLL macromodel for synthesizer simulations

iBis model support – that can be combined with advanced board

models – for high-speed digital design

suMMAry

The APLAC engine delivers accurate results in less time for highly

nonlinear and large-scale designs, resulting in increased productivity

and shorter design cycles.

APLAC oscillator analysis utilizes optimization to find oscillation frequency. Both HB and transient simulation results are studied.

Awr, 1960 east grand Avenue, suite 430, el segundo, CA 90245, usATel: +1 (310) 726-3000 Fax: +1 (310) 726-3005 www.awrcorp.com

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