Date post: | 22-Mar-2017 |
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Website: www.batracomputercentre.comPh. No.: 8222066670, 4000670
Email: [email protected] COMPUTER CENTREISO CERTIFIED 9001:2008
Website: www.batracomputercentre.comPh. No.: 8222066670, 4000670
Email: [email protected]
Input / Output units
Memory / Storage units
CPU
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Northbridge
Connected to CPU in high speed
Southbridge
Connected in low speed
Bus
Related to “omnibus”
Communication system between components
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ALU (Arithmetic Logic Unit) Performs calculation and comparisons CU (Control Unit): Performs fetch/execute cycle Functions:
* Moves data to and from CPU registers and other hardware components * Access Program instructions and issues commands to the ALU
Subparts: * Memory management unit supervise fetching instructions and data. * I/O interface: Sometimes combined with memory management unit as bust interface unit
Register * Example: Program counter (PC) or instruction pointer determines next instruction for execution
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Fetch-decode-execute-store
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Small, permanent storage locations within the CPU used for a
particular purpose
Manipulated directly by the CPU
Wired for specific function
Size in bits or bytes
Can hold data, an address or an instruction
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Stores values from other locations
Addition and subtraction
Shift or rotate data
Test contents for conditions such as zero or positive
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Program Counter (PC) register
Instruction Register (IR)
Status register: status, flags
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Cache level *L1 cache: faster and smallest
*L2 cache: next fastest and smallest
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Each memory location has a unique address
Address from an instruction is copied to the MAR which
finds the location in memory
CPU determines if it is a store or retrieval
Transfer take place between the MDR and memory
MDR is a two way register
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Determined by Two factors
1. Number of bits in the MAR * 2k where K = width of the register in bits 2. Size of the address portion of the instruction * 4 bits allows 16 locations * 8 bits allows 256 location * 32 bits allows 4,294,967,296 or 4 GB
Important for performance
* Insufficient memory can cause a processor to work at 50%
below performance
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DRAM (Dynamic RAM)
* Most common, cheap
* Volatile: most be refreshed (recharge with power) 1000’s
of times each second
SRAM (Static RAM)
* Faster Than DRAM and more expensive than DRAM
* Volatile
* Frequently small amount used in cache memory for high-
speed access used
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Non-volatile memory to hold software that is not expected to change over the life of the system
Magnetic core memory ERPROM *Electrically Erasable Programmable ROM *Slower and less flexible than flash ROM Flash ROM * Faster than disks but more expensive * Uses . BIOS: initial boot instruction and diagnostics . Digital cameras
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CMOS (Complimentary Metal Oxide Semiconductor) TR (Transistor).
-- Low power consumption, cheap TR BIOS (Basic I/O System and system setting that users can
change
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ADDRESS:
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Ambala Cantt-13300, Haryana
Ph. No.: 9729666670, 8222066670 &0171-4000670
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