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Ch. 7

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Ch. 7. Memory and Programmable Logic. Memory and Programmable Logic. Random-Access Memory Memory Decoding Error Detection and Correction Read-Only Memory Programmable Logic Array Programmable Array Logic Sequential Programmable Devices. Memory. Memory - PowerPoint PPT Presentation
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Ch. 7 Memory and Programmable Logic
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Page 1: Ch. 7

Ch. 7

Memory and Programmable Logic

Page 2: Ch. 7

Memory and Programmable Logic

Random-Access MemoryMemory DecodingError Detection and CorrectionRead-Only MemoryProgrammable Logic ArrayProgrammable Array LogicSequential Programmable Devices

Page 3: Ch. 7

Memory

Memory – A device to which binary information is transferred

for storage.Type of memory

– random access memory , RAM– read-only memory, ROM

Write operation– Storing new information into memory

Read operation– Transferring the stored information out of memory

Page 4: Ch. 7

RAM

RAM– The time it takes to transfer information to or from

any desired random location is always the same

Storage unit–byte– byte : 8 bits

– Length of a word : multiple of 8 bits

– word : represent a number, an instruction, alphanumeric character

Capacity of memory–total number of bytes

Page 5: Ch. 7

Block diagram of memory unit

k address lines :select one particular word

read, write : specify the direction of transfer

n data input line :provide the information to be stored in memoryn data output line :supplying the information coming out of memory

Page 6: Ch. 7

Capacity of memory

Range of in memory size– 210~232 words

bytes– K=210 、 M=220 、 G=230 。– 64K=216 、 2M=221 、 4G=232 。

Memory 1K x 16– 10 bits address , 16 bits in each word

Determine the no. of bits for address

mk 2 k: no. of address bitsm: total number of words

Page 7: Ch. 7

Control inputs to memory chip

memory enable read/write memory

operation 0 x None 1 0 Write to select

word 1 1 read from

selectd word

Page 8: Ch. 7

Memory cycle timing waveforms

access time– the time required to select a word and read it

cycle time– the time required to complete a write cycle

access time 、 cycle time– equal to a fixed number of CPU clock

See Fig. 7-4

Page 9: Ch. 7
Page 10: Ch. 7

Types of memory

The mode of access of a memory– RAM-volatile

• Static RAM(SRAM)– internal latch – easier to used and shorter read and write time

• Dynamic RAM(DRAM) – electric charges on capacitor– less power consumption– larger storage capacity

– ROM-nonvolatile • Read/write time depend on the distance between

the magnetic reader/writer and the data

Page 11: Ch. 7

Memory Decoding

Decoder – select the memory word specified by the input

address

2-dimensional coincident decoding is a more efficient decoding scheme for large memories

Page 12: Ch. 7

Memory cell

One bit memory cell

Page 13: Ch. 7

4X4 RAM

Page 14: Ch. 7

Coincident Decoding- two-dimensional selection scheme

Decoder with k input and 2k output requires 2k AND gates with k input

k input decoder can be implemented by two k/2 input decoders with one for column and another for row

e.g., 10×1024 decoder can be implemented by two 5×32 decoders

Page 15: Ch. 7

Example for two-dimensional decoder

Page 16: Ch. 7

Address multiplexing64K-word memory

Page 17: Ch. 7

Read-Only Memory

ROM : permanent binary information is stored

k input, n output ROM

Page 18: Ch. 7

ROM

No data inputIntegrated circuit ROM have one or more

enable inputSometimes come with three-state outputs

to facilitate the construction of large arrays of ROM

Page 19: Ch. 7

Internal logic of 32X8 ROM

Page 20: Ch. 7

ROM truth table

Table 7-3 32×8 ROM truth table 輸入 輸出

I4 I3 I2 I1 I0 A7 A6 A5 A4 A3 A2 A1 A0

0 0 0 0 0 1 0 1 1 0 1 1 0

0 0 0 0 1 0 0 0 1 1 1 0 1

0 0 0 1 0 1 1 0 0 0 1 0 1

0 0 0 1 1 1 0 1 1 0 0 1 0 . . .

.

.

.

1 1 1 0 0 0 0 0 0 1 0 0 1

1 1 1 0 1 1 1 1 0 0 0 1 0

1 1 1 1 0 0 1 0 0 1 0 1 0

1 1 1 1 1

0 0 1 1 0 0 1 1

Page 21: Ch. 7

Programmomg the ROM according to Taable 7-3

× denote a connection in place of a dot used for permanent connection

Page 22: Ch. 7

Example 7-1

輸入 輸出

A2 A1 A0 B5 B4 B3 B2 B1 B0

十進位

0 0 0 0 0 0 0 0 0 0

0 0 1 0 0 0 0 0 1 1

0 1 0 0 0 0 1 0 0 4

0 1 1 0 0 1 0 0 1 9

1 0 0 0 1 0 0 0 0 16

1 0 1 0 1 1 0 0 1 25

1 1 0 1 0 0 1 0 0 36

1 1 1

1 1 0 0 0 1

49

Design a combinational circuit with 3-input using a ROM.Output = square(input)

Page 23: Ch. 7

ROM implementation of Example 7-1

Page 24: Ch. 7

Types of ROMs

The required path in a ROM may be programmed in four different ways. – mask programming (mask ROM)

• Mask is done by Fab. company during the last fabrication

• Customer must fill out the truth table

• High cost

– programmable read-only memory(PROM)• allows users to program in Lab.

• the program is irreversible

Page 25: Ch. 7

Types of ROMs

– Erasable PROM(EPROM)• by ultraviolet light

– electrically-erasable PROM(EEPROM or E²PROM) ,

• by electrical signal • can be erased without removing it from tis socket

Page 26: Ch. 7

Types of PLD (Programmable Logic Device)

Page 27: Ch. 7

Programmable Logic Array (PLA)

similar to PROM does not provide full decoding and does

not generate all the mintermsdecoder is replaced by an array of AND

gate

Page 28: Ch. 7

PLA with 3 inputs, 4 product terms, and two outputs

Page 29: Ch. 7

PLA Programming Table

PLA Programming Table consists of three sections

– 1st, list the product terms numerically

– 2nd, specify the required path between inputs and AND gates

– 3rd, specifies the paths between the AND and OR gates

outputs

inputs (T) (C) Product

term A B C F1 F2

BA 1 1 0 - 1 -

AC 2 1 - 1 1 1

BC 3 - 1 1 - 1

CBA 4 0 1 0

1 -

Page 30: Ch. 7

Example 7-2

Implement the following two Boolean functions with a PLA:

Simplified by K-map :

)7,6,5,0(),,(

)4,2,1,0(),,(

2

1

CBAF

CBAF

CBAACABF

BCACABF

2

1 )(

Page 31: Ch. 7

Solution of Example 7-2


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