Chapter 1 Computer Abstractions and Technology 20100906

8/4/2019 Chapter 1 Computer Abstractions and Technology 20100906

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Computer Abstractionsand Technology


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Chapter 1 Computer Abstractions and Technology 2

The Computer Revolution

Progress in computer technology

Underpinned by Moores Law

Makes novel applications feasible

Computers in automobiles

Cell phones

Human genome project

World Wide Web

Search Engines

Computers are pervasive1.1Introdu

ction


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Classes of Computers

Desktop computers

General purpose, variety of software

Subject to cost/performance tradeoff

Server computers

Network based

High capacity, performance, reliability

Range from small servers to building sized

Embedded computers Hidden as components of systems

Stringent power/performance/cost constraints


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The Computer/Processor Market


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What You Will Learn

Computer organization

Design a faster, and cheaper computer system

How programs are translated into the machine

language

And how the hardware executes them

The hardware/software interface

What determines program performance

And how it can be improved How hardware designers improve performance

What is parallel processing


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Below Your Program

Application software

Written in high-level language (HLL)

E.g. MS Word, Power Point

System software

Compiler: translates HLL code to machinecode

Operating System: service code

Handling input/output

Managing memory and storage Scheduling tasks & sharing resources

Hardware

Processor, memory, I/O controllers

1.2

BelowYourProgram


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Levels of Program Code

High-level language

Level of abstraction closer to

problem domain

Provides for productivity and

portability

Assembly language

Textual representation of

instructions

Hardware representation Binary digits (bits)

Encoded instructions and data


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Levels of RepresentationFrom High Level Language to Hardware Language

High Level Language

Program (e.g., C)

Assembly LanguageProgram (e.g.,MIPS)

Machine LanguageProgram (MIPS)

Hardware Architecture Description(e.g., Verilog Language)

Compiler

Assembler

MachineInterpretation

temp = v[k];

v[k] = v[k+1];

v[k+1] = temp;

lw $t0, 0($2)lw $t1, 4($2)sw $t1, 0($2)sw $t0, 4($2)

0000 1001 1100 0110 1010 1111 0101 1000

1010 1111 0101 1000 0000 1001 1100 0110

1100 0110 1010 1111 0101 1000 0000 1001

0101 1000 0000 1001 1100 0110 1010 1111

Logic Circuit Description(Verilog Language)

ArchitectureImplementation

wire [31:0] dataBus;

regFile registers (databus);

ALU ALUBlock (inA, inB, databus);

wire w0;

XOR (w0, a, b);

AND (s, w0, a);


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Abstractions

* Coordination of many levels of abstraction

I/O systemProcessor

Compiler

Operating

System

(Windows)

Application (Netscape)

Digital Design

Circuit Design

Instruction SetArchitecture

Datapath & Control

transistors

MemoryHardware

Software Assembler


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Instruction Set Architecture

Also called architecture

A very important abstraction interface between hardware and low-level software

Includes instructions, registers, memory access, I/O and so on

advantage: different implementations of the same architecture

disadvantage: sometimes prevents using new innovations

True or False: Binary compatibility is extraordinarily important?

Modern instruction set architectures: IA-32, PowerPC, MIPS, SPARC, ARM, and others


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Components of a Computer

Same components for

all kinds of computer

Desktop, server,

embedded

Input/output includes User-interface devices

Display, keyboard, mouse

Storage devices

Hard disk, CD/DVD, flash

Network adapters

For communicating with other

computers

1

.3UndertheCo

vers


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Anatomy of a Computer

Outputdevice

Inputdevice

Inputdevice

Networkcable


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Opening the Box


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A Safe Place for Data

Volatile main memory Loses instructions and data when power off

Non-volatile secondary memory Magnetic disk

Flash memory

Optical disk (CDROM, DVD)


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Networks

Communication and resource sharing

Local area network (LAN): Ethernet

Within a building

Wide area network (WAN): the Internet

Wireless network: WiFi, Bluetooth


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Inside the Processor (CPU)

Datapath: performs operations on data Control: sequences datapath, memory, ...

Cache memory

Small fast SRAM memory for immediateaccess to data


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Inside the Processor

AMD Barcelona: 4 processor cores


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Why do all computer look alike?


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Back to History: Milestones


ENIACthe worlds first

general-purpose

electronic computer

1936 1944/1946 1947Transistors

John Von NeumannStored program

1958Integrated

circuits

IBM 360Family of computersCompatible computer

1964 1971

Intel 4004First uP

1977

Apple IPersonalcomputer

Information from wiki

Alan TuringUniversal computing

machine

1961IBM StretchInstruction

pipeline

1980RISC

Load-storeArch

SUN/MIPS

1970C.mmp


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von Neumann Architecture a stored-program digital computer that uses a central processing unit (CPU)

and a single separate storage structure ("memory") to hold both instructionsand data.

von Neumann bottleneck Throughput between CPU and memory

Memory speed is much slower than CPU (Needs a cache memory, in chapter 5)



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Other CPUs beyond von Neumann Arch.

Modified Harvard arch (in DSP)

separated instruction and dataFound in DSP like TI OMAP in handset

Dataflow architecture

No program counterFound in graphic processing, network routing


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Abstractions

Abstraction helps us deal with complexity

Hide lower-level detail

Instruction set architecture (ISA) The hardware/software interface

Application binary interface

The ISA plus system software interface Implementation

The details underlying and interface


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Technology Trends

Electronics technology

continues to evolve

Increased capacity and

performance

Reduced cost

Year Technology Relative performance/cost

1951 Vacuum tube 1

1965 Transistor 351975 Integrated circuit (IC) 900

1995 Very large scale IC (VLSI) 2,400,000

2005 Ultra large scale IC 6,200,000,000

DRAM capacity

T h l T d M C it


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Technology Trends: Memory Capacity

(Single-Chip DRAM)size

Year

1000

10000

100000

1000000

10000000

100000000

1000000000

1970 1975 1980 1985 1990 1995 2000

year size (Mbit)

1980 0.0625

1983 0.25

1986 1

1989 4

1992 16

1996 64

1998 1282000 256

2002 512 Now 1.4X/yr, or 2X every 2 years.

8000X since 1980!

T h l T d Mi


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Year

1000

10000

100000

1000000

10000000

100000000

1970 1975 1980 1985 1990 1995 2000

i80386

i4004

i8080

Pentium

i80486

i80286

i8086

Technology Trends: Microprocessor

Complexity

2X transistors/Chip

Every 1.5 years

Called

Moores Law

Alpha 21264: 15 million

Pentium Pro: 5.5 million

PowerPC 620: 6.9 millionAlpha 21164: 9.3 millionSparc Ultra: 5.2 million

Moores Law

Athlon (K7): 22 Million

Itanium 2: 410 Million


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Technology Trends: Processor Performance

0

100

200

300

400

500

600

700

800

900

87 88 89 90 91 92 93 94 95 96 97

DEC Alpha

21264/600

DEC Alpha 5/500

DEC Alpha 5/300

DEC Alpha 4/266

IBM POWER 100

1.54X/yr

Intel P4 2000 MHz(Fall 2001)

Well talk about processor performance later on

year

Performan

cemeasure


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Computer Technology - Dramatic Change!

MemoryDRAM capacity: 2x / 2 years (since 96);64x size improvement in last decade.

Processor

Speed 2x / 1.5 years (since 85);100X performance in last decade.

Disk

Capacity: 2x / 1 year (since 97)250X size in last decade.


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Why do you need to know the technology trend?Or What is the impact of technology trend tocomputer design


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The meaning of technology drive

Forecastthe expected design performance

within the next few years

It change the waythat you design yourcomputer, and software Multi-processor, VLIW, parallel processor,

efficient access via caches Size, speed, probability

Other technology may change the way of thecomputer/processor design Quantum computer, DNA computer, bio-computer


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Performance? How fast is my computer?


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Understanding Performance

Algorithm

Determines number of operations executed

Programming language, compiler, architecture

Determine number of machine instructions executed

per operation

Processor and memory system

Determine how fast instructions are executed

I/O system (including OS)

Determines how fast I/O operations are executed


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Defining Performance

Which airplane has the best performance?

0 100 200 300 400 500

Douglas

DC-8-50

BAC/Sud

Concorde

Boeing 747

Boeing 777

Passenger Capacity

0 2000 4000 6000 8000 10000

Douglas DC-

8-50

BAC/Sud

Concorde

Boeing 747

Boeing 777

Cruising Range (miles)

0 500 1000 1500

Douglas

DC-8-50

BAC/Sud

Concorde

Boeing 747

Boeing 777

Cruising Speed (mph)

0 100000 200000 300000 400000

Douglas DC-

8-50

BAC/Sud

Concorde

Boeing 747

Boeing 777

Passengers x mph

1.4Performance


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Response Time and Throughput

Response time

How long it takes to do a task

Throughput

Total work done per unit time

e.g., tasks/transactions/ per hour

How are response time and throughput affected

by

Replacing the processor with a faster version?

Adding more processors?

Well focus on response time for now


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Relative Performance

Define Performance = 1/Execution Time

X is n time faster than Y

n XY

YX

timeExecutiontimeExecution

ePerformancePerformanc

Example: time taken to run a program

10s on A, 15s on B

Execution TimeB / Execution TimeA= 15s / 10s = 1.5

So A is 1.5 times faster than B


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Measuring Execution Time

Elapsed time

Total response time, including all aspects

Processing, I/O, OS overhead, idle time

Determines system performance

CPU time

Time spent processing a given job

Discounts I/O time, other jobs shares

Comprises user CPU time and system CPU time

Different programs are affected differently by CPU

and system performance


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CPU Clocking

Operations of digital hardware governed by aconstant-rate clock

Clock (cycles)

Data transferand computation

Update state

Clock period

Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = 2501012s

Clock frequency (rate): cycles per second

e.g., 4.0GHz = 4000MHz = 4.0109Hz


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CPU Time

Performance improved by Reducing number of clock cycles

Increasing clock rate

Hardware designer must often trade off clockrate against cycle count

RateClock

CyclesClockCPUTimeCycleClockCyclesClockCPUTimeCPU


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CPU Time Example

Computer A: 2GHz clock, 10s CPU time

Designing Computer B Aim for 6s CPU time

Can do faster clock, but causes 1.2 clock cycles

How fast must Computer B clock be?

4GHz6s

1024

6s

10201.2RateClock

10202GHz10s

RateClockTimeCPUCyclesClock

6s

CyclesClock1.2

TimeCPU

CyclesClockRateClock

99

B

9

AAA

A

B

BB


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Instruction Count and CPI

Instruction Count for a program

Determined by program, ISA and compiler

Average cycles per instruction (CPI)

Determined by CPU hardware

If different instructions have different CPI Average CPI affected by instruction mix

RateClock

CPICountnInstructio

TimeCycleClockCPICountnInstructioTimeCPUnInstructioperCyclesCountnInstructioCyclesClock

C


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CPI Example

Computer A: Cycle Time = 250ps, CPI = 2.0

Computer B: Cycle Time = 500ps, CPI = 1.2

Same ISA

Which is faster, and by how much?

1.2500psI

600psI

ATimeCPU

BTimeCPU

600psI500ps1.2I

BTimeCycle

BCPICountnInstructio

BTimeCPU

500psI250ps2.0I

ATimeCycleACPICountnInstructioATimeCPU

A is faster

by this much

CPI i M D il


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CPI in More Detail

If different instruction classes take differentnumbers of cycles

n

1i

ii )CountnInstructio(CPICyclesClock

Weighted average CPI

n

1i

i

i CountnInstructio

CountnInstructio

CPICountnInstructio

CyclesClock

CPI

Relative frequency

CPI E l


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CPI Example

Alternative compiled code sequences using

instructions in classes A, B, C

Class A B C

CPI for class 1 2 3

IC in sequence 1 2 1 2IC in sequence 2 4 1 1

Sequence 1: IC = 5

Clock Cycles= 21 + 12 + 23= 10

Avg. CPI = 10/5 = 2.0

Sequence 2: IC = 6

Clock Cycles= 41 + 12 + 13= 9

Avg. CPI = 9/6 = 1.5

P f S


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Performance Summary

Performance depends on

Algorithm: affects IC, possibly CPI

Programming language: affects IC, CPI

Compiler: affects IC, CPI

Instruction set architecture: affects IC, CPI, Tc

cycleClock

Seconds

nInstructio

cyclesClock

Program

nsInstructioTimeCPU


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What Improvement can I gain if I speedupsomething?


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Limit of speedup Gain

1


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enhance: 0.5 + 0.5 = 1 enhance4=>4/(4+1) = 0.8 = F

,enhance1=> S = 4/1 = 4

4 + 1speedup = -----------------------= ----------= 2.5

1 + 1 (Amdahls Law):

1 1speedup = ------------------------ = -------------------------

((1 - 0.8) + 0.8/4) (1 0.8) + 0.8/4 When S ->, speedup -> 5

A d hl' L


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Speedup due to enhancement E:

Suppose that enhancement E accelerates a fraction F of the task bya factor S and the remainder of the task is unaffected then,

Ew/oePerformanc

Ew/ePerformanc

Ew/TimeExecution

Ew/oTimeExecutionSpeedup(E)

E)Time(w/oExecution)S

FF)((1E)Time(w/Execution

F1

1

S

FF)-(1

1E)Speedup(w/ S

Amdahl's Law

Pitf ll A d hl L


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Pitfall: Amdahls Law

Improving an aspect of a computer and

expecting a proportional improvement inoverall performance

1.8FallaciesandPitfalls

2080

20 n

Cant be done!

unaffectedaffected

improved T

factortimprovemen

TT

Example: multiply accounts for 80s/100s

How much improvement in multiply performance toget 5 overall?

Corollary: make the common case fast


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CPU Time is great? But how fast is my computer?Or how faster is my computer than that one?

P f M t


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Performance Measurement

Two different machines X and Y.

X is ntimes faster than Y

Since execution time is the reciprocal of performance

Says n-1 = m/100

This concludes that X is m% faster than Y

nX

Y

timeExecution

timeExecution

Y

X

X

Y

ePerformanc

ePerformanc

timeExecution

timeExecution n


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What Programs for Comparison?

Whats wrong with this program as a workload?

integer A[][], B[][], C[][];

for (I=0; I


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5 Levels of Programs Used for Evaluation

Real applications

Portability, compiler, OS Modified (or scripted) applications

To enhance portability or to focus on one particular aspect of systemperformance

Kernels

Small, key pieces from real programs Best way to isolate performance of individual features

Toy benchmark

10~100 code lines

Usually, the user already knows the evaluation results

Synthetic benchmark

Whetstone, Dhrystone

Be created artificially to match an average execution profile

No user runs it

SPEC CPU Benchmark


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SPEC CPU Benchmark

Programs used to measure performance

Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC)

Develops benchmarks for CPU, I/O, Web,

SPEC CPU2006

Elapsed time to execute a selection of programs

Negligible I/O, so focuses on CPU performance

Normalize relative to reference machine

Summarize as geometric mean of performance ratios

CINT2006 (integer) and CFP2006 (floating-point)

n

n

1i

iratiotimeExecution

CINT2006 f O t X4 2356


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CINT2006 for Opteron X4 2356

Name Description IC109 CPI Tc (ns) Exec time Ref time SPECratio

perl Interpreted string processing 2,118 0.75 0.40 637 9,777 15.3

bzip2 Block-sorting compression 2,389 0.85 0.40 817 9,650 11.8

gcc GNU C Compiler 1,050 1.72 0.47 24 8,050 11.1

mcf Combinatorial optimization 336 10.00 0.40 1,345 9,120 6.8

go Go game (AI) 1,658 1.09 0.40 721 10,490 14.6

hmmer Search gene sequence 2,783 0.80 0.40 890 9,330 10.5

sjeng Chess game (AI) 2,176 0.96 0.48 37 12,100 14.5

libquantum Quantum computer simulation 1,623 1.61 0.40 1,047 20,720 19.8

h264avc Video compression 3,102 0.80 0.40 993 22,130 22.3

omnetpp Discrete event simulation 587 2.94 0.40 690 6,250 9.1

astar Games/path finding 1,082 1.79 0.40 773 7,020 9.1

xalancbmk XML parsing 1,058 2.70 0.40 1,143 6,900 6.0Geometric mean 11.7

High cache miss rates

Reporting Performance


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Reporting Performance

Guiding principle: reproducible

List everything another experimenter would need to duplicate the results(especially, the input set)

Example

Hardware

CPU 3.2-GHz Pentium 4 Extreme EditionL3 Cache size 2048KB (I+D) on chip

Memory 4 x 512 MB

Disk subsystem 1 x 80GB ATA/100 7200RPM

SoftwareOS Windows XP Professional SP1

Compiler Intel C++ Compiler 7.1

C /S i P f


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Compare/Summarize Performance

WLOG, 2 different ways

1. Arithmetic mean

Timei is the execution time for the ith program in the workload

Weighted arithmetic mean

Weighti factors add up to 1

2. Geometric mean

To normalize to a reference machine (e.g. SPEC) Execution time ratioi is the execution time normalized to the reference

machine, for the ith program

n

in 1iTime

1

n

i 1

ii TimeWeight

n

n

i

i1

ratiotimeExecution

Which one is better ? Or is there any difference?

Example


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Example

1. The arithmetic mean performance varies from ref. to ref.2. The geometric mean performance is consistent

Remark


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Remark

SPECRatio is just a ratio rather than an absolute esecution time

Note that when comparing 2 computers as a ratio, execution times on

the reference computer drop out, so choice of reference computer is

irrelevant

B

A

A

B

B

reference

A

reference

B

A

ePerformanc

ePerformanc

imeExecutionT

imeExecutionT

imeExecutionT

imeExecutionT

imeExecutionT

imeExecutionT

SPECRatio

SPECRatio

25.1e.g.

SPEC CINT2000 and CFP2000 Rating for


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gPentium III and 4 at Different Clock Rates

1.Performance scales with the clock frequency. Not the usual case.

Losses in memory system is not presented.

2. Pentium III performs better for CINT2000 than for CFP2000.

Pentium 4 is reverse.

Pitf ll MIPS P f M t i


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Pitfall: MIPS as a Performance Metric

MIPS: Millions of Instructions Per Second

Doesnt account for

Differences in ISAs between computers

Differences in complexity between instructions

66

6

10CPI

rateClock

10rateClock

CPIcountnInstructio

countnInstructio

10timeExecution

countnInstructioMIPS

CPI varies between programs on a givenCPU


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Why do we need parallel processing?Fact behind multiprocessor?

Uniprocessor Performance


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Uniprocessor Performance1

.6TheSeaCha

nge:TheSwitchtoMultiprocessors

Constrained by power, instruction-level parallelism,memory latency

Power Trends


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Power Trends

In CMOS IC technology

1.5ThePowerWall

FrequencyVoltageloadCapacitivePower 2

100030 5V 1V

Power is a Limiter


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64

Power is a Limiter

5KW18KW

1.5KW

500W

40048008

80808085

8086286

386486

Pentium

0.1

1

10

100

1000

10000

100000

1971 1974 1978 1985 1992 2000 2004 2008

Power(Watts)

Power delivery and dissipation will be prohibitive !Source: Borkar, De Intel

P6

transitionfrom NMOSto CMOS

Power Density will Increase


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65

Power Density will Increase

40048008

8080

8085

8086

286 386 486Pentium

P6

1

10

100

1000

10000

1970 1980 1990 2000 2010

PowerDensity(W/cm2)

Hot Plate

Nuclear

Reactor

Rocket

Nozzle

Power densities too high to keep junctions at low temps

Suns

Surface

Source: Borkar, De Intel

Reducing Power


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Reducing Power

Suppose a new CPU has

85% of capacitive load of old CPU

15% voltage and 15% frequency reduction

0.520.85FVC

0.85F0.85)(V0.85C

P

P4

old

2

oldold

old

2

oldold

old

new

The power wall

We cant reduce voltage further We cant remove more heat

How else can we improve performance?

Multiprocessors


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Multiprocessors

Multicore microprocessors

More than one processor per chip

Requires explicitly parallel programming

Compare with instruction level parallelism

Hardware executes multiple instructions at once

Hidden from the programmer

Hard to do

Programming for performance Load balancing

Optimizing communication and synchronization

SPEC Power Benchmark


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SPEC Power Benchmark

Power consumption of server at differentworkload levels

Performance: ssj_ops/sec

Power: Watts (Joules/sec)

10

0i

i

10

0i

i powerssj_opsWattperssj_opsOverall

SPECpower ssj2008 for X4


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SPECpower_ssj2008 for X4

Target Load % Performance (ssj_ops/sec) Average Power (Watts)

100% 231,867 295

90% 211,282 286

80% 185,803 275

70% 163,427 265

60% 140,160 256

50% 118,324 246

40% 920,35 233

30% 70,500 222

20% 47,126 206

10% 23,066 1800% 0 141

Overall sum 1,283,590 2,605

ssj_ops/ power 493

Fallacy: Low Power at Idle


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Fallacy: Low Power at Idle

Look back at X4 power benchmark

At 100% load: 295W

At 50% load: 246W (83%)

At 10% load: 180W (61%)

Google data center

Mostly operates at 10% 50% load

At 100% load less than 1% of the time

Consider designing processors to makepower proportional to load

Concluding Remarks


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Concluding Remarks

Cost/performance is improving

Due to underlying technology development

Hierarchical layers of abstraction

In both hardware and software

Instruction set architecture

The hardware/software interface

Execution time: the best performance measure

Power is a limiting factor Use parallelism to improve performance

1.9C

oncludingRem

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Chapter 1 Computer Abstractions and Technology 20100906

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