Computer-aided design of power electronic circuits M.H. Pong. B.Sc, A.M.I.E.E., and R.D. Jackson. M.A.. C.Eng., M.I.E.E. Indexing terms: Computer simulation, chopper circuits, Power electronics Abstract: The general purpose circuit simulation package SPICE is used as a design tool for power electronic circuits. The process involves simulation of the complete circuit in the microsecond timescale, by which circuit behaviour under different operating conditions can be studied. Semiconductor device models and intercon- nection inductances are examined. The simulation process is applied to a 50 kVA transistorised chopper circuit and the results are discussed and compared with experimental results. List of symbols R c = collector resistance of transistor model R b = base resistance of transistor model R e = emitter resistance of transistor model L c = collector current of transistor model Q bc = base-collector charge of transistor model Q be = base-emitter charge of transistor model V s = voltage source to model diode turn-on effect R s = steady state resistance of diode model I d = junction current of diode model Q d = capacitance of diode model L l5 L 2 , L 3 = interconnection inductances / s = saturation current = base-emitter junction voltage = base-collector junction voltage = forward Early voltage = reverse Early voltage = zero bias Early voltage = junction exponential factor = junction built-in potential v b , c , v AF v AR v AO M JC V JC 1 Introduction The present state of computer circuit and device simula- tion programs should enable them to provide a useful service to the designer of high-power electronic circuits. The main application areas divide roughly into three. This paper considers the middle ground, that is, the design of power stages, their layout and interconnections and the interface to the controller. It is concerned mainly with decisions affecting the power stage efficiency and reliabil- ity. The other areas are the design of the semiconductor devices themselves and the design of controllers and modulation strategies. This paper is based on studies using the program SPICE [1], mainly for transient analysis in the microsecond time scale. SPICE is a sophisticated program package which has inherent models of active semiconductor devices and version 2G5 is used in the work to be described. The design sequence using the simulation program can be split into a number of stages. First the initial paper design and assessment of operation using estimated values for the interconnection inductances and manufacturers' data for the semiconductor devices. The next stage of prototype construction and testing allows the simulation to be refined and then it may be used with more con- fidence to predict the consequences of, for example, varia- tion in circuit parameters or changes in layout for Paper 4147B (P6), first received 1st March and in revised form 24th June 1985 The authors are with Cambridge University Engineering Department, Trumpington Street, Cambridge, CB2 1PZ, United Kingdom construction purposes. In addition, circuit behaviour under extreme conditions not readily obtainable in the laboratory may be examined. The designer can use the computer both as a form of bench oscilloscope and to modify the circuit free from physical constraints. This is particularly useful as an aid to understanding highly nonlinear circuit behaviour during switching transients. He can simplify part of the circuit to study one particular effect, or vary parameter values to examine circuit sensitivity, select the most suitable devices and determine the best layout for the complete circuit. In order to simulate the switching transient waveforms of the power circuit in detail, the device model parameters as well as cable inductances are quantified with emphasis for power electronic circuits. Also, some modifications have been made to the semiconductor models. The computer simulation is then applied to a 50 kVA transistor chopper using a bipolar transistor Darlington pair as the switching module and simulated results are compared with experimental results. Furthermore, the circuit behaviour is examined under different conditions by varying certain circuit parameters. 2 Circuit representation in the simulation 2.1 Semiconductor device models The charge controlled Gummel Poon transistor model in SPICE is well developed, and the equivalent circuit is shown in Fig. 1. The GP model has a series of parameters C Fig. 1 Transistor model IEE PROCEEDINGS, Vol. 132, Pt. B, No. 6, NOVEMBER 1985 301
Transcript
Computer-aided design of powerelectronic circuits
M.H. Pong. B.Sc, A.M.I.E.E., and R.D. Jackson. M.A.. C.Eng., M.I.E.E.
Indexing terms: Computer simulation, chopper circuits, Power electronics
Abstract: The general purpose circuit simulation package SPICE is used as a design tool for power electroniccircuits. The process involves simulation of the complete circuit in the microsecond timescale, by which circuitbehaviour under different operating conditions can be studied. Semiconductor device models and intercon-nection inductances are examined. The simulation process is applied to a 50 kVA transistorised chopper circuitand the results are discussed and compared with experimental results.
List of symbols
Rc = collector resistance of transistor modelRb = base resistance of transistor modelRe = emitter resistance of transistor modelLc = collector current of transistor modelQbc = base-collector charge of transistor modelQbe = base-emitter charge of transistor modelVs = voltage source to model diode turn-on effectRs = steady state resistance of diode modelId = junction current of diode modelQd = capacitance of diode modelL l 5 L2, L3 = interconnection inductances/ s = saturation current
= base-emitter junction voltage= base-collector junction voltage= forward Early voltage= reverse Early voltage= zero bias Early voltage= junction exponential factor= junction built-in potential
vb,c,vAFvARvAOMJC
VJC
1 Introduction
The present state of computer circuit and device simula-tion programs should enable them to provide a usefulservice to the designer of high-power electronic circuits.The main application areas divide roughly into three. Thispaper considers the middle ground, that is, the design ofpower stages, their layout and interconnections and theinterface to the controller. It is concerned mainly withdecisions affecting the power stage efficiency and reliabil-ity. The other areas are the design of the semiconductordevices themselves and the design of controllers andmodulation strategies. This paper is based on studies usingthe program SPICE [1], mainly for transient analysis inthe microsecond time scale. SPICE is a sophisticatedprogram package which has inherent models of activesemiconductor devices and version 2G5 is used in thework to be described.
The design sequence using the simulation program canbe split into a number of stages. First the initial paperdesign and assessment of operation using estimated valuesfor the interconnection inductances and manufacturers'data for the semiconductor devices. The next stage ofprototype construction and testing allows the simulationto be refined and then it may be used with more con-fidence to predict the consequences of, for example, varia-tion in circuit parameters or changes in layout for
Paper 4147B (P6), first received 1st March and in revised form 24th June 1985
The authors are with Cambridge University Engineering Department, TrumpingtonStreet, Cambridge, CB2 1PZ, United Kingdom
construction purposes. In addition, circuit behaviourunder extreme conditions not readily obtainable in thelaboratory may be examined.
The designer can use the computer both as a form ofbench oscilloscope and to modify the circuit free fromphysical constraints. This is particularly useful as an aid tounderstanding highly nonlinear circuit behaviour duringswitching transients. He can simplify part of the circuit tostudy one particular effect, or vary parameter values toexamine circuit sensitivity, select the most suitable devicesand determine the best layout for the complete circuit.
In order to simulate the switching transient waveformsof the power circuit in detail, the device model parametersas well as cable inductances are quantified with emphasisfor power electronic circuits. Also, some modificationshave been made to the semiconductor models.
The computer simulation is then applied to a 50 kVAtransistor chopper using a bipolar transistor Darlingtonpair as the switching module and simulated results arecompared with experimental results. Furthermore, thecircuit behaviour is examined under different conditions byvarying certain circuit parameters.
2 Circuit representation in the simulation
2.1 Semiconductor device modelsThe charge controlled Gummel Poon transistor model inSPICE is well developed, and the equivalent circuit isshown in Fig. 1. The GP model has a series of parameters
C
Fig. 1 Transistor model
IEE PROCEEDINGS, Vol. 132, Pt. B, No. 6, NOVEMBER 1985 301
which define the transistor characteristics such as thevariation of gain in both the forward and reverse regions.Variation of base resistance with current level is also mod-elled. Transistor base storage effects are modelled by non-linear junction and diffusion capacitances.
The power transistor, as a high voltage device, has awide collector region which accumulates excess chargesdue to base widening in the quasi-saturation and satura-tion region. The SPICE model has been modified [2] toinclude this effect in the transistor DC characteristics. Abrief description of the modifications made is included inAppendix 8.1.
The diode is modelled by a charge controlled modelsimilar to the transistor model, and the equivalent circuitis shown in Fig. 2. Diode characteristics such as cut-in
tZ CL
- 6Fig. 2 Diode model
voltage and diode resistance are modelled. Reverserecovery charge storage is modelled by the depletion anddiffusion capacitances. During the turn-on of a diode, con-ductivity modulation of the diode bulk region bringsabout inductive effects [3, 4]. The SPICE diode model hasbeen modifed by adding a nonlinear voltage source to
include this effect. A brief description of the modificationsmade is included in Appendix 8.2.
The model parameters can theoretically be acquiredfrom knowledge of the device doping profile and certainsemiconductor parameters. However, this will inevitablybe complicated and involve further computer programs forparameter extraction. From the viewpoint of a circuitdesigner, the model parameters should be obtainable frommanufacturers' data or by direct measurements. Anexhaustive list of parameter extraction methods has beenpublished by Getreu [5], and similar methods have beenused for this work.
2.2 Interconnection inductancesWith the rapid developments in power semiconductordevices, rates of change of current up to 1000A/̂ s are notunusual. As a result, interconnection inductances in themicrohenry range impose significant voltage surges uponthe devices during transients.
The inductance of an arbitrary set of interconnectionscan be quantified using the method of partial inductance[6] which takes the detailed physical circuit geometry intoaccount. Alternatively, Grover [7] gives a large number offormulas for calculation of inductances. The inductancesare calculated based on the interconnection geometry anddimensions. In subsequent circuit representations, Grover'sformulas are used as a basis for inductance estimation and,for simplicity, the mutual inductive effects among theinductances are neglected. Also, the variation of induc-tances with frequency is neglected since the separationsbetween the cables are sufficiently wide in most powerelectronic circuits.
Application to a design process
3.1 Simulation of a transistor chopperThe computer simulation is applied to a 600V 80A transis-torised chopper circuit shown in Fig. 3. The switch moduleconsists of a Darlington pair using two power transistors*.Its base drive circuit is modelled by a voltage source in
* Marconi Electronic Devices DT100 and DT47
Li
base drive representation
Osupplyvoltage
Fig. 3 Chopper circuit configuration
302 IEE PROCEEDINGS, Vol. 132, Pt. B, No. 6, NOVEMBER 1985
series with non-linear resistors together with an anti-saturation diode arrangement. Three capacitors Cc areconnected in parallel to give voltage clamping capacitance,which is precharged to line voltage. Interconnection induc-tances are shown by inductors in rectangles and the supplyis modelled by an ideal voltage source.
The turn-off transient of the circuit is simulated andcompared with experimental waveforms captured by adigital storage oscilloscope in Fig. 4. Owing to practicaldifficulties in high power current and voltage measure-ments, a common trigger signal could not be used for the
experimental results. However, the waveforms are alignedby means of the time scale used. For the simulated wave-forms there is no such problem and the results align withone another. Fig. 4A shows the variation in collector-emitter voltage. It can be seen that after the storage timelapse the collector-emitter voltage rises. Because of theenergy stored in the interconnection inductances thecollector-emitter voltage rises above the supply linevoltage and charges up the clamping capacitors producinga voltage plateau above the supply voltage. Figs. 4B, Cand D show current through various paths as indicated in
up the clamping capacitors until the diode connected tothe clamping capacitors cuts off.
The oscillations observed in the experimental wave-forms after the turn-off transient are due to the nonidealsupply used which has parallel electrolytic capacitors withinherent inductance, and these have not been modelled.
3.2 Effect of variation of load currentHaving established the circuit model, the effect of circuitparameter variation can be studied. The load current isvaried about the nominal value over a range of values anda series of waveforms are obtained. The collector-emittervoltage waveforms are shown and compared in Fig. 5.
for specifying the limits of operation frequency andmaximum power dissipation in the devices.
3.3 Effect of variation of interconnection inductancesTo study the effect of various interconnection inductancesupon circuit operations, certain inductances are varied
2 0
1-6
time, ps
load 100current. A 140
Fig. 5 Effect of variation of load currentx-axis: time z-axis: collector-emitter voltagey-axis: load current S = triggering point
Fig. 6 shows that both storage time and current fall timeincrease with load current as the transistor operates moreand more into the saturation region as current increases.Furthermore, Fig. 7 shows the total energy lostf in the
t The energy lost is defined by
frenergy = J3 x Vce dt
Jo
where T = total time duration of the simulated transient.
304
1-2
E= 08
0 4
storage time
20 40 60 80 100load current. A
120 140 160
Fig. 6 Switching times variation with load currentUnit fall time = 0.92 /aUnit storage time = 3.2 /is
2 8
2 4
2 0
" I'D
* 0-8
0 4 y20 40 120 14060 80 100
load current. AFig. 7 Switching energy variation with load currentUnit energy = 26.95 mJ
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about the nominal value while the others are set to zero.Fig. 8 shows the variation of collector-emitter waveforms
r800
600
-400 S
200
6 time, ps
Fig. 8 Effect of variation of interconnection inductancesx-axis: timey-axis: inductancez-axis: collector-emitter voltageS = triggering point
with L2 varying while Lt and L3 are set to zero. It can beseen that, during the turn-off transient, both the magnitudeand duration of the voltage overshoot plateau increaseswith inductance. Similar simulations are computed with Ltvarying while L2 and L3 are set to zero, and L3 varyingwhile L2 and Ll are set to zero.
The results are summarised in Fig. 9, which shows theaverage voltage overshoot due to different interconnectioninductances. It can be seen that the voltage stresses createdby various interconnection inductances are quantitativelyalmost equal, which implies that the interconnectioninductances considered are equally important to circuitoperations. Therefore it is advisable to bring the freewheeldiode close to the switch module in the physical layout in
0 08
007
0066a._- 0 05
tn* 004oa>en2 0 03§
002
001
06 16 180-8 10 1-2 1inductance. |JH
Fig. 9 Voltage overshoot with different interconnection inductancesx x-axis: 2L,; L2 = L3 = 0O x-axis: L2; L, = L3 = 0• x-axis: L3; L, = L2 = 0Unit voltage = 600 V
20
order to minimise the inductances represented by L2 and
4 Discussion
The circuits are described by very stiff differential equa-tions and the stability of the numerical integration algo-rithms must always be carefully assessed. Also, theaccuracy and tolerances specified must be high enough togive accurate results. These are especially important insimulating fast transients with high di/dt and dv/dt rates.The values used are a compromise between computingtime and accuracy, so the accuracies specified should beadjusted until there is no significant change in the simula-tion results.
The closeness of the results from the device models to aset of measured values in the steady state can be assessedsimply using a least-squares criterion over the range ofinterest. It is more difficult to make a quantitative responseunder transient conditions. Although a cross-correlationalgorithm would provide a least-squares measure over agiven time period, the waveforms have only been com-pared visually in this study and measurements made onmajor features such as storage time, rise time and voltageovershoot.
Semiconductor device model limitations must also berealised. For example, the transistor device models used donot model voltage or thermal breakdown effects, butcareful interpretation of the results can provide usefulinformation on device operation close to the limits.
5 Conclusions
From these results, it seems feasible to use the generalpurpose circuit simulation program SPICE as a designtool for power electronic circuits despite its limitations. Itsuse involves the initial assessment of circuit operation, andthe subsequent study of circuit behaviour under variousoperating conditions. Charge controlled semiconductordevice models are used and circuit interconnection induc-tances may be estimated from formulas. Close agreementin most aspects of circuit behaviour has been foundbetween simulated and experimental results for a 50 kVAtransistorised chopper at one set of current and voltage,allowing the circuit behaviour to be studied at differentload currents and with varying interconnection induc-tances.
6 Acknowledgments
This is a SERC supported co-operative project with GECIndustrial Controls Limited. The authors would like toexpress their thanks to Mr. McTaggart and Dr McLough-lin of GEC for their generous support and permission touse the equipment at Rugby. They also gratefully acknowl-edge help and advice provided by Marconi ElectronicDevices Ltd. and financial support from the SERC.
7 References
1 VLADIMIRESCU, A., ZHANG, K., NEWTON, A.R., PEDERSON,D.O., and SANIOVANNI-VINCENTELLI, A.: 'SPICE version 2G:user's guide.' Department of Electrical Engineering and ComputerScience, University of California, Berkeley, CA, USA
2 PONG, M.H., and JACKSON, R.D.: 'Simulating power transistorsusing SPICE2.' Presented at the European Conference on Power Elec-tronics & Applications, Brussels, October 1985
3 KO, W.H.: The forward transient behaviour of semiconductor junc-tion diodes', Solid State Electronics, 1961, 3, pp. 59-69
IEE PROCEEDINGS, Vol. 132, Pt. B, No. 6, NOVEMBER 1985 305
4 MELCHIOR, H., and STRUTT, M.J.O.: 'Small signal equivalentcircuit of unsymmetrical junction diodes at high current densities',IEEE Trans., 1965, ED-12, pp. 47-55
5 GETREU, I.: 'Modelling the bipolar transistor' (Elsevier, 1978)6 BRENNAN, P.A., RAVER, N, and RUEHLI, A.E.: Three-
dimensional inductance computations with partial element equivalentcircuits', IBM J. Res. & Dev., 1979, 23, 6, pp. 661-668
7 GROVER, F.W.: 'Inductance calculations, working formulae & tables'(Instrument Society of America, Dover, 1973)
8 WILLIAMS, B.W.: 'High-voltage high-frequency power-switchingtransistor module with switching-aid-circuit energy recovery', IEEProc. B, Electr. Power Appl., 1984,131, (1), pp. 7-12
9 WRIGHT, G.T., and FRANGOS, P.F.: 'A simple, analytical, one-dimensional model for saturation operation of the bipolar transistor'.International Conference on Simulation of Semiconductor Devices andProcesses, Swansea, 1984, pp. 82-93
In the standard SPICE model, qc is modelled by theequation
qc ='AF
(3)
and there is no differentiation between the linear regionand the quasi-saturation region. In the modified model, qcis given by eqn. 4 in the quasisaturation region:
qc =
where
~Mjc'2 - yiy2 + b)-Mjd2 ){\ + b)Mjc'2
- MJC)VAO
(4)
8 Appendixes
8.1 Modification in the SPICE transistor modelThe Gummel-Poon charge controlled transistor modelrepresents the collector current by eqn. 1 (the base currentterms have been omitted):
lr = ^ ekT — e kT
(1)
where
VJC
b is a constant equal to 0.005, MJC and VJC are SPICEparameters to describe capacitance variation, and VAO isthe zero bias early voltage.
8.2 Modified diode modelWhen a current step is applied to a diode that is initiallynot conducting, a transient voltage overshoot can beobserved. This is due to conductivity modulation in thediode bulk region during the transient period. This effect ismodelled by a nonlinear voltage source A in series with theexisting model and this voltage source is in turn controlledby an external circuit. The circuit is shown in Fig. 10. The
Q2 is the charge component which models high currentinjection effect and Qi models the effects of charge varia-tion due to changes in junction biasing.
(2i is represented by the equation
l
1 — qc —
(2)
where VAR is the reverse early voltage and qc is a mathe-matical entity which can be regarded as the charge storagein the collector-base junction if low level injection wasobtained.
L R2 D2
Fig. 10 Simulation circuit for forward recovery modelling
parameters in the external circuit can be adjusted to suitdifferent diodes.
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