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Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical and Computer Engineering Georgia Institute of Technology [email protected] ECE 8823 A / CS 8803 - ICN Interconnection Networks Spring 2017 http://tusharkrishna.ece.gatech.edu/teaching/icn_s17/
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Page 1: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Lecture 6:Deadlocks - IITushar Krishna

Assistant ProfessorSchool of Electrical and Computer EngineeringGeorgia Institute of Technology

[email protected]

ECE 8823 A / CS 8803 - ICNInterconnection NetworksSpring 2017http://tusharkrishna.ece.gatech.edu/teaching/icn_s17/

Page 2: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Recap: Resource Dependence

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

2

A B

u v w x

C D

Hold (i..e, wait for release)Wait to acquire

Agents

Resources

Resource A is dependent on resource B if it is possible for A to be held-byan agent X and it is also possible for X to wait-for B

u v w x

Resource Dependence Graph

To avoid deadlocks, resource dependence graph should be acyclic

Page 3: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Recap: Network Deadlock§ Agent = packet or flit, Resource = buffer

§ Packet A holds buffer u (in 1) and wants buffer v (in 2)§ Packet B holds buffer v (in 2) and wants buffer w (in 3)§ Packet C holds buffer w (in 3) and wants buffer x (in 0)§ Packet D holds buffer x (in 0) and wants buffer u (in 1)

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

3

0 1

23

A

BC

Du

vw

x

We will use the following convention: channel == buffer at end of channel

Channel 01 blocked => Buffer at 1 not free

Channel 01 depends on Channel 12 => Buffer at 1 depends on Buffer at 2

Page 4: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Deadlock Avoidance¡Eliminate cycles in Resource Dependency Graph¡ Resource Ordering¡ Enforce a partial/total order on the resources, and insist that

an agent acquire the resources in ascending order¡ Deadlock avoided since a cycle must contain at least one

agent holding a higher numbered resource waiting for a lower-numbered resource which is not allowed by the ordering allocation

¡ Implementation¡ Restrict certain routes so that a higher numbered resource

cannot wait for a lower numbered resource¡ Partition the buffers at each node such that they belong to

different resource classes. A packet only any route can only acquire buffers in ascending order of resource class

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

4

Page 5: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Example: Channel Dependency Graph for Mesh

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

5

F

A B

E D

C

Acyclic CDG

Disable certain edges

FEED

DC CBBE EF FA

AFBA

EBDECDBCAB

Cyclic CDG

FEED

DC CBBE EF FA

AFBA

EBDECDBCAB

This is the West-first turn model!

Page 6: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Acyclic CDG for a Ring

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

6

F

A B

E D

C

FE

ED DC

CB

BAAF

CD

DE EF

FA

ABBC

Option 3

Problem?

Route from E to C disabled(E to D) and (D to C) allowed

Route from B to D disabled

Acceptable CDGE to C no longer minimal

CDG

Page 7: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Acyclic CDG for a Large Ring

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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H

C D

G F

E

I

B

J

A

G, H, I have to take non-minimal paths to reach E!

D, C, B have to take non-minimal paths to reach F

Problem?

Page 8: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Suppose two channels

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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F

A B

E D

C

FE0

ED0 DC0

CB0

BA0AF0

CD0

DE0 EF0

FA0

AB0BC0

ED1 DC1

FE1

AF1 BA1

CB1

DE1 EF1

CD1

AF1 BA1

FA1

Dateline

DatelineDateline

Page 9: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Need not be physical channels

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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FE0

ED0 DC0

CB0

BA0AF0

CD0

DE0 EF0

FA0

AB0BC0

ED1 DC1

FE1

AF1 BA1

CB1

DE1 EF1

CD1

AF1 BA1

FA1

Dateline

DatelineDateline

Need at least 2 classes of buffers - called“Virtual Channels”Start in VC in Class0After Dateline, jump to VC in Class1

F

A B

E D

C

Page 10: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Deadlock Avoidance¡Eliminate cycles in Resource Dependency Graph¡ Resource Ordering¡ Enforce a partial/total order on the resources, and insist that

an agent acquire the resources in ascending order¡ Deadlock avoided since a cycle must contain at least one

agent holding a higher numbered resource waiting for a lower-numbered resource which is not allowed by the ordering allocation

¡ Implementation¡ Restrict certain routes so that a higher numbered resource

cannot wait for a lower numbered resource¡ Partition the buffers at each node such that they belong to

different resource classes. A packet only any route can only acquire buffers in ascending order of resource class

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

10

Page 11: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Using VCs for Deadlock Avoidance¡Ring¡Use VC from class 0 before dateline¡Use VC from class 1 after dateline

¡Fully-Oblivious (e.g., O1turn)¡Use VC 0 for XY, VC 1 for YX

¡Fully-Adaptive Routing (no turns restricted)¡Use VC from class 0 before turning¡Use VC from class 1 after turning

¡Valiant’s Routing Algorithm¡DOR over VC in class 0 from source till intermediate¡DOR over VC in class 1 from intermediate to destination

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Page 12: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

VC utilization

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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F

A B

E D

C

Problem?Ring with Dateline

Mesh with O1Turn

VC from Class 1 never used!

Packet on Ring never crosses datelinePacket on Mesh does not make any turns

Class 0

Class 1

Solution: Overlapping Resource Classes

Class 0Class 1

As long at least one buffer per class, can guarantee deadlock freedom

Page 13: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Deadlock Avoidance¡So far, we said deadlock is avoided if cycles

eliminated in Channel Dependence Graph¡ Remove cycles via turn restriction¡ Convert cyclic CDG into a spiral using VCs¡ Called extended CDG

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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FE0

ED0 DC0

CB0

BA0AF0

CD0

DE0 EF0

FA0

AB0BC0

ED1 DC1

FE1

AF1 BA1

CB1

DE1 EF1

CD1

AF1 BA1

FA1

Page 14: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Deadlock Avoidance¡So far, we said deadlock is avoided if cycles

eliminated in Channel Dependence Graph¡ Remove cycles via turn restriction¡ Convert cyclic CDG into a spiral using VCs¡ Called extended CDG

¡However, it is possible for a (extended) CDG to have cycles and still be deadlock-free (Duato*, 1993)¡ As long as the cycle connects to some sub-graph within

the (extended) CDG that is acyclic¡ Known as the escape path or escape VC

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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*José Duato. A new theory of deadlock-free adaptive routing in wormhole networks.IEEE Transactions on Parallel and Distributed Systems, 4(12):1320–1331, December 1993.

Page 15: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

CDG for Escape VCs

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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FE0

ED0 DC0

CB0

BA0AF0

ED1 DC1

FE1

AF1 BA1

CB1

F

A B

E D

C

Escape VC

Acyclic Escape VC

Page 16: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Why escape VCs work¡ Intuitively, at least one packet in the cycle has an

option to take an acyclic route¡ Packets should not wait on any specific channel¡ If allocation is fair, escape VCs guaranteed to show up

eventually

¡Use of escape channels by a message is not unidirectional¡ If a message enters the escape network it can move

back to the adaptive network, and vice versa, if minimal* routes¡ *for non-minimal routes, message has to continue on

escape VC once it gets in, without going back to the adaptive VCs

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Page 17: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Example¡Consider a 2D Mesh with 8 VCs and minimal

routing¡VC 1-7 can use any arbitrary minimal routing¡ Cyclic CDG

¡VC 0 (escape VC) is restricted to DOR (provides escape path)¡ Acyclic CDG

¡As long as a packet can allocate all VCs fairly, there will always be an escape path available in case the network deadlocks

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Page 18: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Example

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Escape VC

West-first

Regular VCs

Deadlock-free escape path

Page 19: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Rules for getting in/out of escape VCs¡The escape VC should

always makes forward progress!¡A flit that is going NW or

SW should never enter a router from the S or N port in escape VC, else SàW or NàW turn is inevitable¡How to guarantee this?¡ When selecting VC at

previous router¡ Lab 3!

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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VC 1 (escape VC)West-first

VC 0 (regular VC)

X?

Ejection not shown

Page 20: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Deadlock Avoidance¡Routing¡ Turn Model in a Mesh¡ Acyclic CDG

¡Buffer Assignment¡ Acquire VCs in ascending order¡ Acyclic extended CDG

¡ Escape VCs¡ Cyclic CDG + Acyclic sub-graph

¡Flow Control¡ Control traffic flow such that deadlock does not occur¡ Cyclic CDG + injection control to avoid dependence cycle

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Page 21: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Bubble Flow Control

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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F

A B

E D

C

Ring Traversal Rule: traverse if one bubble free

V. Puente et al. The adaptive bubble router. Journal of Parallel and Distributed Computing, 2001.

Page 22: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Bubble Flow Control

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Ring Traversal Rule: traverse if one bubble free

F

A B

E D

CV. Puente et al. The adaptive bubble router. Journal of Parallel and Distributed Computing, 2001.

Should it inject?BFC Injection Rule:only inject if 2 bubbles free.

Page 23: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Bubble Flow Control

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Ring Traversal Rule: traverse if one bubble free

F

A B

E D

C

BFC Injection Rule:only inject if 2 bubbles free.

V. Puente et al. The adaptive bubble router. Journal of Parallel and Distributed Computing, 2001.

Problem?

Page 24: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Bubble Flow Control

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Ring Traversal Rule: traverse if one bubble free

BFC Injection Rule:only inject if 2 bubbles free.

V. Puente et al. The adaptive bubble router. Journal of Parallel and Distributed Computing, 2001.

F

A B

E D

C

Not allowed to inject!Even though no deadlock

Page 25: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Critical Bubble Flow Control

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Ring Traversal Rule: traverse if one bubble free

CBFC Injection Rule:only inject if not critical bubble.

F

A B

E D

C

Allowed to inject!

L. Chen et al., “Critical Bubble Scheme: An Efficient Implementationof Globally Aware Network Flow Control,” IPDPS 2011

Critical Bubble

Page 26: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Critical Bubble Flow Control

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Ring Traversal Rule: traverse if one bubble free

CBFC Injection Rule:only inject if not critical bubble.

F

A B

E D

CL. Chen et al., “Critical Bubble Scheme: An Efficient Implementationof Globally Aware Network Flow Control,” IPDPS 2011

Critical Bubble

How does critical bubble move?If flit moves into critical bubble, its own buffer becomes new critical bubble

Page 27: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Dealing with Deadlocks¡Avoidance¡Guarantee that the network will never deadlock¡Almost all modern networks use deadlock avoidance

¡Recovery¡Detect deadlock and correct

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Page 28: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Deadlock Recovery¡When might this make sense?¡ Cannot accept performance degradation required to avoid

deadlocks¡ Average-case performance more important

¡ Two phases¡ Detection: ¡ E.g., timeouts attached with each resource¡ Can lead to false positives

¡ Recovery:¡ Regressive – remove packets/connections that are deadlocked¡ E.g., drop packets after timeout

¡ Progressive – recover without removing packets/connections¡ E.g. shared escape buffer to drain deadlocked packets

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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K. V. Anjan and T. M. Pinkiston, “An efficient fully adaptive deadlock recovery scheme: DISHA”, ISCA 1995

Page 29: Lecture 6: Deadlocks - IItusharkrishna.ece.gatech.edu/.../sites/175/2016/10/L06-Deadlocks-II.pdf · Lecture 6: Deadlocks - II Tushar Krishna Assistant Professor School of Electrical

Another kind of deadlock: Protocol Deadlock

January 30, 2017ICN | Spring 2017 | L06: Deadlocks-II © Tushar Krishna, School of ECE, Georgia Tech

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Cache 0

Directoryreqreqreqreq

req

req

req

resp

resp

req

req

out

out

in

in

req

Cache / Directory can process a request only if there is space in its output queue to send a response

Need separate Virtual Channels* for requests and responses(called Virtual Networks)

Responses should always be drained (“consumption assumption”)

Deadlock, even though network is deadlock-free


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