Microprocessor Part1

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University of TechnologyElectrical Eng. DepartmentMicroprocessor Engineering &Microcontroller

Lecture OneIntroduction to Computer &

Microcomputers Assist.Prof. Dr. Hadeel Nasrat

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INTRODUCTION TO COMPUTER & MICROCOMPUTERS

What is a Computer?

A computer is an electronic machine that accepts information, stores it until

the information is needed, processes the information according to the instructionsprovided by the user, and finally returns the results to the user. The computer can

store and manipulate large quantities of data at very high speed, but a computer

cannot think. A computer makes decisions based on simple comparisons such as

one number being larger than another. Although the computer can help solve a

tremendous variety of problems, it is simply a machine. It cannot solve problems

on its own.

Computer Generations

From the 1950’s, the computer age took off in full force. The years since

then have been divided into periods or generations based on the technology used.

1. First Generation Computers (1945-1954): Vacuum Tubes

The first computers used vacuum tubes for circuitry and magnetic drums for

memory, and were often enormous, taking up entire rooms. They were very expensive to

operate and in addition to using a great deal of electricity, generated a lot of heat, which

was often the cause of malfunctions.

First generation computers relied on machine language, the lowest-level

programming language understood by computers, to perform operations, and they could

only solve one problem at a time. Input was based on punched cards and paper tape,

and output was displayed on printouts.

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The UNIVAC and ENIAC computers are examples of first-generation computing

devices. The UNIVAC was the first commercial computer delivered to a business client,

the U.S. Census Bureau in 1951.

2. Second Generation (1955-1964): Transistors

Transistors replaced vacuum tubes and ushered in the second generation of

computers. The transistor was invented in 1947 but did not see widespread use in

computers until the late 1950s. The transistor was far superior to the vacuum tube,

allowing computers to become smaller, faster, cheaper, more energy-efficient and morereliable than their first-generation predecessors. Though the transistor still generated a

great deal of heat that subjected the computer to damage, it was a vast improvement

over the vacuum tube. Second-generation computers still relied on punched cards for

input and printouts for output.

Second-generation computers moved from cryptic binary machine language to symbolic,

or assembly, languages, which allowed programmers to specify instructions in words.

High-level programming languages were also being developed at this time, such as early

versions of COBOL and FORTRAN. These were also the first computers that stored their

instructions in their memory, which moved from a magnetic drum to magnetic core

technology.

The first computers of this generation were developed for the atomic energy industry.

3. Third Generation (1965-1971): Integrated Circuits (ICs)

IC’s were again smaller, cheaper, faster and more reliable than transistors.Speeds went from the microsecond to the nanosecond (billionth) to the

picosecond (trillionth) range. ICs were used for main memory despite the

disadvantage of being volatile. Minicomputers were developed at this time.

Terminals replaced punched cards for data entry and disk packs became popular

for secondary storage. IBM introduced the idea of a compatible family of

computers, 360 family easing the problem of upgrading to a more powerful

machine. Operating systems were developed to manage and share the computingresources and time-sharing operating systems were developed. These greatly

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improved the efficiency of computers. Computers had by now pervaded most

areas of business and administration. The number of transistors that be fabricated

on a chip is referred to as the scale of integration (SI). Early chips had SSI (small

SI) of tens to a few hundreds. Later chips were MSI (Medium SI): hundreds to a

few thousands. Then came LSI chips (Large SI) in the thousands range.

4. Fourth Generation (1971-Present) Microprocessors

The microprocessor brought the fourth generation of computers, as thousands of

integrated circuits were built onto a single silicon chip. What in the first generation filled

an entire room could now fit in the palm of the hand. The Intel 4004 chip, developed in

1971, located all the components of the computer—from the central processing unit and

memory to input/output controls—on a single chip.

In 1981 IBM introduced its first computer for the home user, and in 1984 Apple

introduced the Macintosh. Microprocessors also moved out of the realm of desktop

computers and into many areas of life as more and more everyday products began to

use microprocessors.

As these small computers became more powerful, they could be linked together to form

networks, which eventually led to the development of the Internet. Fourth generation

computers also saw the development of GUIs, the mouse and handheld devices.

5. Fifth Generation (Present and Beyond) Arti fic ial Intelligence

Fifth generation computing devices, based on artificial intelligence, are still in

development, though there are some applications, such as voice recognition, that are

being used today. The use of parallel processing and superconductors is helping to

make artificial intelligence a reality. Quantum computation and molecular and

nanotechnology will radically change the face of computers in years to come. The goal of

fifth-generation computing is to develop devices that respond to natural language input

and are capable of learning and self-organization.

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Generation Technology & Architecture Software & Appl ications

Systems

First(1945-54)

Vacuum tubes, Relay memories,CPU driven by PC and accumulator;fixed point Arithmetic

Machine & Assemblylanguage, Single userBasic I/O usingprogrammed andInternet mode.

ENIAC TIFRACIBM 701 PrincetonIAS

Second(1955-64)

Discrete Transistors, Core Memories,Floating point, Arithmetic I/O,processors, Multiplexed memoryaccess

HLL used withcompilers, batchprocessing, Monitoring,Libraries

IBM7099

CDC 1604

Third(1965-71)

Integrated circuits,Microprogramming, Pipelining,Caching, Lookahead Processing

Multiprogramming, Timesharing OS, Multi-userapplications

IBM 360/700CDC 6000TA-ASC PDP-8

Fourth(1971-

Present)

LSI/VLSI and Semiconductormemory, Microprocessorstechnology, Multiprocessors, vectorsuper-computing, multi computer

Multiprocessor OS,languages, Compilers

VAX 9800, Cray X-MP, IBM 3600,Pentium Processorbased systems(PCs), Ultra SPARC

Fifth(present &Beyond)

artificial intelligence and still in

development,

parallel processing, superconductors,

voice recognition Applications

Cray/MPP, TMC/CM-5, Intel paragon,Fujitsu VP500

Types of Computers

Computer now comes in a variety of shapes and sizes, which could be roughly

classified according to their processing power into five sizes: super large, large,

medium, small, and tiny.

Microcomputers are the type of computers that we are most likely to notice and use in

our everyday life. In fact there are other types of computers that you may use directly or

indirectly:

Supercomputers-super large computers: super computers are high- capacity

machines with hundreds of thousands of processors that can perform more than 1

trillion calculations per second. These are the most expensive but fastest

computers available. "Supers," as they are called, have been used for tasks

requiring the processing of enormous volumes of data, such as doing the U.S.

census count, forecasting weather, designing aircraft, modeling molecules,breaking codes, and simulating explosion of nuclear bombs.

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Mainframe computers - large computers: The only type of computer

available until the late 1960s, mainframes are water- or air-cooled computers that

vary in size from small, to medium, to large, depending on their use. Small

mainframes are often called midsize computers; they used to be called

minicomputers. Mainframes are used by large organizations such as

banks, airlines, insurance companies, and colleges-for processing millions of

transactions. Often users access a mainframe using a terminal, which has a

display screen and a keyboard and can input and output data but cannot by itself

process data.

Workstations - medium computer: Introduced in the early 1980s, workstations,

are expensive, powerful computers usually used for complex scientific,

mathematical, and engineering calculations and for computer-aided design and

computer-aided manufacturing. Providing many capabilities comparable to

midsize mainframes, workstations are used for such tasks as designing airplane

fuselages, prescription drugs, and movie special effects. Workstations have

caught the eye of the public mainly for their graphics capabilities, which are used

to breathe three-dimensional life into movies such as Jurassic Park and Titanic.

The capabilities of low-end workstations overlap those of high-end desktop

microcomputers.

Microcomputer - small computers: Microcomputers, also called personal

computers (PC), can fit next to a desk or on a desktop, or can be carried around.

They are either stand-alone machines or are connected to a computer network,

such as a local area network. A local area network (LAN) connects, usually byspecial cable, a group of desktop PCs and other devices, such as printers, in an

office or a building. Microcomputers are of several types:

• Desktop PCs: are those in which the case or main housing sits on a desk,

with keyboard in front and monitor (screen) often on top.

• Tower PCs: are those Microcomputer in which the case sits as a "tower,"

often on the floor beside a desk, thus freeing up desk surface space.

•

Laptop computers (also called notebook computers): are lightweight portablecomputers with built-in monitor, keyboard, hard-disk drive, battery, and AC


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adapter that can be plugged into an electrical outlet; they weigh anywhere from

1.8 to 9 pounds.

• Personal digital assistants (PDAs) (also called handheld computers or

palmtops) combine personal organization tools-schedule planners, address

books, to-do lists. Some are able to send e-mail and faxes. Some PDAs have

touch-sensitive screens. Some also connect to desktop computers for sending

or receiving information.

• Microcontrollers-tiny computers: Microcontrollers, also called embedded

computers, are the tiny, specialized microprocessors installed in "smart"

appliances and automobiles. These microcontrollers enable PDAs microwave

ovens, for example, to store data about how long to cook your potatoes and at

what temperature.

Basic Blocks of a Microcomputer

All Microcomputers consist of (at least):

1. Microprocessor Unit (MPU) MPU is the brain of microcomputer

2. Program Memory (ROM)

3. Data Memory (RAM)

4. Input / Output ports

5. Bus System

Fig. (1): Basic Block of a Microcomputer


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Input Units -- "How to tell it what to do"

Devices allow us to enter information into the computer. A keyboard and

mouse are the standard way to interact with the computer. Other devices include

mice, scanners, microphones, joysticks and game pads used primarly for games.

Output Units -- "How it shows you what it is doing"

Devices are how the manipulated information is returned to us. They

commonly include video monitors, printers, and speakers.

Bus System

A Bus is a common communications pathway used to carry information

between the various elements of a computer system

The term BUS refers to a group of wires or conduction tracks on a printed

circuit board (PCB) though which binary information is transferred from one

part of the microcomputer to another

The individual subsystems of the digital computer are connected through an

interconnecting BUS system.

There are three main bus groups

ADDRESS BUS

DATA BUS

CONTROL BUS

Data Bus

The data bus consists of 8, 16, or 32 parallel signal lines. As indicated by the

double-ended arrows on the data bus line in Figure 1, the data bus lines are

bidirectional. This means that the CPU can read data in from memory or from a

port on these lines, or it can send data out to memory or to a port on these lines.

Many devices in a system will have their outputs connected to the data bus, but

only one device at a time will have its outputs enabled. Any device connected on

the data bus must have three-state outputs so that its outputs can be disabled


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when it is not being used to put data on the bus.

The Data Bus carries the data which is transferred throughout the system. (

bi-directional)

Examples of data transfers

Program instructions being read from memory into MPU.

Data being sent from MPU to I/O port

Data being read from I/O port going to MPU

Results from MPU sent to Memory

These are called read and write operations

Address Bus

The address bus consists of 16, 20, 24, or 32 parallel signal lines. On these lines the

CPU sends out the address of the memory location that is to be written to or read from.

The number of memory locations that the CPU can address is determined by the number

of address lines. If the CPU has N address lines, then it can directly address 2N memory

locations. For example, a CPU with 16 address lines can address 216 or 65,536 memory

locations, a CPU with 20 address lines can address 220 or 1,048,576 locations, and a

CPU with 24 address lines can address 224 or 16,777,216 locations. When the CPU

reads data from or writes data to a port, it sends the port address out on the address

bus.

An address is a binary number that identifies a specific memory storage

location or I/O port involved in a data transfer

The Address Bus is used to transmit the address of the location to the

memory or the I/O port.

The Address Bus is unidirectional ( one way ): addresses are always issued

by the MPU.

Control BusThe control bus consists of 4 to 10 parallel signal lines. The CPU sends out

signals on the control bus to enable the outputs of addressed memory devices or

port devices. Typical control bus signals are Memory Read, Memory Write, I/ORead, and l/O Write. To read a byte of data from a memory location, for example,


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the CPU sends out the memory address of the desired byte on the address bus and

then sends out a Memory Read signal on the control bus. The Memory Read signal

enables the addressed memory device to output a data word onto the data bus. The

data word from memory travels along the data bus to the CPU.

The Control Bus: is another group of signals whose functions are to provide

synchronization ( timing control ) between the MPU and the other system

components.

Control signals are unidirectional, and are mainly outputs from the MPU.

Example Control signals

RD: read signal asserted to read data into MPU

WR: write signal asserted to write data from MPU

Main memoryThe memory section usually consists of a mixture of RAM (Random Access

Memory) and ROM (Read Only Memory). It may also have magnetic floppy disks,

magnetic hard disks, or optical disks (CDs, DVDs). Memory has two purposes. Thefirst purpose is to store the binary codes for the sequences of instructions you want

the computer to carry out. When you write a computer program, what you are really

doing is writing a sequential list of instructions for the computer. The second purpose

of the memory is to store the binary-coded data with which the computer is going to

be working. This data might be the inventory records of a supermarket, for example.

The duties of the memory are :

To store programs

To provide data to the MPU on request

To accept result from the MPU for storage

Main memory Types

ROM : read only memory. Contains program (Firmware). does not lose

its contents when power is removed (Non-volatile)

RAM: random access memory (read/write memory) used as variable

data, loses contents when power is removed volatile. When power up

will contain random data values


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Read-Only Memory

uP can read instructions from ROM quickly

Cannot write new data to the ROM

ROM remembers the data, even after power cycled

Typically, when the power is turned on, the microprocessor will start fetching

instructions from the still-remembered program in ROM (bootstrap )

Available ROMs

Masked ROM or just ROM

PROM or programmable ROM(once only)

EPROM (erasable via ultraviolet light)

Flash (can be erased and re-written about 10000 times, usually must write a

whole block not just 1 byte or 2 bytes, slow writing, fast reading)

EEPROM (electrically erasable read-only memory, also known as EEROM—

both reading and writing are very slow but can program millions of

times…useless for storing a program but good for say configuration

information.

ROM

Capacity: 2m+1

OE : Output Enable connect to RD of uP

CE , )CS : Chip Enable to Address decoder

A0

A1

A2

Am

D0

Dn

D1

D2

OE CE

n+1m+1 bit

Addres

)1(2 1 +×+ nm

ROM

PROM

EEPROM

bitData


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RAM (Random Access Memory)

The uP can read the data from RAM quickly,

The uP can write new data quickly to RAM

RAM forgets its data if power is turned off

Two type of is available :

Static RAM(SRAM): ff base, fast, expensive, low cap/vol, applied for

cache , no refresh Dynamic RAM (DRAM): cap base, slow , low cost high capacity/volume

, applied for main memory(pc) need refresh.

Capacity: 2m+1

RD : Read signal connect to MemRD of uP

WR : Write signal connect to MemWR of uP

CS : Chip Select to Address decoder

Central Processing Unit

The central processing unit or CPU controls the operation of the computer. In a

computer the CPU is a microprocessor. The CPU fetches binary-coded instructions

m+1 bit

Address

A0

A1

A2

Am

D0

Dn

D1

D2

RDWR

n+1 bit

Data )1(21

+×+

nm

RAM

CS

Data bus is


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from memory, decodes the instructions into a series of simple actions, and carries out

these actions in a sequence of steps. The CPU also contains an address counter or

instruction pointer register, which holds the address of the next instruction or data

item to be fetched from memory; general-purpose registers, which are used for

temporary storage of binary data; and circuitry, which generates the control bus

signals.

Computer Architecture

In computer engineering, computer architecture is the conceptual design andfundamental operational structure of a computer system. It is a blueprint and functional

description of requirements (especially speeds and interconnections) and design

implementations for the various parts of a computer — focusing largely on the way by

which the central processing unit (CPU) performs internally and accesses addresses in

memory.

Computer architecture comprises at least three main subcategories

Instruction set architecture, or ISA, is the abstract image of a computing

system that is seen by a machine language (or assembly language) programmer,

including the instruction set, memory address modes, processor registers, and

address and data formats.

Microarchitecture, also known as Computer organization is a lower level, more

concrete, description of the system that involves how the constituent parts of the

system are interconnected and how they interoperate in order to implement theISA. The size of a computer's cache for instance, is an organizational issue that

generally has nothing to do with the ISA.

System Design which includes all of the other hardware components within a

computing system such as:

• system interconnects such as computer buses and switches

• memory controllers and hierarchies

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• CPU off-load mechanisms such as direct memory access issues like multi-

processing.

Once both ISA and microarchitecture has been specified, the actual device needs to be

designed into hardware. This design process is often called implementation.

Implementation is usually not considered architectural definition, but rather hardware

design engineering.

Computer Organization deals with the advances in computer architecture right from the

Von Neumann machines to the current day super scalar architectures.

Von Neumann Architecture

The earliest computing machines had fixed programs. Some very simple

computers still use this design, either for simplicity or training purposes. For example, a

desk calculator (in principle) is a fixed program computer. It can do basic mathematics,

but it cannot be used as a word processor or to run video games. To change the

program of such a machine, you have to re-wire, re-structure, or even re-design the

machine. Indeed, the earliest computers were not so much "programmed" as they were"designed". "Reprogramming", when it was possible at all, was a very manual process,

starting with flow charts and paper notes, followed by detailed engineering designs, and

then the often-arduous process of implementing the physical changes.

The idea of the stored-program computer changed all that. By creating an

instruction set architecture and detailing the computation as a series of instructions (the

program), the machine becomes much more flexible. By treating those instructions in the

same way as data, a stored-program machine can easily change the program, and can

do so under program control.

The von Neumann architecture is a computer design model that uses a

processing unit and a single separate storage structure to hold both instructions and data

as shown in Fig. (2). It is named after mathematician and early computer scientist John

von Neumann. Such a computer implements a universal Turing machine, and the

common "referential model" of specifying sequential architectures, in contrast with

parallel architectures. The term "stored-program computer" is generally used to mean a

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computer of this design, although as modern computers are usually of this type, the term

has fallen into disuse. All general-purpose computers are now based on the key

concepts of the von Neumann architecture.

Though the von Neumann model is universal in general-purpose computing, it

suffers from one obvious problem. All information (instructions and data) must flow back

and forth between the processor and memory through a single channel, and this channel

will have finite bandwidth. When this bandwidth is fully used the processor can go no

faster. This performance limiting factor is called the von Neumann bottleneck.

Hardvard Architecture

A Harvard Architecture as shown in Fig. (3) has one memory for instructions and a

second for data. The name comes from the Harvard Mark 1, an electromechanical

computer which pre-dates the stored-program concept of von Neumann, as does the

architecture in this form. It is still used for applications which run fixed programs, in

areas such as digital signal processing, but not for general-purpose computing. The

Fig. (2): The Von-Neumann Architecture


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advantage is the increased bandwidth available due to having separate communication

channels for instructions and data; the disadvantage is that the storage is allocated to

code and data in a fixed ratio.

In Harvard architecture, there is no need to make the two memories share

characteristics. In particular, the word width, timing, implementation technology, and

memory address structure can differ. Instruction memory is often wider than data

memory. In some systems, instructions can be stored in read-only memory while data

memory generally requires read-write memory. In some systems, there is much moreinstruction memory than data memory so instruction addresses are much wider than data

addresses.

A pure Harvard architecture computer suffers from the disadvantage that

mechanisms must be provided to separately load the program to be executed into

instruction memory and any data to be operated upon into data memory. Additionally,

modern Harvard architecture machines often use a read-only technology for the

instruction memory and read/write technology for the data memory. This allows the

computer to begin execution of a pre-loaded program as soon as power is applied. The

data memory will at this time be in an unknown state, so it is not possible to provide any

kind of pre-defined data values to the program.

Fig. (3): The Harvard architecture

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The solution is to provide a hardware pathway and machine language instructions

so that the contents of the instruction memory can be read as if they were data. Initial

data values can then be copied from the instruction memory into the data memory when

the program starts. If the data is not to be modified (for example, if it is a constant value,

such as pi, or a text string), it can be accessed by the running program directly from

instruction memory without taking up space in data memory (which is often at a

premium).

For instance each port may be supplied from its own local cache memory (fig.(4)). The cache memories reduce the external bandwidth requirements sufficiently to

allow them both to be connected to the same main memory, giving the bandwidth

advantage of a Harvard architecture along with most of the flexibility of the simple von

Neumann architecture. (The flexibility may be somewhat reduced because of cache

consistency problems with self-modifying code). Note that this type of Harvard

architecture is still a von Neumann machine.

Fig. (4): A modified Harvard Architecture

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Hardware, Software, and Firmware

When working around computers, you hear the terms hardware, software, and

firmware almost constantly. Hardware is the name given to the physical devices and

circuitry of the computer. Software refers to the programs written for the computer.

Firmware is the term given to programs stored in ROMs or in other devices which

permanently keep their stored information.

Peripheral Interface Categories:

We can classify the interface according to the specification of the peripherals

themselves.

Analogue/Digi tal Interface To interface two peripherals one of them is digital

and the other one is analog we have to add analog to digital converter ( ADC) and

digital to analog converter (DAC). See figure 5.

Synchronized/A synchronized Interface Two important categories of

interface are used to connect peripherals: the first one is the synchronized

interface which depends on a clock to order the data transfer. The second one is

the asynchronized interface which can be accomplished without clock. To

interface these peripherals together we need handshaking adaptor which

regulates the data exchange between them. See figure 6.

Fig.(5): Analog Digital Interface


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Serial/Parallel Interface To interface two peripherals one of them is parallel

and the second is serial we have to use parallelizing and serializing stages to

connect both of them. The parallelizing stage converts the serial pulses into

parallel data while the serializing stage converts the parallel data into serialpulses. See figure 7.

Fig.(7): Parallel Serial Interface

Fig.(6): Synchronized/Asynchronized Interface


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Microprocessor based Interface

The microprocessor can be interfaced with the peripherals via several techniques, they

are:

1. Memory space interface. This is the most common type. It is flexible and reliable

to be applied in any application. Moreover it supports data cash transfer. It can

also be accomplished by several data communication techniques. The drawback

of this technique is the complicated design and usage.

2. I/O ports interface such as serial and parallel ports. I/O port interface is simpler

but less efficient and than memory interface.

3. Interrupts (Hard interrupts)

4. Direct bus interface using internal buses such as ISA, EISA, PCI, USB, AGP, see

figure 8.

5. Indirect bus interface using external buses such as GPIB, SCSI, CAMAC, etc.,

see figure 8.

Bus

When referring to a computer, the bus also known as the address bus, data bus,

or local bus is a data connection between two or more devices connected together. For

example a bus enables a computer processor to communicate with the memory or a

video card to communicate with the memory.

Fig. 8: Direct/Indirect Bus Interface


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A bus is capable of being (parallel or a serial bus), (Synchronized or A

synchronized) and today all computers utilize two types of buses, an internal or

local bus and an external bus. An internal bus enables a communication between

internal components such as a computer video card and memory (e.g. ISA, EISA,

PCI, AGP, etc.) and an external bus is capable of communicating with external

components such as a SCSI bus, CAN, CAMAC, GPIB, etc.

A computer or devices bus speed or throughput is always measured in bits per

second or megabytes per second.

The bus is not only cable connection but also hardware (bus architecture),

protocol, software, and bus controller

BUS Basics

A computer bus is a method of transmitting data from one part of the computer to

another part of the computer. The computer bus connects all devices to the computer

CPU and main memory. The computer bus consists of three parts the address bus, a

data bus and control bus . The data bus transfers actual data whereas the address bus

transfers information about where the data should go. The control bus exchanges all

control signals. The following part contains a brief overview on each of the computer

buses.

Definitions:

1- PnP

Short for Plug and Play, PnP is an ability of a computer to detect and configure a

new piece of hardware automatically, without the requirement of the user to physically

configure the hardware device with jumpers or dipswitches. Plug and Play was

introduced on IBM compatible computers with the release of Microsoft Windows 95,

where Apple Macintosh computers have always supported the ability to automatically

detect and install hardware.

For Plug and Play to operate properly on IBM compatible computers the user must have

the following:


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BIOS supporting Plug and Play.

Operating systems supporting PnP.

Peripheral with PnP support.

Today all new computers have PnP capabilities. Computers running Microsoft Windows

XP no longer support non PnP devices.

2- Throughput (Baud-rate, Speed)

Also known as "communication speed", throughput is a numerical value used to

illustrate the total amount of data transferred being transferred through the computer ordevice at that given time. This number is commonly represented in bits per second

(bps) or bytes per second (Bps).

3- Proprietary

Term used to describe a product that is only compatible with a specific type of

hardware, software, computer or manufacturer. When referring to computer hardware, it

is recommended that you do not choose a proprietary device as it reduces compatibility

and generally the capability of upgrading that product in the future.

ISA BUS

Introduced by IBM, ISA or Industry Standard Architecture was originally an 8-bit

bus that was later expanded to a 16-bit bus in 1984. When this BUS was originally

released it was a proprietary BUS, which allowed only IBM to create peripherals and the

actual interface. However in the early 1980's other manufacturers were creating the bus.

In 1993, Intel and Microsoft introduced a PnP ISA bus that allowed the computer to

automatically detect and setup computer ISA peripherals such as a modem or sound

card. Using the PnP technology an end-user would have the capability of connecting a

device and not having to configure the device using jumpers or dipswitches.

To determine if an ISA card is an 8-bit or 16-bit card physically look at the card. You will

notice that the first portion of the slot closest to the back of the card is used if the card is

an 8bit card. However, if both sections of the card are being utilized the card is a 16-bit

card.


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Many manufacturers are trying to eliminate the usage of the ISA slots however for

backwards compatibility you may find 1 or 2 ISA slots with additional PCI slots, AGP

slots, etc. However, today you may also have a motherboard that has no ISA slots. We

highly recommend when purchasing any new internal expansion card that you stay away

from ISA as it has for the most part disappeared.

EISA BUS

Short for Extended Industry Standard Architecture, EISA was announced

September of 1988. EISA is a computer bus designed by 9 competitors to compete withIBM's MCA BUS. These competitors were AST Research, Compaq, Epson, Hewlett

Packard, NEC, Olivetti, Tandy, WYSE, and Zenith Data Systems.

The EISA Bus provided 32-bit slots at an 8.33 MHz cycle rate for the use with

386DX, or higher processors. In addition the EISA can accommodate a 16-bit ISA card in

the first row.

Unfortunately, while the EISA bus is backwards compatible and is not a

proprietary bus the EISA bus never became widely used and is no longer found in

computers today.


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MCA BUS

Short for Micro Channel Architecture, MCA was introduced by IBM in 1987,

MCA or the Micro Channel bus was a competition for ISA BUS. The MCA bus offered

several additional features over the ISA such as a 32-bit bus, automatically configure

cards (similar to what Plug and Play is today), and bus mastering for greater efficiency.

One of the major downfalls of the MCA bus was it being a proprietary BUS and because

of competing BUS designs. The MCA BUS never became widely used and has since

been fazed out of the desktop computers.

PCI BUS

Introduced by Intel in 1992, revised in 1993 to version 2.0, and later revised in

1995 to PCI 2.1. PCI is short for Peripheral Component Interconnect and is a 32-bit

computer bus that is also available as a 64-bit bus today. The PCI bus is the most

commonly used and found bus in computers today.

MINI PCI

Mini PCI is a new standard which measures at 2.75-inch x 1.81-inch x 0.22-inch is

a new standard developed by leading notebook manufactures. This technology could

allow manufactures to lower their price as the motherboards would be simpler to design.

Type I - Identical to Type II, except requires extra cables for connectors like the

RJ-11 and RJ-45. However, offers more flexibility to where it can be placed in the

computer.

Type II - Used when size is not important. Type II is able to integrate the RJ-11

and RJ-45 connectors and due away with extra cables.

Type III - SO-DIMM style connector that can be installed with a mere 5 mm overall

height above the system board. In addition cabling to the I/O connectors allow Type III

cards to be placed anywhere in the system.

PCI-X

PCI-X is a high performance bus that is designed to meet the increased I/O

demands of technologies such as Fiber Channel, Gigabit Ethernet and Ultra3 SCSI. PCI-

X capabilities include:


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Up to 133 MHz bus speed

64-Bit bandwidth

1GB/sec throughput

More efficient bus operation for easier interface.

• Split Transactions allows an indicator device to make only one data request and

relinquish the bus. Instead of constantly needing to poll the bus for a response.

• Byte Count that enables indicator to specify in advance the specific number of bytes

requested, eliminating the inefficiency of speculative prefetches.

• Backwards compatibility

AGP

Introduced by Intel in 1997, AGP or Advanced Graphic Port is a 32-bit bus

designed for the high demands of 3-D graphics. AGP has a direct line to the computers

memory which allows 3-D elements to be stored in the system memory instead of the

video memory.

For AGP to work in a computer must have the AGP slot which comes with most Pentium

II and Pentium III machines. The computer also needs to be running Windows 95

OSR2.1, Windows 98, Windows 98 SE, Windows 2000, Windows ME or higher.


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USB Bus

USB (Universal Serial Bus) is a new external bus developed by Intel, Compaq,

DEC, IBM, Microsoft, NEC and Northern Telcom and released to the public in 1996 with

the Intel 430HX Triton II Mother Board. USB has the capability of transferring 12 Mbps,

supporting up to 127 devices and only utilizing one IRQ. For PC computers to take

advantage of USB the user must be running Windows 95 OSR2, Windows 98 or

Windows 2000. Linux users also have the capability of running USB with the proper

support drivers installed. To determine if your computer supports USB on the back, frontor sides of the computer look for a small connector with the following symbol.

USB cables are hot swappable which allows users to connect and disconnect the cable

while the computer is on without any physical damage to the cable.

The above illustration is an example of what the end of a USB connector looks like.

There are two standards of USB connectors. Type A connectors are found on the

computer and or USB hub and Type B connectors are found on the peripheral. All USB

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exceeding this length or utilizing extensions in the cables data loss will occur. The below

illustration is the slots used for each of the connectors shown in the above illustration.

USB VERSIONS

USB 1.0 - The original release of USB supports 127 devices transferring 12 Mbps.

USB 1.1 - Also known as full-speed USB, USB 1.1 is similar to the original release of

USB however minor modifications for the hardware and the specifications. This version

of USB still only supports a rate of 12 Mbps.

USB 2.0 - USB 2.0 also known as hi-speed USB was developed by Compaq, Hewlett

Packard, Intel, Lucent, Microsoft, NEC and Philips and was introduced in 2001. Hi-speed

USB is capable of supporting a transfer rate of up to 480 Mbps and is backwards

compatible meaning it is capable of supporting USB 1.0 and 1.1 devices and cables.


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Exercises:

1) Describe and draw the diagram of Von Neumann model.

2) Define the following abbreviations CPU, RAM and ROM.

3) Classify the system peripheral interface according to three different approaches.

4) Define the following abbreviations ADC, DAC and I/O.

5) Mention several techniques of microprocessor interface.

6) Define and explain the following terms PnP, throughput and proprietary.

7) What are the required conditions for applying PnP technique?8) Define the following abbreviations ISA, PnP, PCI, USB, AGP

9) Compare the performance of the following buses, ISA, EISA, PCI, AGP and USB

10) Write some brief notes about the USB bus


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Univers i ty of Technology

Electr ical Eng. Department

Microprocessor Engineer ing & Microcontro l ler

Lecture Two

Introduct ion to Microprocessors

Ass ist.Prof. Dr. Hadeel Nasrat

Page 1 of 22

INTRODUCTION TO MICROPROCESSORS

Microprocessor

• Microprocessor : A silicon chip that contains a CPU. In the world of personal computers,

the terms microprocessor and CPU are used interchangeably.• A microprocessor (sometimes abbreviated µP) is a digital electronic component with

miniaturized transistors on a single semiconductor integrated circuit (IC).

• One or more microprocessors typically serve as a central processing unit (CPU) in a

computer system or handheld device.

• Microprocessors made possible the advent of the microcomputer.

• Three basic characteristics differentiate microprocessors:

Instruction set: The set of instructions that the microprocessor can execute.

Bandwidth: The number of bits processed in a single instruction.

Clock speed: Given in megahertz (MHz), the clock speed determines how

many instructions per second the processor can execute.

• In both cases, the higher the value, the more powerful the CPU. For example, a 32 bit

microprocessor that runs at 50MHz is more powerful than a 16-bit microprocessor that

runs at 25MHz.

• In addition to bandwidth and clock speed, microprocessors are classified as being either

RISC (reduced instruction set computer) or CISC (complex instruction set computer).

Evaluat ion of the Microprocessors

The evolution of microprocessors has been known to follow Moore's Law when it

comes to steadily increasing performance over the years. This law suggests that the

complex i ty of an in tegra ted c i rcu i t , wi th respect to m in imum component cos t ,

doub les every 18 mo nths . This dictum has generally proven true since the early 1970s.

From their humble beginnings as the drivers for calculators, the continued increase in

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power has led to the dominance of microprocessors over every other form of computer;

every system from the largest mainframes to the smallest handheld computers now uses

a microprocessor at its core.

The microprocessor has changed the way computers work by making them

faster. The microprocessor is often called the brain of the C.P.U.(or the central

processing unit) and without the microprocessor the computer is more or less

useless. Motorola and Intel have invented most of the microprocessors over the last

decade. Over the years their has been a constant battle over cutting edge

technology. In the 80's Motorola won the battle, but in the 90's it looks as Intel has won

the war. Table 1 lists some of types that belong to these companies (families) of

microprocessors.

Company 4 bit 8 bit 16 bit 32 bit 64 bit

Intel40044040

800880808085

8088/68018680286

8038680486

80860pentium

Zilog Z80Z8000Z8001Z8002

Motorola

6800

68026809

68006

6800868010

68020

6803068040

The First 25 Years of Evolution

In 25 years, the number of transistors on a microprocessor chip grew from a

couple thousand to more than five million. By the turn of the century, the number

routinely exceeded 100 million on top-of-the-line chips.

Table 1: Some Types of Microprocessors

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Comparison between 8085 and Z80 Microprocessors

No. 8085 Microprocessor Z80 Microprocessor

1 Data Lines are MULTIPLEXED It has no MULTIPLEXED lines

2 74 instructions 158 Instructions

3 Operates at 3 to 5MHz Operates at 4 to 20 MHz

4 It has 5 interrupts It has two interrupts

5 No on board dynamic memory It has on board logic to refreshDynamic memory

6 It contains no Index register It has two Index register

7 It contains SIM & RIM It contains no SIM & RIM

Comparison between 8085 and MC6800 Microprocessors

No. 8085 Microprocessor MC6800 Microprocessor

1 It operates on Clock frequencyof 3 to 5 MHz.

It operates at 1 MHz frequency.

2 8085 has no Index register. It has one index register.

3

8085 has on board clock logic

circuit. No clock logic circuit.

4 8085 has one AccumulatorRegister.

MC6800 has two AccumulatorRegisters.

5 8085 has five interrupts. MC 6800 have two interrupts.

6 It has total 674 Instructions. MC6800 has total 72 instructions


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Comparison between 8086 and 8088 Microprocessors

No. 8086 Microprocessor 8088 Microprocessor

1 The instruction Queue is 6 bytelong.

The instruction Queue is 4 bytelong.

2 In 8086 memory divides into twobanks, up to 1,048,576 bytes.

The memory in 8088 does notdivide in to two banks as 8086.

3 The data bus of 8086 is 16-bitwide

The data bus of 8088 is 8-bit wide.

4 It hasBHE signal on pin no. 34 &there is no SSO signal.

It does not hasBHE signal on pinno. 34 & has only SSO signal. It

has no S7 pin.

5

The output signal is used toselect memory or I/O at IO M

but if IO M low or logic ‘0’ it

selects I/O devices and if IO M

is high or logic ‘1’it selectsmemory.

The output signal is used to selectmemory or I/O at IO M but

if IO M is low or at logic ‘0’,it

selects Memory devices and if

IO M is high or at logic ‘1’it

selects I/O.

6 It needs one machine cycle toR/W signal if it is at even locationotherwise it needs two.

It needs one machine cycle to R/Wsignal if it is at even locationotherwise it needs two.

7In 8086, all address & dataBuses are multiplexed.

In 8088, address bus, AD7- AD0 buses are multiplexed.

8It needs two IC 74343 for de-multiplexing AD0-AD19.

It needs one IC 74343 for de-multiplexing AD0-AD7.


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No. 8086 Microprocessor 80386 Microprocessor

1It is a 16 bit microprocessor and itis first 16 bit microprocessor after8085(8-bit).

It is a 32 bit microprocessor and it islogical extension of the 80236.

2It has pipelined architecture (nothighly) and high speed businterface on single chip.

It is highly pipelined architecture andmuch faster speed bus than 8086.

3It is upward compatible with80386.It means all 8086instructions are followed by 80386.

However, 80386 can support 8086

programming model & can also directlyrun the programs written for 8086 invirtual mode if VM=1(in protected mode)

4It is housed on a 40 pin DIPpackage.

The chip of 80836 contains 132 pins.

5 It is a built on a HMOS technology.The 80386 using High-speed CHMOS IIItechnology.

6No special hardware is equippedfor task Switching.

It has a special hardware for taskswitching.

7

The 8086 operates on a 5MHz.

Clock.

The 80386 operate 33MHz clock

frequency maximum.

8The address bus and data bus aremultiplexed.

It has separate address and data bus fortime saving.

9It has a transistor package densityof 29,500 transistors.

Transistor density and complexity furtherincreases 2,75,000.

10 It has a total of 117 instructions. It has total 129 instructions

11It has no mechanism protection,paging.

The 80386 contains protectionmechanism paging which has instructiontwo support them

12 It is operated in one mode only.It operate in three modesa)Realb)Virtualc)Protected

13 It has only instruction Queue.It has instruction Queue as well as prefetch queue.

14In 8086, It is not necessity that alloperation are in parallel mode.

80386 all functional units are not parallel

15 8086 has nine flags.It contains all nine flags of 8086 but otherflags named IOP,NT,RF,VM.


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The 8086/8088 is a 16 bit processor running on a 16 bit (8086) or 8 bit (8088) bus

with a 20 bit address. It can address 1 MB of memory. Addressing consists of adding the

program's effective address to the (left shifted by 4) value of one of the segment

registers. Think of segments as multiple 64kb regions of memory, overlapping at a

distance of 16 bytes.

The 80286 is a 16 bit processor running on a 16 bit bus with a 24 bit address. It

can address 16mb of memory.

In real mode, it operates the same as an 8086. This is the power on reset state. In

protected mode, the segment register changes meaning. Instead of a segment address

(left shifted by 4 base address), the segment register is an index into a page descriptor

table, which is a table that supports virtual mode. Each element in the page descriptor

table also contains information about the protection status of that page, so that page

protection can be provided.

Unfortunately, since the meaning of the segment register changed, the 80286 was

not object code compatible with programs written for the 8086/8088. This is one of the

factors that made the 80286 unpopular.

Other microprocessors

80486: introduced in 1989

• With 32-bit internal-external data bus and 32-bit address bus.

• built in math co-processor in a single chip.

• Introduction of cache memo ry (Static RAM with very fast access time).

Pentium :introduced in 1992 (Penta means five)

• Thus the Pentium began as the fifth generation of the Intel x86

architecture.

• The Pentium had an L2 cache from 256KB to 1MB, used a 50, 60 or 66MH

system bus and contained from 3.1 to 3.3 million transistors.

• The Pentium uses a 32-bit expansion bus; however the data bus is 64-bits.


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Pentium PRO :introduced in 1995

• The Pro chip was the first chip to be offered in the AT or the ATX format.

The ATX format was preferred, as the Pro consumed more than 25 W of

power, which generated a fair amount of heat.

• There were several major improvements of Pentium pro over Pentium, for

example:

It had a superscalar architecture ( microprocessor architecture

containing more than one execution unit )

2-stage super pipeline

Internal micro-ops similar to RISC like instructions and internal

thermal protection.

• This microprocessor could be clocked to 200.00 MHz and consisted of 5.5

million transistors.

Pentium II

• Intel began by separating the processor, and cache of the Pentium Pro,

mounting them together on the circuit board with a big heat sink. Then by

dropping the whole assembly onto the system board, using a Single Edge

Contact (SEC) with 242 pins in the slot, and adding the 57 MMX (Multimedia

extension) micro-code instructions, then Intel had the Pentium II. This way,

defective cache modules don't force throwing out of a perfectly good CPU,

because of a bad cache. And to further improve cache yields, the Pentium II

ran cache at half the speed of the CPU.

• Pentium II uses the Dynamic Execut ion Technology

• Pentium II includes data integrity and reliability features such as Error

Correction Code (ECC), Fault Analysis, Recovery and Functional Redundancy

Checking for both system and L2 cache buses.

• The pipelined Floating-Point Unit (FPU) supports the 32-bit and 64-bit formats

specified in IEEE standard 754, as well as an 80-bit format.


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• Parity protected address/request and response system bus signals with a retry

mechanism for high data integrity and reliability.

• An on-die diode monitors the die temperature. A thermal sensor located on the

motherboard can monitor the die temperature of the Pentium II processor for

thermal management purposes.

• This microprocessor could work at clock rates of 300MHz and is made up of

7.5 million transistors.

Pentium III

• Similar to Pentium II, the Pentium III processor also uses a Dynamic Execution

micro-architecture: a unique combination of multiple branch prediction, data

flow analysis, and speculative execution.

• The Pentium III has two major differences with Pentium II: Improved MMX and

Processor serial number feature. The improved MMX has totally 70

instructions enabling advanced imaging, 3D streaming audio and video, and

speech recognition for enhanced Internet Experience: technology instructions

for enhanced media and communication performance.

• Additionally, Streaming SIMD (single-instruction, multiple data) Extensions for

enhanced floating point and 3-D application performance.

• It also consisted of Internet Streaming SIMD Extension s which consisted of

70 instructions and includes single instruction, multiple data for floating-point,

additional SIMD integer and cacheability control instructions.

• Data Pre-fetch Logic anticipates the data needed by the application programs

and pre-loads into the Advanced Transfer Cache increasing performance.

• The processor has multiple low power states such as Sleep, and Deep to

conserve power during idle times. The system bus runs at 100MHz and

133MHz allowing for a 33% increase in available bandwidth to the processor.

• The Processor Serial Number extends the concept of processor identification

by providing a 96-bit software accessible processor number that may be used

by applications to identify a system. Applications include membership


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authentication, data backup/restore protection, removable storage data

protection, and managed access to files.

Pentium 4

• The Pentium 4 processor is Intel’s microprocessor that was introduced at

1.5GHz in November of 2000.

• It implements the new Intel Net Burs t micro-architecture that features

significantly higher clock rates and world-class performance.

• It includes several important new features and innovations that will allow the

Intel Pentium 4 processor to deliver industry-leading performance for the next

several years.

• The Pentium 4 processor is designed to deliver performance across

applications where end users can truly appreciate and experience its

performance. For example, it allows a much better user experience in areas

such as Internet audio and streaming video, image processing, video content

creation, speech recognition, 3D applications and games, multi-media and

multi-tasking user environments.

• The Pentium 4 processor enables real time MPEG2 video encoding and near

real-time MPEG4 encoding, allowing efficient video editing and video

conferencing.

• It delivers world-class performance on 3D applications and games.

• It adds 144 new 128-bit Single Instruction Multiple Data (SIMD) instructions

called SSE2 (Stream ing SIMD Extensi on 2) that improves performance for

multi-media, content creation, scientific, and engineering applications.

• Intel NetBurst micro-architecture of the Pentium 4 processor has four main

sections: the in-order front end, the out-of-order execution engine, the integer

and floating-point execution units, and the memory subsystem.

• The Pentium 4 processor has a 20-stage mispredic t ion pip el ine while the P6

micro-architecture has a 10-stage misprediction


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• The Pentium 4 processor has a system bus with 3.2 G-bytes per second of

bandwidth. This bandwidth is achieved with a 64-bit wide bus capable of

transferring data at a rate of 400MHz.

Itanium

• Intel, with partner Hewlett-Packard, developed a next generation 64-bit

processor architecture called IA-64 (the 80x86 design was renamed IA-32) -

the first implementation was named Itanium.

• Itanium core processor is not binary compatible with X86 processors, instead it

has a separate compatibility unit in hardware to provide IA32 compatibility.

Itanium only allow memory operands in load and store operations.

• As Itanium was a 64-bit processor so could address memory up to 4 GByte of

RAM.

• The Itanium processor was specifically designed to provide a very high level of

parallel processing, to enable high performance without requiring very high

clock frequencies (which can lead to excessive power consumption and heat

generation).

• Key strengths of the Itanium architecture include, Up to 6 instructions/cycle:

The Itanium processor can handle up to 6 simultaneous 64-bit instructions per

clock cycle

• the dual-core version can support up to two software threads per core,

Extensive execution resources per core: 256 application registers (128 general

purpose, 128 floating point) and 64 predicate registers,

• Large cache: 24MB in the dual-core version (12MB per core), providing data

to each core at up to 48GB/s,

• Large address space: 50-bit physical / 64-bit virtual, Small, energy-efficient

core: Since Itanium relies on the compiler for scheduling instructions for

parallel throughput (other architectures rely on runtime optimization within the

processor itself),


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• it has fewer transistors in each core. This may be an advantage in current and

future multi-core designs.

Itanium 2

• The Itanium 2 is an IA-64 microprocessor developed jointly by Hewlett Packard

(HP) and Intel, and introduced on July 8, 2002. The first Itanium 2 processor

(code-named McKinley) was substantially more powerful than the original Itanium

processor, roughly doubling performance, and providing competitive performance

across a range of data- and compute-intensive workloads. Several generations of

Itanium 2 processors have followed.

• The Itanium 2 processor architecture is, dubbed Expl ic i t ly Paral lel Instruct io n

Comput ing (EPIC) . ‘It is theoretically capable of performing roughly 8 times more

work per clock cycle than other CISC and RISC architectures due to its Parallel

Computing Micro-architecture. However, performance is heavily dependent on

software compilers and their ability to generate code which efficiently uses the

available execution units of the processor.

• All Itanium 2 processors to date share a common cache hierarchy. They have 16

KB of Level 1 instruction cache and 16 KB of Level 1 data cache. The L2 cache is

unified (both instruction and data) and is 256 KB. The Level 3 cache is also

unified and varies in size from 1.5 MB to 24 MB. In an interesting design choice,

the L2 cache contains sufficient logic to handle semaphore operations without

disturbing the main ALU.

• The latest Itanium processor, however, features a split L2 cache, adding a

dedicated 1MB L2 cache for instructions and thereby effectively growing the

original 256 KB L2 cache, which becomes a dedicated data cache.

• Most systems sold by enterprise server vendors that contain 4 or more processor

sockets use proprietary Non-Uni form Memory Access (NUMA) architectures

that supersede the more limited front side bus of 1 and 2 CPU socket servers.

• The Itanium 2 bus is occasionally referred to as the Scalability Port, but much

more frequently as the McKinley bus. It is a 200 MHz, 128-bit wide, double


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pumped bus capable of 6.4 GB/s — more than three times the bandwidth of the

original Itanium bus, known as the Merced bus.

• In 2004, Intel released processors with a 266 MHz bus, increasing bandwidth to

8.5 GB/s. In early 2005, processors with a 10.6 GB/s, 333 MHz bus were

released.

Pentium D

• The Pentium D is a series of microprocessors that was introduced by Intel at the

spring 2005 Intel Developer Forum.

• A 9xx-series Pentium D package contains two Pentium 4 dies, unlike other multi-

core processors (including the Pentium D 8xx-series) that place both cores on a

single die.

• The Pentium D was the first announced multi-core CPU (along with its more

expensive twin, the Pentium Extreme Edition) from any manufacturer intended for

desktop computers.

• Intel underscored the significance of this introduction by predicting that by the end

of 2006 over 70% of its shipping desktop CPUs would be multi-core.

• With heat rising incrementally faster than the rate at which signals move through

the processor, known as clock speed, an increase in performance can create an

even larger increase in heat. The answer is multi-core microprocessor . For

example, by moving from a single high-speed core, which generates a

corresponding increase in heat, to multiple slower cores, which produce a

corresponding reduction in heat, enterprises can potentially improve application

performance while reducing their thermal output.

• A multi-core microprocessor is one which combines two or more independent

processors into a single package, often a single integrated circuit (IC); to be more

specific it has more than one execution unit with in a single integrated circuit.

• A dual-core device contains only two independent microprocessor execution units,

as shown in the figure below.


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• In general, multi-core microprocessors allow a computing device to exhibit some

form of thread-level parallelism (TLP) without including multiple microprocessors

in separate physical packages. This form of TLP is often known as chip-level

multiprocessing , or CMP.

• The Pentium D 820 runs in at 2.8GHz, is dual-core, its highlights are; it features

two 16KB data caches in addition to data cache, each core includes an Execution

Trace Cache that stores up to 12 K decoded micro-ops in the order of program

execution,

Microprocessor Fundamentals

Microprocessors are the "brains" of a computer. They direct the computer how to

perform the calculations and handle the data per user's instructions. Most of the logical

functionality resides in the central processing unit (CPU).

Components

A microprocessor contains an arithmetic logic unit (ALU) which processes any addition,

multiplication or Boolean operations that come through the device. It sends the results to the

control unit. The control unit processes any instructions and data and sends it to the registers for

temporary memory or through either the data, address or control bus.


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Instru ct ion Cycle

Each microprocessor model has a set of instructions such as add, move, branch

and jump. The microprocessor fetches each of these instructions from the memory. They

are stored in strings containing the number code of the instruction and the data relevant

to the instruction. Microprocessors follow an instruction cycle of fetch, decode and

execute.

Pipel in ing

Microprocessors pipeline instructions by overlapping the different parts of the

instruction cycle. Rather than wait for one cycle of fetch-decode-execute for one

instruction to complete, the microprocessor fetches the next instruction while it decodes

the previous instruction. This allows the microprocessor to process more instructions in a

given amount of time.

Cache

Cache is a small amount of memory that holds the most recently used data. This

memory allows a computer to get data quickly. This cuts the time it takes a computer to

access a recent program and computer data. Typically, the more cache memory

available, the faster the computer.

Clock Speed

Clock speed is the most recognized specification of a microprocessor. It is

typically measured in megahertz (MHz) or gigahertz (GHz). Generally speaking, the

faster your clock speed, the faster your computer can compute data. Also, be aware thatdual and quad core microprocessors are available. According to the Computer Shopper

website, a quad-core 2.5GHz Core 2 Quad Q9400 from Intel will outperform a 3GHz

Core 2 Duo E8400 in many computing tasks.

Bus Speed

Bus speed, typically called front-side bus (FBS), is the rate that a microprocessor

communicates with a motherboard's memory controller. High FSB speeds will increase

the performance of computer operations that are RAM-intensive, such as video andaudio editing and coding programs, or high-end 3D games.


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The Microprocessor-Based Personal Computer System

Figure 1 shows the block diagram of the personal computer. The block diagram is

composed of four parts:

1. Bus Architecture:- Three buses:

Address:

If I/O, a value between 0000H and FFFFH is issued.

If memory, it depends on the architecture:

20 -bits (8086/8088)

24 -bits (80286/80386SX)

25 -bits (80386SL/SLC/EX)

32 -bits (80386DX/80486/Pentium)

36 -bits (Pentium Pro/II/III)

Data:

8 -bits (8088)

16 -bits (8086/80286/80386SX/SL/SLC/EX)

32 -bits (80386DX/80486/Pentium)64 -bits (Pentium/Pro/II/III)

Fig. 1: shows the block diagram of the personal computer


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Contro l :

Most systems have at least 4 control bus connections (active low).

MRDC (Memory ReaD Control), MWRC , IORC (I/O Read Control), IOWC

Bus Standards:

ISA (Indu stry Standard Arc hitecture) : 8 MHz

• 8-bit (8086/8088)

• 16-bit (80286-Pentium)

EISA: 8 MHz

• 32-bit (older 386 and 486 machines).

PCI (Peripheral Component Intercon nect) : 33 MHz

• 32-bit or 64-bit (Pentiums)

• New: PCI Express and PCI-X 533 MTS

VESA (Video Electronic Standards A ssoc iat ion) : Runs at processor

speed.

• 32-bit or 64-bit (Pentiums)

Fig. 2: The block diagram of computer system showing the buses structure


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• Only disk and video.Competes with the PCI but is not popular.

USB (Universal Serial Bu s) : 1.5 Mbps,12 Mbps and now 480 Mbps.

• Newest systems.

• Serial connection to microprocessor.

• For keyboards, the mouse, modems and sound cards.

• To reduce system c ost through fewer wires.

AGP (Adv anced Graphics Port) : 66MHz

• Newest systems.

• Fast parallel connection: Across 64-bits for 533MB/sec.

• For video cards.

• To accomm

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