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MULTILEVEL INVERTER FAULT DETECTIION CLASSIFICATION AND

DIAGNOSIS

Submitted in partial fulfilment of the requirement for the award of

the degree

Of

Bachelor of Technology

In

Electrical Engineering

By

SURYAKANT TRIPATHI (12117081) SUMAN KUMAR (12117080)

Under the guidance of

MR.LALIT KUMAR

Assistant Professor

DEPARTMENT OF ELECTRICAL ENGINEERING

NATIONAL INSTITUTE OF TECHNOLOGY RAIPUR

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CERTIFICATE

This is to certify that the thesis entitled “MULTILEVEL

INVERTER FAULT DETECTION CLASSIFICATION AND

DIAGNOSIS” submitted by SURYAKANT TRIPATHI

(12117081) and SUMAN KUMAR (12117080) in partial

fulfilment of the requirement for the award of Bachelor of

Technology Degree in Electrical Engineering at NATIONAL

INSTITUTE OF TECHNOLOGY RAIPUR is the authentic work

carried out by them under my supervision and guidance.

To the best of my knowledge the matter embodied

in the thesis has not been submitted to any other

university/institute for the award of any degree of diploma.

Guided by:

Mr Lalit Kumar

Department Of Electrical Engineering

Approved by:

Dr. Subhojit Ghosh

HEAD OF DEPARTMENT (EE)

NATIONAL INSTITUTE OF TECHNOLOGY RAIPUR

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ACKNOLEGEMENT

The project undertaken is not an individual’s effort but a

result of constant supervision and guidance of many people

attached with this process in one way or the other. It is our

honest admission that we could not have completed this

project without the assistance of the people mentioned below:

We are extremely indebted to the Department Of Electrical

Engineering for providing us with the much wanted exposure

to various soft computing techniques adding finesse to the

technical acumen.

Firstly we wish to express our deep sense of gratitude to our

project guide Mr. Lalit Kumar, for his constant motivation and

valuable help throughout the project work. Our sincere

thanks to Dr. S Ghosh, the Head Of Department Electrical

Engineering for providing such learning and illuminating

environment. We also want to thank all the technical and non

technical staff that helped us completing this thesis.

We would like to express great thanks and deep sense of

gratitude to the almighty, our parents and friends. Without

their support we could not have made this project

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CONTENTS PAGE NO

1 INTRODUCTION 05 2 LITERATURE REVIEW 15 3 PROPOSED WORK 22 TOPOLOGY CONTROL SCHEME OPERATION NEURAL NETWORK 4 FAULT IDENTIFICATION AND DIAGNOSIS 32 5 FUTURE SCOPE OF WORK 34 6 CONCLUSION 35 7 REFERENCES 36 8 APPENDIX 37

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INTRODUCTION

The thesis represents the simulation of power

converters that is inverters (dc to ac converters) and

frequency converters like cyclo converter.

Let’s start with the dc to ac converters or inverters.

An inverter is something that inverts. In the field of

electrical engineering it is required to convert the dc

signal to two parts that is in a part of time the dc voltage is

going to be as it is or positive and in other part of time it is

negative or inverted.

For generating a 50 Hz fundamental frequency

square wave of maximum voltage 100 volts we require a

100 volt battery, 4 pulse generators and 4 controlled

switches like IGBTS (Insulated Gate Bipolar Transistor)

which consists of both transistor and mosfet. Since the

transistor have low saturation voltage and mosfet has high

input impedence and high switching speed the advantage

of both are taken to make a new switching device called

IGBT.

A typical IGBT of Infineon technologies is shown in

figure 1.1 (a) and its schematic diagram is shown in figure

1.1 (b).

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The pulse generators used can be generated form a

computer aided mechanism or from microprocessor.

The pulse can also be generated by PWM technique:

o Sigma-Delta modulator

o SPWM (Split Pulse Width Modulation Technique)

o SVPWM(Space Vector Pulse Width Modulation)

o Microcontroller based PWM generator (Aurdin Mega

2560)

A simple square wave inverter is shown in fig 1.2 (a), its

connection diagram in 1.2 (b) and voltage waveform per

cycle in 1.2(c)

Fig 1.1 (a) Fig 1.1 (b)

Fig 1.2 (a) Fig 1.2 (b) Fig 1.2 (c)

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Faults in square wave inverter are a big concern. Since a

square wave with dc voltage source of 100 volts having a

square waveform of +100 to -100 and its RMS(Root Mean

Square) value is 100 but when a fault occurs in any of the

4 switches like open circuit or short circuit fault there are

two possibilities in the voltage waveform i.e. 0 to +100 or

0 to -100. In both cases the RMS value is (100/sqrt(2)) or

70 (approx). to identify the fault occurs the RMS value of

the signal is taken continuously over a period of 0.02

seconds and passed through a relational operator of

(<=80). If there is a fault occurs in the system the output

signal of the relational operator is 1. This signal can be

utilised for fault diagnosis i.e. for turning off the dc supply.

Pulse generation can be possible by various techniques

like computer aided technique or microprocessor based

technique. Also pulse generators are available in markets.

A typical pulse generator made by TTI is shown in figure

1.3 as shown.

Pulse can also be generator by PWM technique such as

SPWM and SVPWM methods in which the carrier signals

are compared with reference signal.

Fig 1.3

0.1Hz to 10MHz frequency range

Independent control of pulse frequency, width and delay

50ns minimum pulse width

Square wave, double pulse & delayed pulse modes

Free-run, gated and triggered modes

50 Ohm output: 0.1V to 10V amplitude

TTL/CMOS and Sync outputs

Low-cost

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The output signals generated by these signals are

transferred to the gate of the IGBTs and trigger them.

For control of gate signals PWM is created by some

certain type of controller like PLC (Programmable Logic

Control) or can be controlled by arduino microcontroller.

Generally arduino microcontroller PWM signals are used

for motor speed control. A schematic diagram is shown in

fig 1.4 (a)

For high power applications and integrated industrial

usage when a large no of motors are there for conveyor

belt and for other running motors, PWM is generated by

PLC or Programmable Logic Controller. A PLC based PWM

modulator with PLC is shown in fig 1.4 (b).

Fig 1.4 (a)

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Figure 1.4 (b) shows a Siemens PLC along with its diver

relay board which connects with the PLC to generate PWM

signals.

The dc source provided to the inverter is of constant

voltage constant power type so that it can fed the load

continuously. Solar cells and lithium ion barites can be

used for this purpose. There are basically two types of

systems i.e. STAND ALONE systems and GRID CONECTED

systems. In the former one the inverter is connected to

the load itself in the later one the inverter with battery

bank system is connected to the gird to give and take

power from it. When the battery charge is low the grid

makes flow of power towards the inverter and when the

inverter has sufficient power it will make a power flow

towards the grid which includes an auto synchroniser that

synchronise them by matching their voltage levels and

frequency.

Fig 1.4 (b)

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When we talk about inverters we think about efficiency. A

highly efficient inverter which have low distortion (THD).

A square inverter contains infinite no of harmonics and to

reduce them we have to make the output voltage a

staircase type so that the no of harmonics reduced and we

get a more sinusoidal waveform as the output voltage and

current. That’s why we use multilevel inverter. A

multilevel inverter can be of odd level type only. In the

recent world multilevel inverters are normally used as

compared to simple square wave inverters. A multilevel

PWM inverter is used to obtain a more reduced power

operation.

There are various types of multilevel inverters. Basically

they are of two types the first one is based on separate dc

sources where more than one dc sources or batteries are

there and another one is of common dc source in which

only one dc source is present.

In first type of multilevel inverter which contains separate

dc sources also have two types. The first one is called

asymmetric in which all the dc sources used have unequal

magnitude of voltage across their terminals and another is

called symmetric in which all the dc sources have equal

magnitude of voltage across their terminals. One example

of symmetric type inverters is cascaded H bridge inverter.

In second type of multilevel inverter which contains one

dc source have two types. One is flying capacitor type and

another is diode-clamped type.

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The circuit connection diagram of cascaded H bridge,

flying capacitor and diode clamped inverter is as shown in

fig 1.5 (a), fig1.5 (b) and fig 1.5 (c).

The voltage waveform generated by the multilevel

inverter is staircase type. Here also two kinds of outputs

can be obtained. The first one is the normal staircase

output and the second is the PWM output. Figure 1.6 (a)

and (b) these outputs respectively.

Fig 1.5 (a)

Fig 1.5 (c)

Fig 1.5 (b)

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A filter R-L or RC is required to make this waveform

pure sinusoidal.

Since multilevel inverter acquires a large part in

electricity field and in industries, its presence is significant

and if there is any malfunctioning of MLD or MLID related

equipment a large amount of production can be stopped

which leads to hazardous conditions even. Therefore fault

analysis of inverter is necessary. The faulty element needs

to be isolated from the system and make the system

perform its task under compromised conditions. There are

mainly two kinds of faults which need to be identified.

Switch faults and phase faults.

Fig 1.6 (a)

Fig 1.6 (b)

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The former is based on faults like open circuit and short

circuit faults in IGBTs and can be judged using two

different ways. The first one is to connect the voltage or

current sensor in each IGBT and the second one is to

observe the output waveform and classify the faults by

taking its THD values using Neural Network. The neural

network has the output ports that govern the gate input

signals of IGBTs by modifying them according to the type

of fault.

Neural Network is a network that update itself according

to the situation and adapt itself by checking the difference

between the desired input and actual input and making it

zero by changing the weights and biases inside the

neurons. The inspiration of neural network is taken from

animal nervous system which adapts itself by connecting

and disconnecting connections among themselves.

Various neural network application software are DATO,

MATLAB, PYTHON, STUTTGUARD NEURAL NETWORK

SIMULATOR, EMERGENT, NEURAL LAB etc.

Neural network consist of weighted function that

multiplies with the input signal to give the output signal,

bias for constant addition purpose, summer for addition

of addition of two or more inputs and an activation

function like pure linear, tangent sigmoid, and sigmoid

function.

Neural Network after setting its no of layers, number of

neurons and activation function have its random output

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for a a particular input needs to be trained by providing it

the inputs and outputs so that it can modify it’s internal

circuitry such that for a particular trained input gives the

corresponding output.

An advanced topology of a multilevel inverter with

reduced number of switch is called T- type inverter as

shown in figure 1.7 (a)

The T-type inverter shown above gives 5 level output. The

PWM signals are generated by a analogue to digital

converter called “SIGMA DELTA MODULATOR” whose

symbolic diagram is shown in figure 1.7 (b).

Fig 1.7 (a)

Fig 1.7 (b)

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LITERATURE REVIEW

SECTION 2.1:- This chapter outlines the major research works reported o far in the multilevel inverter topologies and modulation techniques. Performance analysis of various multilevel inverters reported in the literature is given in section 2.2. Modulation techniques applicable for different multilevel inverters are presented in section 2.3. Inferences from existing works are summarized in section 2.4.

SECTION 2.2:- Multilevel inverter technology has been developed recently as a very significant alternative in the area of medium and high power applications. Jose Rodriguez et al (2002) discussed the most important topologies like diode clamped inverter, flying capacitor inverter, cascaded multi-cell with separate DC sources and emerging topologies like asymmetric hybrid cells and soft-switched multilevel inverters. The most relevant control and modulation methods developed for this family of converters like multilevel sinusoidal pulse width modulation, multilevel selective harmonic elimination and space vector modulation were also discussed. Special attention was devoted to the latest and more relevant applications of these converters such as conveyor belts, laminators and unified power flow controllers. Finally, the peripherally developing areas such as high-voltage high power devices, optical sensors and other opportunities for future development were addressed.

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Leon Tolbert et al (2002) presented transformer less multilevel inverters for the applications of high power Hybrid Electric Vehicle (HEV). Multilevel inverters could generate nearly sinusoidal voltages with fundamental frequency switching. It did not have electromagnetic interference or common-mode voltage problem. These features made an HEV more accessible and safer. Cascaded multilevel inverter used several levels of DC voltage sources, which will be available from batteries, ultra-capacitors, or fuel cells. So, it was fit for large automotive hybrid electric drives. Simulation and experimental results showed how to operate this inverter in order to maintain equal charging and discharging operations from the DC sources in hybrid electric vehicles. Zhong Du et al (2006) proposed a cascaded multilevel inverter which is implemented using only a single DC power source and capacitors. Typical cascaded multilevel inverter required n number of DC sources for (2n+1) levels. The proposed scheme employed the use of a single DC power source without transformers and the remaining n 1 DC sources being capacitors. In this proposed scheme, the DC voltage level of the capacitors was maintained and also a fundamental switching frequency pattern was utilized to produce a nearly sinusoidal output voltage. The switching angles were chosen to eliminate harmonics in the output voltage waveform. Rajesh Gupta et al (2007) proposed a Distributed Static Compensator (DSTATCOM), based on cascaded transformer multilevel inverter. The proposed scheme needed a common DC storage capacitor. Two level ramp comparison current control method was extended for the

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multilevel inverter using phase shifted multi-carrier Pulse Width Modulation In this method, equal switching stress and equal power handling for all the cascaded units can be achieved. The net switching frequency increased with decrease in ripple magnitude, causing the feed forward gain to increase leading to a higher bandwidth of the control loop. An expression for the feed forward gain had been derived which showed that the use of proportional plus resonant controller with proposed multilevel modulation makes the tracking characteristics to get improved at fundamental frequency. A seven level inverter based DSTATCOM was proposed for application to the three phase medium voltage distribution system and results were proved by Power System Computer Aided Design (PSCAD)/ Electromagnetic Transients Including DC (EMTDC) simulation. Jose Rodriguez et al (2007) described a technology review of voltage source converter topologies for medium voltage industrial drives. They had discussed many inverter topologies like diode clamped, cascaded H-bridge and flying capacitor converters. Operating principle of each topology with relevant modulation methods was employed. It concluded that the selection of topology and modulation method were closely related to a particular application and also gave solution to the problems like voltage level, dynamic performance, reliability, costs and the other technical specifications. Dietmar Krug et al (2007) compared the component count and the expense of active and passive components of the different multilevel inverter topologies for 2.3 kV, 2.39 MVA industrial medium voltage drives. Diode clamped multilevel inverter is one of the competitive topology for

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large variety of low and medium switching frequency (1000Hz) applications. The high capacitance values and stored energies of the flying capacitors limit the use of the flying capacitor multilevel inverter to high switching frequency (1200Hz) applications. Cascaded H-bridge multilevel inverter is an attractive topology for various medium voltage drives because it required lowest installed switch power and stored energy of the LC sine filter. Insulated Gate Bipolar Transistor (IGBT) was recommended for industrial medium voltage drives. SECTION 2.3:- John Chiasson et al (2003) proposed a technique which helped to find out switching angles to get the required output voltage and to cancel higher order harmonics. A complete analysis was done for seven level converter with three DC sources and it proved that, for various modulation index values, desired fundamental value was produced making the fifth and seventh harmonics zero. A full solution to the above said problem of eliminating the fifth and seventh harmonics in a seven level inverter has also been given. Resultant theory was used to solve the nonlinear transcendental equations when a solution existed and when it did not. For certain range of values, two sets of solutions were obtained by resultant theory. Also, the solution set that minimizes the 11th and 13th harmonics was chosen. Experimental results were compared with the theoretical results and presented. Cascaded multilevel inverters were constructed by series connected single phase modular power bridges. Poh Chiang Loh et al (2005) presented the implementation and operation of the proposed inverters. The proposed work specified clearly about the development and control of an integrated power bridge

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with its own digital signal processor and also associated control circuit. The network control algorithm and signal protocol for synchronizing multiple power bridges were presented. Also, optimum harmonic cancellation and reduced common mode voltage were achieved. Performance of the proposed system was verified through simulation and experiment on a five level prototype inverter. An active harmonic elimination method to eliminate any number of specific higher order harmonics of multilevel converters with equal or unequal DC voltages was developed by Zhong Du et al (2006). First, resultant theory was applied to transcendental equations characterizing the harmonic content to eliminate low order harmonics and to determine switching angles for the fundamental switching frequency scheme and a unipolar switching scheme. Next, the residual higher order harmonics were computed and subtracted from the original voltage waveform to eliminate them. The simulation results showed that the method can effectively eliminate the specific harmonics and produce a nearly sine wave with a low THD. An experimental eleven level H-bridge multilevel converter with a field programmable gate array controller was employed to implement the method. The experimental results showed that the method effectively eliminates any number of specific harmonics and hence the output voltage waveform has low THD. The issue of voltage imbalance remains a challenge for the flying capacitor multilevel inverter. The Phase Shifted Pulse Width Modulation (PS–PWM) method had a certain degree of self-balancing properties. However, the method alone is not sufficient to maintain balanced capacitor voltages in practical applications. Chunmei Feng et al

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(2007) proposed a closed-loop modified PS–PWM control method by incorporating a novel balancing algorithm. The algorithm took the advantage of switching redundancies to adjust the switching times of selected switching states and thus maintaining the capacitor voltages balanced without adversely affecting the system’s performance. Key techniques of the proposed control method, including selection of switching states, calculation of adjusting times for the selected states and determination of new switching instants of the modified PS–PWM were described and analysed. The voltage and current THD obtained for five level inverter using this modulation was 13.1% and 5.3%. Simulation and experimental results were presented to confirm the feasibility of the proposed method. SECTION 2.4:- diode clamped, flying capacitor and cascaded multilevel inverters had been adopted to reduce the power quality problems of conventional voltage source inverters (Jose Rodriguez et al 2002). These conventional multilevel inverters require large number of switching devices. Among the three basic topologies cascaded multilevel inverters require fewer components (Dietmar Krug et al 2007, Anup Kumar Panda & Yellasiri Suresh 2012). Many researchers presented the hybrid topologies to reduce the number of semiconductor switches and DC voltage sources (Zhong Du et al 2006, Alireza Nami et al 2011, Krishna Kumar Gupta & Shailendra Jain 2013). A major effect of harmonic voltages and currents in medium and high power induction motor drive was increased heating due to iron and copper losses at the harmonic frequencies (Bell & Sung 1997). Motor efficiency and the torque developed were affected by the harmonic components. Harmonic currents in a motor can give rise to

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a higher audible noise emission as compared with sinusoidal excitation (Peter Hammond 1997, Mohapatra et al 2003). The quality of the output voltage can be improved by several modulation techniques such as space vector PWM (Wenxi Yao et al 2008, Amit Kumar Gupta & Ashwin Khambadkone 2007), selective harmonic elimination (John Chiasson et al 2003, Zhong Du et al 2006, Vassilios Agelidis et al 2008) and sinusoidal PWM (Chunmei Feng et al 2007, Ilhami Colak & Ersan Kabalci 2012). These modulation techniques utilized either high frequency switching or low frequency switching. Selective harmonic elimination technique had the problem in solving non-linear transcendental equations to get an optimum switching angles (Faete Filho et al 2011, Ayoub Kavousi et al 2012). New MLI topologies are proposed which can minimize the power quality issues with less number of components. MPD-SPWM technique is proposed with the combination of high switching frequency and fundamental switching frequency for low power applications. GA optimization technique is proposed to get the precise switching angles than the existing NR method. Proposed work is mainly focused on reduction of power switches and minimization of THD.

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PROPOSED WORK The proposed work is based on simulation of multilevel inverter and its fault detection, classification and diagnosis. The first thing is to dealt with topology, its control scheme and operation. We also discus about Neural network implementation on fault diagnosis. The first thing we are dealing with the topology and the output waveforms created by it.

The figure illustrated in 3.1(a) is a simple VSI inverter with a

square wave output of 100 volts maximum voltage. The wave

form is illustrated in figure 3.1 (b). Under non faulty condition

the RMS value is greater than 80 or else it is less than 80.

That’s why when there is a fault after reading one cycle

scope1 shows logic 1.

3

Fig 3.1(a)

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Fig 3.1(b)

Fig 3.1(c)

Fig 3.1(d)

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The three level inverter which gives three level output i.e.

+Vdc, 0 and -Vdc. For implementing its PWM a sine wave is

compared with saw tooth waves which can be implementing

using repeating sequence. One saw tooth wave whose

magnitude ranges from 0 to +1 is compared to sine wave.

Another saw tooth wave which is compared to sine wave have

its magnitude 0 to -1. The former saw tooth give its signals to

A and C switch and the later saw tooth wave is give its signals

to B and D switch. The simulation diagram of three level

inverter is given in 3.2 (a). Its voltage waveform is illustrated

in figure 3.2 (b) and the gate pulse signals are given in figure

3.2 (c).

Fig 3.2(a)

Fig 3.2(b)

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To make the waveform with high voltage level and to be more

staircase five, seven, nine level inverters, their output voltage

waveforms and their gate pulses.

Fig 3.2(c)

Fig 3.3 (a)

Fig 3.3 (a)

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Fig 3.3 (c)

Fig 3.4 (a)

Fig 3.4 (b)

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Fig 3.4 (c)

Fig 3.5 (a)

Fig 3.5 (b)

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The Pulse of each switch is not shown in case of nine level

inverter due to congested size.

The simulation of a new topology of T-type inverter is shown

in figure 3.6(a), its voltage waveform in 3.6(b) and its gate

signals in 3.6(c).

Fig 3.5 (b)

Fig 3.5 (c)

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Neural Network is used for classification of switching faults.

Since the open and short circuit faults can’t be classified in

one Neural Network due to its complexity of training. A large

number of neurons are required and therefore the training

time is high.

The open and short circuit faults are classified with separate

Neural Networks.

The training data for short circuit switching fault at

modulation index 1 is:-

[28.43 34.73 18.86 18.15 18.43 18.66

18.39 18.15 18.43]

The desired t matrix is: -

[ 0 1 2 37 48 5 6 37 48]

The training data for open circuit switching fault:-

[28.43 21.31 21.89 43.89 20.85 35.97 18.02

43.95 18.55]

The desired matrix is:-

[0 1 2 3 4 5 6 7 8]

Fig 3.5 (c)

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In figure 3.6 (a) the training of open circuit switch fault is

there and in (b) of short circuit.

The open circuit switch fault neural network uses four layers

of neuron perceptrons. In which the first layer is the input

layer containing ten neurons with activation function tangent

sigmoid or tansig function. The second layer is the first hidden

layer of the neural network system containing eight neurons

of the same activation function. The third layer is the second

hidden layer of the neural network system containing six

neurons and the fourth layer or the output layer has one

neuron with same activation functions of tansig.

Fig 3.6 (a) Fig 3.6 (b)

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Similarly for short circuit switch faults another neural

network is made and trained as given in figure 3.6 (b). The

neural network consist of four perceptron layers too i.e. two

hidden layers, one input layer and one output layer of eleven,

six, five and one neurons.

During testing of neural network any one of the input values

among the above open or closed circuit faults have put into

the testing data for getting the corresponding switch no which

is faulty.

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FAULT IDENTIFICATION AND DIAGNOSIS

The fault identification and the corresponding locations can

be done with the help of MATLAB 2013a using SIMULINK

software embedded in MATLAB applications. For power

system applications we can do the FFT analysis of the scope

data for each kind of fault we can analyse the dc, fundamental

component, 2nd harmonic.... up to 19th harmonic components.

Figure 4.1 illustrates the no fault FFT analysis.

This is the bar mode illustrated we can turn on the list view

and can write the exact values that can be taken into the input

data for purpose of fault identification.

For fault diagnosis purpose we have to isolate the faulty

element from the system and for that purpose we have to

4

Fig 4.1

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generate some certain signals to open and close some

switches which allow the inverter to operate under low level

and low power conditions. The following table 4 shows the

corresponding notations for fault signals. The neural network

output is of 1 digit which tell us about the faulty switch which

then decoded into three binary digits [ _ _ _ ]. The first digit

represents the cell number. For a five level inverter their are

two cells so if the first digit is zero then cell 1 is faulty, if 1

then cell 2 is faulty. The next two digits represent the IGBT

number i.e. 1(00) ,2(01) ,3(10), 4(11)

SWITCH S1 S2 S3 S4 S1 0 0 1 1 S2 0 0 1 1 S3 1 1 0 0 S4 1 1 0 0

These signals are generated to make the whole system work

properly. Figure 4.2 represents the graph how the fault is

rectified in a fraction of a second.

Table 4

Fig 4.2

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FUTURE SCOPE OF WORK Our future scope of work is broadly defined. We have already done with fault classification in MATLAB simulation . in future we want it to be of real time simulation process and it’s hardware implementation. The pulse we gonna provide with arduino microcontroller and for neural network hardware implementation we take a memory device for the storage of neural network. We also make the hardware of T-type inverter and its fault diagnosis along with creating its control scheme by SIGMA DELTA modulator. We also going to dealt with creating renewable energy to grid integration by the use of inverters.

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CONCLUSION

Our project is based on multilevel inverter simulation, fault classification and diagnosis. In this project we make the pulse arrangement and the multilevel inverter topology along with its feature extraction system in which we calculate the THD of the system and use it as a parameter to estimate the switch which is faulty. Not only that but we also have to do the fault diagnosis means we have to do the automatic recovery by isolating the faulty element from the system.

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REFRENCES Fault diagnostic system for multilevel inverter using

ANN by SURIN KHOMFOI VOLUME 2 2007. Unique fault tolerant design for flying capacitor

multilevel inverter by XIAOMI N KUO Fault Detection and Diagnosis of 3-Phase Inverter

System by M. S. Khanniche and M. R. Mamat-Ibrahim Multi-resolution analysis for converter switch

Faults identification by Rashmi A. Keswani.

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APPENDIX

SPWM - It’s called Split Pulse Width Modulation in which a reference sine wave compared to repeating sequence to give the output. To see refer fig 6.1

SVPWM – It’s called Space Vector Pulse Width Modulation in which a vector is compared to four vectors to give the output in which two are non-zero vectors and two are zero vectors. To see refer fig 6.2 AURDINO – it’s a microcontroller board which is governed by ARDUINO software and provides a platform for automation and robotics based subjects. PLC – It’s also called Programmable Logic Controllers which is used in automation in large scale industries.

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Fig 6.1 Fig 6.2