Andreas Mai
SiGe BiCMOS and Photonic technologies for high frequency and communication applications
Department Head Technology
Outline
• Introduction & Motivation
• SiGe HBT device developments for high RF performance
Optimization towards 700 GHz fMAX
• Electronic-Photonic-Integrated-Circuit (EPIC) SiGe-BiCMOS
Integrated components, transmitter & receiver circuits
• Summary
2
THz SiGe HBT and BiCMOS
Motivation
• High-speed SiGe HBTs used today for:
Automotive radar @ 24 GHz, 77 GHz and 120 GHz for transportation
High data rate optical and wireless links …
• Cut-off frequencies (fT, fmax) typically 3-10X larger than operating frequency
Larger design margins, lower noise, higher gain, better linearity
Lower power consumption
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Motivation (cont)
• Further enhanced RF performance needed for potential new applications:
Back-haul for 5G mobile comm. (optical or wireless)
Short-range wireless links for high data rates
mm and sub-mm wave imaging and sensing in medicine, industry, and science
High-resolution sensors for robotics
• SiGe BiCMOS targets frequencies and data rates which are out of reach for state-of-the-art CMOS
5
European Projects on SiGe HBTs
• Enhancement of HBT performance and exploration of new application areas addressed
• DOTFIVE (2008-2011)Demonstration of HBTs with 500 GHz fMAX
• DOTSEVEN (2012-2016)Demonstration of HBTs with 700 GHz fMAX
• TARANTO (started 2017)BiCMOS platforms with 600 GHz fMAX targeting:
• Advanced automotive radar systems
• Infrastructure for 5G wireless and 400 Gb/s optical links
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HBT Optimization & Process Modifications
7
Starting Point SG13G2 Final Status (D7)
Narrower Silicide Blocking Spacers
External Base Formation
Reduced Width of Emitter & Emitter-Base Spacer
SiGe Base Profile & Adjacent Low-Doped Emitter & Collector Region
Ni Silicide
Millisecond Flash Annealing & Low-Temperature Backend
Scaled Emitter-Poly Width & Collector Window
[Heinemann, IEDM 2016]
• Starting point: IHP’s 130nm BiCMOS “SG13G2”Highly-doped collector isolated by STIElevated extrinsic base
• Exploration of HBT performance limits irrespective of CMOS process constraints
BCTM ‘09
IEDM ‘16
IEDM ‘12
Enhancement of fT and fMAX
• Results of the DOT5 and DOT7 projects compared to IHPs 1st generation 130nm BiCMOS
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200 300 400 500
100
200
300
400
500
600
700
800
IBM
STM
NXP
Tower/Jazz
IMEC
Infineon
IHP
f max
in G
Hz
fT in (GHz)
200 300 400 500
100
200
300
400
500
600
700
800
IBM
STM
NXP
Tower/Jazz
IMEC
Infineon
IHP
f max
in G
Hz
fT in (GHz)
200 300 400 500
100
200
300
400
500
600
700
800
IBM
STM
NXP
Tower/Jazz
IMEC
Infineon
IHP
f max
in G
Hz
fT in (GHz)
SiGe-HBT & BiCMOS performance evolution
200 300 400 500
100
200
300
400
500
600
700
800
IBM
STM
NXP
Tower/Jazz
IMEC
Infineon
IHP
f max
in G
Hz
fT in (GHz)
pre-„Dot5“2004…2009
within „Dot5“2009..2012
post „Dot5“2012…today
BCTM 2015
BCTM 2015
IEDM 2016
• Successfully finished Simultaneously fT > 400 GHz and
fmax ≈ 700 GHz for discrete HBTachieved
• Advanced HBT module (~0.5 THz) integrated into 0.13µm BiCMOS process of IFX
Demonstrator:
240 GHz RF chip-set + package(EuMW ‚16)
240 GHz radar transceiver + package + circular polarization (EuMC ’15)
550 GHz full Si CT scanner (IRMMW-THz ‘16)
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122GHz Radar as SiP and SoC (“SG13G2” == 0.5 THz – SiGe-BiCMOS)
System Requirements
Frequency: 122-123 GHz ISM
Pout: 0 dBm
GT = GR: 10 dBi
NF: 12 dB
BW: 1 GHz
SiP SoC
Modulation: CW/FMCW
Distance: up to 5 meters
On-chip integrated antennaby LBE process
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Photonic-SiGe-BiCMOS (EPIC)
Silicon photonic transceivers
12
Data centerMetroTRANCEIVERTransmitter
Receiver
Fiber-uplink
Fiber-downlink
Major application areas for SiPh tranceivers
LASER MODULATORDRIVER
PD AMPLIFIER
• Different market segments of optical/photonic area (telecom, automotive …)
• Requirements for continuous growth in bandwidth and IP traffic in optical networks, Long Haul and Metro applications
• Goal: Join basic components of e/o Transceiver (modulator, driver, amplifier, photo-detector,..)
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Transceiver is a multi-chip assembly
Hybrid /Co-packaging
G. Denoyer et al.; JLT 2015
Monolithic FEOL /CMOS Photonics
JS Orcutt et al.; OFC 2016
Monolithic FEOL /Photonic BiCMOS
IHP work
FEOL = Front End of Line
Major silicon ePIC approaches/technologies (select.)
14
• Photonic SOI CMOS• Zero-change Photonic CMOS• …. • Joint: CMOS + SiGe HBT + PIC
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SiGe HBTs0.25µm
RF-CMOS5 ML / MIM
170GHz fT 200GHz fmax 1.9V BVCEO
SG25H4_ePIC
Ge-PDs (high bandwidth, resp.) MZI modulator “130nm node” passives
State-of-the-art Si-photonics
40+Gb/s Strict modularity of photonic integration
Re-use of parent BiCMOSdevices (models)
No BiCMOS yield degradation
Re-use of DigLib
SG25H4 BiCMOSbaseline
Photonic BiCMOS 1st generation development goals
Central for EPIC– process integration
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• Shared wafer• Mixed Substrate:
• Localized SOI areas for optical structure• Bulk like substrate for BiCMOS structures
• Common backend• Modulized process flow
Green: ActiveRed: Waveguide
: STIGrey: local SOI
PIC- and EPIC-technology at IHP
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1. Mature 0.25µm-BiCMOS Technology available (SG25H4)
2. Development of PIC-process(Photonic Integrated Circuit) basedon established 0.25µm-BiCMOS Technology (SG25_PIC)
3. Integration of PIC in BiCMOS EPIC (Electronic Photonic Integrated Circuit) (SG25H_EPIC)
• More than 30 Masks
• More than 700 process steps> 20 Layer > 10 Layer
PIC
EPIC
EPIC Transmitters
Silicon cross section structuring
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• 3 etching depths available: 220nm, 120nm, 70nm• Vertical structuring is limited• Freedom in horizontal structuring
• Dopings: p, n, p+, n+
wire waveguide
rib waveguide
Grating structures
Transmitters differ in phase shifter structure
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Dopedwaveguide
• Depletion type
• Injection type
TM2
TM1
MET3
MET2
MET1
BOX
0 1 2 3 4 5 6 7 82
3
4
V-P
i*L
[V
*cm
]
Voltage [V]
0 1 2 3 4 5 6 7 810
11
12
alp
ha
[d
B/c
m]
Voltage [V]
Mach-Zehnder modulator – segmentation
21
Traveling wave electrode:
• Significant RF loss on the line
• Limited bandwidth and extinction ratio
• Velocity mismatch between optical and electrical waves
Segmented MZM:
• Modulator divided into lumped segments
• Constant voltage along the phase shifter → high ER
• Bandwidth expected to be less dependent on length → longer phase shifters can be driven effectively with low driving voltage
inte
grat
ion
Single MZM with linear driver
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9.8 mm
1.3
mm
• 6 mm phase shifter divided into 16 segments
• Total fiber-to-fiber loss equal to 17 dB (5 dB fromthe phase shifter)
500 nm
1000 nm
16
40
nm
D. Petousi et al, Monolithic Photonic BiCMOS Sub-SystemComprising Broadband Linear Driver and Modulator Showing 13 dB ER at 28 Gb/s, CLEO, 2016
ER=13.37 dB
• Power dissipation equal to2W or 71 pJ/bit at 28 Gb/s
• EO bandwidth 18GHz
28 Gb /s
ER=13.37 dB
measurement simulation
MZM + driver with integrated DAC
Concept:.
9 mm
2 m
m
D. Petousi et al. “High-Speed Monolithically Integrated Silicon Photonic Transmitters in 0.25 μm BiCMOS Platform”. ECOC 2016.
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…
light in light out
bit 0
driver w/DAC + MZM
limitingamplifiers
……
bit 1
bit N-1
Utilizing the segmentation of the modulator
Integrated DAC resolution is limited due to layout and area constraints.
With digital inputs, the driver is implemented as switching amplifier reducing power dissipation
NO EXTERNAL DAC.
Integrated Germanium photo diode
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Waveguide stub Metal1 contact
Germanium photodiodebuilding block
S. Lischke et al. Optics Express 23 (21), 2015Jeong-Min Lee et al, Photodetection Frequency Response Characterization for High-Speed Ge-PDon Si with an Equivalent Circuit, WA2-78, OECC 2016
Performance f3dB>65GHz@-2V R>0.9A/W Idark<100nA@-1V
M2J_BW_0V () _
file: EFA602_M2J_BW0V valid range: 0.41 ... 84.28 valid: 100.0%
wafer: EFA602-[06] mean ± 1s (lot): 42.34 ± 2.10
dice: 61 mean ± 1s (wafer): 42.34 ± 2.10
invalid
invalid
>
<
48.00
47.00
46.00
45.00
44.00
43.00
42.00
41.00
40.00
39.00
38.00
37.00
1
1
2
6
10
6
10
9
15
1
11
10
9
8
7
6
5
4
3
2
1
1 2 3 4 5 6 7
class width = 1.00
M2J_BW_0V () _
file: EFA602_M2J_BW0V valid range: 0.41 ... 84.28 valid: 100.0%
wafer: EFA602-[06] mean ± 1s (lot): 42.34 ± 2.10
dice: 61 mean ± 1s (wafer): 42.34 ± 2.10
invalid
invalid
>
<
48.00
47.00
46.00
45.00
44.00
43.00
42.00
41.00
40.00
39.00
38.00
37.00
1
1
2
6
10
6
10
9
15
1
11
10
9
8
7
6
5
4
3
2
1
1 2 3 4 5 6 7
class width = 1.00
Vbias=0V, =1550nmmean=42GHz (=2GHz)
GePD: Benchmark – Responsivity, e/o BW and dark current
25
-1 V -2 V >-2 V
Fully integrated Ge PD in BiCMOS exceed performance level of discrete PD
Enabler for high efficient Rx EPIC designs
EPIC Circuit Examples
27
M. Kroh et al, Monolithic Photonic-Electronic Linear Direct Detection Receiver for 56Gbps OOK, ECOC 2016
Extended BW (36GHz)
IHP Rx
Reference PD
28Gbd PAM4
Up to 56Gbps NRZ OOK
Recent results – linear SP receiver
32 Gbps 40 Gbps
48 Gbps 56 Gbps
Photonic BiCMOS evolution
Demonstrators: monolithically integrated O/E RECEIVERS
25 Gbps
2014
40 Gbps
2015
56 GbpsGrating Coupler
Ge PD
TIA
2016 [ECOC2016 &ESSCIRC2016]
[Knoll et al., OFC 2014]
[Awny et al., MWCL 2015]
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Photonic BiCMOS evolution
Demonstrators: monolithically integrated E/O MODULATORS
10 Gbps
2013
32 Gbps
2016
[Zimmermann et al., ECOC 2013]
[Petousi et al., PTL 2016]
HELIOS
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Summary
• Record values of fT=505 GHz, fMAX=720 GHz and tRO=1.34 psdemonstrated in an experimental SiGe HBT process
Room for further improvements by lateral scaling
• EPIC technology developments show potential for beyond 100Gbit/s optical interfaces
• Ongoing challenging task of integrating these HBTs and Photonic modules in a BiCMOS platform
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Acknowledgment
• IHP colleagues H. Rücker, B. Heinemann, D. Kissinger, H. Ng., L. Zimmermann, D. Knoll, S. Lischke, D. Petousi & M. Kroh
• IHP clean room staff
• Project partners and funding sources EU (H2020) & BMBF
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Thank you for your attention!
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